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6 * This file contains Original Code and/or Modifications of Original Code
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15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
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29 #include <platforms.h>
33 #include <i386/asm64.h>
34 #include <i386/proc_reg.h>
35 #include <i386/postcode.h>
41 /* align below right */
44 .word Times(8,GDTSZ)-1
45 /* XXX really want .quad here */
47 .long KERNEL_UBER_BASE_HI32 /* must be in uber-space */
51 /* align below right */
54 .word Times(16,IDTSZ)-1
55 /* XXX really want .quad here */
56 .long EXT(master_idt64)
57 .long KERNEL_UBER_BASE_HI32 /* must be in uber-space */
65 POSTCODE(ML_LOAD_DESC64_ENTRY)
67 lgdt EXT(gdtptr64) /* load GDT */
69 POSTCODE(ML_LOAD_DESC64_GDT)
71 lidt EXT(idtptr64) /* load IDT */
73 POSTCODE(ML_LOAD_DESC64_IDT)
75 movw $(KERNEL_LDT),%ax /* get LDT segment */
76 lldt %ax /* load LDT */
78 POSTCODE(ML_LOAD_DESC64_LDT)
80 movw $(KERNEL_TSS),%ax
81 ltr %ax /* set up KTSS */
83 POSTCODE(ML_LOAD_DESC64_EXIT)
90 Entry(ml_64bit_wrmsr64)
91 /* (uint32_t msr, uint64_t value) */
92 /* (uint32_t msr, uint32_t lo, uint32_t hi) */
110 /* (int32_t selector) */
124 Entry(set_64bit_debug_regs)
125 /* x86_debug_state64_t *ds */
132 mov DS64_DR0(%edx), %rax
134 mov DS64_DR1(%edx), %rax
136 mov DS64_DR2(%edx), %rax
138 mov DS64_DR3(%edx), %rax
169 /* %rax = %edx:%eax */
188 shr $32, %rdx // %edx:%eax = %cr3
195 /* FXSAVE and FXRSTOR operate in a mode dependent fashion, hence these variants.
196 * Must be called with interrupts disabled.
197 * We clear pending x87 exceptions here; this is technically incorrect, since we
198 * should propagate those to the user, but the compatibility mode kernel is
199 * currently not prepared to handle exceptions originating in 64-bit kernel mode.
200 * However, it may be possible to work around this should it prove necessary.