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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25
26 /*
27 * Mach Operating System
28 * Copyright (c) 1991,1990 Carnegie Mellon University
29 * All Rights Reserved.
30 *
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
36 *
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
40 *
41 * Carnegie Mellon requests users of this software to return to
42 *
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
47 *
48 * any improvements or extensions that they make and grant Carnegie Mellon
49 * the rights to redistribute these changes.
50 */
51
52 #include <i386/asm.h>
53 #include <i386/mp_slave_boot.h>
54 #include <i386/postcode.h>
55
56 #define CR0_PE_ON 0x1
57 #define CR0_PE_OFF 0xfffffffe
58
59 .file "slave_boot.s"
60
61 .text
62 .align 12 // Page align for single bcopy_phys()
63
64 #define LJMP(segment,address) \
65 .byte 0xea ;\
66 .long address-EXT(slave_boot_base) ;\
67 .word segment
68
69 #define LGDT(address) \
70 .word 0x010f ;\
71 .byte 0x15 ;\
72 .long address-EXT(slave_boot_base)
73
74 Entry(slave_boot_base)
75 /* code is loaded at 0x0:0x1000 */
76 /* ljmp to the next instruction to set up %cs */
77 data16
78 LJMP(MP_BOOTSEG, EXT(slave_pstart))
79
80 Entry(slave_pstart)
81 /* set up %ds */
82 mov %cs, %ax
83 mov %ax, %ds
84
85 POSTCODE(SLAVE_PSTART_ENTRY);
86
87 /* set up %ss and %esp */
88 data16
89 mov $(MP_BOOTSEG), %eax
90 mov %ax, %ss
91 data16
92 mov $(MP_BOOTSTACK), %esp
93
94 /*set up %es */
95 mov %ax, %es
96
97 /* change to protected mode */
98 data16
99 call EXT(real_to_prot)
100
101 push MP_MACH_START
102 call EXT(startprog)
103
104 /*
105 real_to_prot()
106 transfer from real mode to protected mode.
107 */
108
109 Entry(real_to_prot)
110 /* guarantee that interrupt is disabled when in prot mode */
111 cli
112
113 POSTCODE(REAL_TO_PROT_ENTRY);
114
115 /* load the gdtr */
116 addr16
117 data16
118 LGDT(EXT(gdtr))
119
120 /* load the gdtr */
121 /* set the PE bit of CR0 */
122 mov %cr0, %eax
123
124 data16
125 or $(CR0_PE_ON), %eax
126 mov %eax, %cr0
127
128 /* make intrasegment jump to flush the processor pipeline and */
129 /* reload CS register */
130 data16
131 LJMP(0x08, xprot)
132
133 xprot:
134
135 /* we are in USE32 mode now */
136 /* set up the protective mode segment registers : DS, SS, ES */
137 mov $0x10, %eax
138 movw %ax, %ds
139 movw %ax, %ss
140 movw %ax, %es
141
142 POSTCODE(REAL_TO_PROT_EXIT);
143
144 ret
145
146 /*
147 startprog(phyaddr)
148 start the program on protected mode where phyaddr is the entry point
149 */
150
151 Entry(startprog)
152 push %ebp
153 movl %esp, %ebp
154
155 POSTCODE(STARTPROG_ENTRY);
156
157 movl 0x8(%ebp), %ecx /* entry offset */
158 movl $0x28, %ebx /* segment */
159 push %ebx
160 push %ecx
161
162 /* set up %ds and %es */
163 movl $0x20, %ebx
164 movw %bx, %ds
165 movw %bx, %es
166
167 POSTCODE(STARTPROG_EXIT);
168
169 lret
170
171
172 . = MP_BOOTGDT-MP_BOOT /* GDT location */
173 Entry(Gdt)
174
175 /* Segment Descriptor
176 *
177 * 31 24 19 16 7 0
178 * ------------------------------------------------------------
179 * | | |B| |A| | | |1|0|E|W|A| |
180 * | BASE 31..24 |G|/|0|V| LIMIT |P|DPL| TYPE | BASE 23:16 |
181 * | | |D| |L| 19..16| | |1|1|C|R|A| |
182 * ------------------------------------------------------------
183 * | | |
184 * | BASE 15..0 | LIMIT 15..0 |
185 * | | |
186 * ------------------------------------------------------------
187 */
188 .word 0,0 /* 0x0 : null */
189 .byte 0,0,0,0
190
191 .word 0xffff,MP_BOOT /* 0x8 : boot code */
192 .byte 0,0x9e,0xcf,0
193
194 .word 0xffff,MP_BOOT /* 0x10 : boot data */
195 .byte 0,0x92,0xcf,0
196
197 .word 0xffff,MP_BOOT /* 0x18 : boot code, 16 bits */
198 .byte 0,0x9e,0x0,0
199
200 .word 0xffff,0 /* 0x20 : init data */
201 .byte 0,0x93,0xcf,0
202
203 .word 0xffff,0 /* 0x28 : init code */
204 .byte 0,0x9f,0xcf,0
205
206 Entry(gdtr)
207 .short 48 /* limit (8*6 segs) */
208 .short MP_BOOTGDT /* base low */
209 .short 0 /* base high */
210
211 Entry(slave_boot_end)
212
213
214
215
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