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2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
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26 * Mach Operating System
27 * Copyright (c) 1991 Carnegie Mellon University
28 * All Rights Reserved.
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
40 * Carnegie Mellon requests users of this software to return to
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
58 * Macro definitions for routines to manipulate the
59 * floating-point processor.
62 #include <i386/proc_reg.h>
63 #include <i386/thread.h>
64 #include <kern/kern_types.h>
65 #include <mach/i386/kern_return.h>
66 #include <mach/i386/thread_status.h>
72 __asm__ volatile("fninit")
74 #define fnstcw(control) \
75 __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
77 #define fldcw(control) \
78 __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
80 extern unsigned short fnstsw(void);
82 extern __inline__
unsigned short fnstsw(void)
84 unsigned short status
;
85 __asm__
volatile("fnstsw %0" : "=ma" (status
));
90 __asm__ volatile("fnclex")
92 #define fnsave(state) \
93 __asm__ volatile("fnsave %0" : "=m" (*state))
95 #define frstor(state) \
96 __asm__ volatile("frstor %0" : : "m" (state))
101 #define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
102 #define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
104 #define FXSAFE() (fp_kind == FP_FXSR)
106 #define fpu_load_context(pcb)
109 * Save thread`s FPU context.
110 * If only one CPU, we just set the task-switched bit,
111 * to keep the new thread from using the coprocessor.
112 * If multiple CPUs, we save the entire state.
113 * NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
114 * FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working
116 #define fpu_save_context(thread) \
118 register struct i386_fpsave_state *ifps; \
119 ifps = (thread)->machine.pcb->ims.ifps; \
120 if (ifps != 0 && !ifps->fp_valid) { \
121 /* registers are in FPU - save to memory */ \
122 ifps->fp_valid = TRUE; \
123 ifps->fp_save_flavor = FP_387; \
125 fxsave(&ifps->fx_save_state); \
126 ifps->fp_save_flavor = FP_FXSR; \
128 fnsave(&ifps->fp_save_state); \
137 extern void init_fpu(void);
138 extern void fpu_module_init(void);
139 extern void fpu_free(
140 struct i386_fpsave_state
* fps
);
141 extern kern_return_t
fpu_set_state(
143 struct i386_float_state
* st
);
144 extern kern_return_t
fpu_get_state(
146 struct i386_float_state
* st
);
147 extern kern_return_t
fpu_set_fxstate(
149 struct i386_float_state
* st
);
150 extern kern_return_t
fpu_get_fxstate(
152 struct i386_float_state
* st
);
153 extern void fpnoextflt(void);
154 extern void fpextovrflt(void);
155 extern void fpexterrflt(void);
156 extern void fp_state_alloc(void);
157 extern void fpintr(void);
158 extern void fpflush(thread_t
);
160 #endif /* _I386_FPU_H_ */