osfmk/ppc/Diagnostics.c

   1 /*
   2  * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*
  29  * @OSF_FREE_COPYRIGHT@
  30  */
  31 /*
  32  * @APPLE_FREE_COPYRIGHT@
  33  */
  34
  35 /*
  36  *      Author: Bill Angell, Apple
  37  *      Date:   9/auht-aught
  38  *
  39  * Random diagnostics
  40  */
  41
  42
  43 #include <kern/machine.h>
  44 #include <kern/processor.h>
  45 #include <mach/machine.h>
  46 #include <mach/processor_info.h>
  47 #include <mach/mach_types.h>
  48 #include <mach/boolean.h>
  49 #include <kern/thread.h>
  50 #include <kern/task.h>
  51 #include <kern/ipc_kobject.h>
  52 #include <mach/vm_param.h>
  53 #include <ipc/port.h>
  54 #include <ipc/ipc_entry.h>
  55 #include <ipc/ipc_space.h>
  56 #include <ipc/ipc_object.h>
  57 #include <ipc/ipc_port.h>
  58 #include <vm/vm_kern.h>
  59 #include <vm/vm_map.h>
  60 #include <vm/vm_page.h>
  61 #include <vm/pmap.h>
  62 #include <ppc/cpu_internal.h>
  63 #include <ppc/exception.h>
  64 #include <ppc/Firmware.h>
  65 #include <ppc/low_trace.h>
  66 #include <ppc/db_low_trace.h>
  67 #include <ppc/mappings.h>
  68 #include <ppc/pmap.h>
  69 #include <ppc/mem.h>
  70 #include <ppc/savearea.h>
  71 #include <ppc/Diagnostics.h>
  72 #include <pexpert/pexpert.h>
  73 #include <console/video_console.h>
  74 #include <ppc/trap.h>
  75
  76 extern struct vc_info vinfo;
  77 extern uint32_t warFlags;
  78 #define warDisMBpoff    0x80000000
  79
  80 kern_return_t testPerfTrap(int trapno, struct savearea *ss,
  81         unsigned int dsisr, addr64_t dar);
  82
  83
  84 int diagCall(struct savearea *save) {
  85
  86         union {
  87                 unsigned long long tbase;
  88                 unsigned int tb[2];
  89         } ttt, adj;
  90         natural_t tbu, tbu2, tbl;
  91         struct per_proc_info *per_proc;                                 /* Area for my per_proc address */
  92         int cpu, ret, subc;
  93         unsigned int tstrt, tend, temp, temp2, *baddr, oldwar;
  94         addr64_t src, snk;
  95         uint64_t scom, hid1, hid4, srrwrk, stat;
  96         scomcomm sarea;
  97         ipc_port_t port;
  98         ipc_entry_t ientry;
  99         processor_t prssr;
 100         vm_address_t addrs;
 101
 102
 103         if(!(dgWork.dgFlags & enaDiagSCs)) return 0;    /* If not enabled, cause an exception */
 104
 105         switch(save->save_r3) {                                                 /* Select the routine */
 106
 107 /*
 108  *              Adjust the timebase for drift recovery testing
 109  */
 110                 case dgAdjTB:                                                           /* Adjust the timebase */
 111
 112                         adj.tb[0] = 0;                                                  /* Clear high part */
 113                         adj.tb[1] = save->save_r4;                              /* Set low order */
 114                         if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF;      /* Propagate sign bit */
 115
 116                         do {                                                                    /* Read current time */
 117                                 asm volatile("  mftbu %0" : "=r" (tbu));
 118                                 asm volatile("  mftb %0" : "=r" (tbl));
 119                                 asm volatile("  mftbu %0" : "=r" (tbu2));
 120                         } while (tbu != tbu2);
 121
 122                         ttt.tb[0] = tbu;                                                /* Set high */
 123                         ttt.tb[1] = tbl;                                                /* Set low */
 124
 125                         ttt.tbase = ttt.tbase + adj.tbase;              /* Increment or decrement the TB */
 126
 127                         tbu = ttt.tb[0];                                                /* Save in regular variable */
 128                         tbl = ttt.tb[1];                                                /* Save in regular variable */
 129
 130                         mttb(0);                                                                /* Set low to keep from ticking */
 131                         mttbu(tbu);                                                             /* Set adjusted high */
 132                         mttb(tbl);                                                              /* Set adjusted low */
 133
 134                         return -1;                                                              /* Return no AST checking... */
 135
 136 /*
 137  *              Return physical address of a page
 138  */
 139                 case dgLRA:
 140
 141                         save->save_r3 = pmap_find_phys(current_thread()->map->pmap, save->save_r4);     /* Get read address */
 142
 143                         return -1;                                                              /* Return no AST checking... */
 144
 145 /*
 146  *              Copy physical to virtual
 147  */
 148                 case dgpcpy:
 149
 150
 151 #if 1
 152                         src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5);  /* Merge into 64-bit */
 153                         snk = (save->save_r6 << 32) | (0x00000000FFFFFFFFULL & save->save_r7);  /* Merge into 64-bit */
 154                         save->save_r3 = copypv(src, snk, save->save_r8, save->save_r9); /* Copy the physical page */
 155 #endif
 156                         return 1;                                                               /* Return and check for ASTs... */
 157
 158 /*
 159  *              Read/Write physical memory
 160  */
 161                 case dgprw:
 162
 163                         src = (save->save_r5 << 32) | (0x00000000FFFFFFFFULL & save->save_r6);  /* Merge into 64-bit */
 164
 165                         switch(save->save_r4) {                                 /* Select the actual function */
 166
 167                                 case 0:
 168                                         save->save_r3 = (uint64_t)ml_phys_read_byte((unsigned int)src);
 169                                         break;
 170
 171                                 case 1:
 172                                         save->save_r3 = (uint64_t)ml_phys_read_byte_64(src);
 173                                         break;
 174
 175                                 case 2:
 176                                         save->save_r3 = (uint64_t)ml_phys_read((unsigned int)src);
 177                                         break;
 178
 179                                 case 3:
 180                                         save->save_r3 = (uint64_t)ml_phys_read_64(src);
 181                                         break;
 182
 183                                 case 4:
 184                                         ml_phys_write_byte((unsigned int)src, (unsigned int)save->save_r7);
 185                                         break;
 186
 187                                 case 5:
 188                                         ml_phys_write_byte_64(src, (unsigned int)save->save_r7);
 189                                         break;
 190
 191                                 case 6:
 192                                         ml_phys_write((unsigned int)src, (unsigned int)save->save_r7);
 193                                         break;
 194
 195                                 case 7:
 196                                         ml_phys_write_64(src, (unsigned int)save->save_r7);
 197                                         break;
 198                         }
 199
 200                         return 1;                                                               /* Return and check for ASTs... */
 201
 202
 203 /*
 204  *              Soft reset processor
 205  */
 206                 case dgreset:
 207
 208                         cpu = save->save_r4;                                    /* Get the requested CPU number */
 209
 210                         if(cpu >= MAX_CPUS) {                                           /* Check for bogus cpu */
 211                                 save->save_r3 = KERN_FAILURE;           /* Set failure */
 212                                 return 1;
 213                         }
 214
 215                         per_proc = PerProcTable[cpu].ppe_vaddr;         /* Point to the processor */
 216                         if(!per_proc->running) return KERN_FAILURE;     /* It is not running */
 217
 218
 219                         (void)PE_cpu_start(per_proc->cpu_id,
 220                                                 per_proc->start_paddr, (vm_offset_t)per_proc);
 221
 222                         save->save_r3 = KERN_SUCCESS;                   /* Set scuuess */
 223
 224                         return 1;                                                               /* Return and check for ASTs... */
 225
 226 /*
 227  *              Force cache flush
 228  */
 229                 case dgFlush:
 230
 231                         cacheInit();                                                    /* Blow cache */
 232                         return 1;                                                               /* Return and check for ASTs... */
 233
 234 /*
 235  *              various hack tests
 236  */
 237                 case dgtest:
 238
 239                         kprintf("Trying to hang\n");
 240                         baddr = (unsigned int)&baddr | 1;               /* Make an odd address */
 241                         __asm__ volatile("lwarx r2,0,%0" : : "r" (baddr));
 242                         kprintf("Didn't hang\n");
 243
 244                         return 1;                                                               /* Return and check for ASTs... */
 245
 246
 247
 248 /*
 249  *              Create a physical block map into the current task
 250  *              Don't bother to check for any errors.
 251  *              parms - vaddr, paddr, size, prot, attributes
 252  */
 253                 case dgBMphys:
 254
 255                         pmap_map_block(current_thread()->map->pmap, (addr64_t)save->save_r4,    /* Map in the block */
 256                                 save->save_r5, save->save_r6, save->save_r7, save->save_r8, 0);
 257
 258                         return 1;                                                               /* Return and check for ASTs... */
 259
 260
 261 /*
 262  *              Remove any mapping from the current task
 263  *              Don't bother to check for any errors.
 264  *              parms - vaddr
 265  */
 266                 case dgUnMap:
 267
 268                         (void)mapping_remove(current_thread()->map->pmap, save->save_r4);       /* Remove mapping */
 269                         return 1;                                                               /* Return and check for ASTs... */
 270
 271
 272 /*
 273  *              Allows direct control of alignment handling.
 274  *
 275  *              The bottom bit of the parameter is used to set the control bit, enaNotifyEM.
 276  */
 277                 case dgAlign:
 278
 279                         temp = dgWork.dgFlags;                          /* Save the old values */
 280
 281                         temp2 = (save->save_r4 & 1) << (31 - enaNotifyEMb);     /* Move parms into flag format */
 282                         dgWork.dgFlags = (temp & ~enaNotifyEM) | temp2; /* Set the flag */
 283
 284                         save->save_r3 = (temp >> (31 - enaNotifyEMb)) & 1;      /* Return the original */
 285
 286                         return 1;                                                               /* Return and check for ASTs... */
 287
 288 /*
 289  *              Return info for boot screen
 290  */
 291                 case dgBootScreen:
 292
 293                         ml_set_interrupts_enabled(1);
 294                         (void)copyout((char *)&vinfo, save->save_r4, sizeof(struct vc_info));   /* Copy out the video info */
 295                         ml_set_interrupts_enabled(0);
 296                         return 1;                                                               /* Return and check for ASTs... */
 297
 298 /*
 299  *              Don't return info for boot screen
 300  */
 301                 case dgCPNull:
 302
 303                         ml_set_interrupts_enabled(1);
 304                         (void)copyout((char *)&vinfo, save->save_r4, 0);        /* Copy out nothing */
 305                         ml_set_interrupts_enabled(0);
 306                         return 1;                                                               /* Return and check for ASTs... */
 307
 308 /*
 309  *              Test machine check handler - only on 64-bit machines
 310  */
 311                 case dgmck:
 312                         if(!(PerProcTable[0].ppe_vaddr->pf.Available & pf64Bit)) return 0;      /* Leave if not correct machine */
 313
 314                         fwEmMck(save->save_r4, save->save_r5, save->save_r6, save->save_r7, save->save_r8, save->save_r9);      /* Start injecting */
 315
 316                         return -1;                                                              /* Return and don't check for ASTs... */
 317
 318 /*
 319  *              Set 64-bit on or off - only on 64-bit machines
 320  */
 321                 case dg64:
 322                         if(!(PerProcTable[0].ppe_vaddr->pf.Available & pf64Bit)) return 0;      /* Leave if not correct machine */
 323
 324                         srrwrk = save->save_srr1 >> 63;                 /* Save the old 64-bit bit */
 325
 326                         save->save_srr1 = (save->save_srr1 & 0x7FFFFFFFFFFFFFFFULL) | (save->save_r4 << 63);    /* Set the requested mode */
 327                         save->save_r3 = srrwrk;                                 /* Return the old value */
 328
 329                         task_clear_64BitAddr(current_thread()->task);
 330                         if((save->save_r4 & 1)) task_set_64BitAddr(current_thread()->task);
 331
 332                         return -1;                                                              /* Return and don't check for ASTs... */
 333
 334 /*
 335  *              Test the probe read function
 336  */
 337
 338                 case dgProbeRead:
 339
 340                         src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5);  /* Merge into 64-bit */
 341                         save->save_r3 = ml_probe_read_64(src, &temp);   /* Try the address */
 342                         save->save_r4 = temp;                                   /* Return the data */
 343                         return -1;                                                              /* Regurn and don't check for ASTs */
 344
 345 /*
 346  *              Do perf monitor stuff
 347  */
 348
 349                 case dgPerfMon:
 350
 351                         setPmon(save->save_r4, save->save_r5);  /* Go load up MMCR0 and MMCR1 */
 352                         return -1;                                                              /* Regurn and don't check for ASTs */
 353
 354 /*
 355  *              Map a page
 356  *              Don't bother to check for any errors.
 357  *              parms - vaddr, paddr, prot, attributes
 358  */
 359                 case dgMapPage:
 360
 361                         (void)mapping_make(current_thread()->map->pmap, /* Map in the page */
 362                                 (addr64_t)(((save->save_r5 & 0xFFFFFFFF) << 32) | (save->save_r5 & 0xFFFFFFFF)), save->save_r6, 0, 1, VM_PROT_READ|VM_PROT_WRITE);
 363
 364                         return -1;                                                              /* Return and check for ASTs... */
 365
 366 /*
 367  *              SCOM interface
 368  *              parms - pointer to scomcomm
 369  */
 370                 case dgScom:
 371
 372                         ret = copyin(save->save_r4, (void *)&sarea, sizeof(scomcomm));  /* Get the data */
 373                         if(ret) return 0;                                               /* Copyin failed - return an exception */
 374
 375                         sarea.scomstat = 0xFFFFFFFFFFFFFFFFULL; /* Clear status */
 376                         cpu = cpu_number();                                             /* Get us */
 377
 378                         if((sarea.scomcpu < real_ncpus) && PerProcTable[sarea.scomcpu].ppe_vaddr->running) {
 379                                 if(sarea.scomcpu == cpu) {                      /* Is it us? */
 380                                         if(sarea.scomfunc) {                    /* Are we writing */
 381                                                 sarea.scomstat = ml_scom_write(sarea.scomreg, sarea.scomdata);  /* Write scom */
 382                                         }
 383                                         else {
 384                                                 sarea.scomstat = ml_scom_read(sarea.scomreg, &sarea.scomdata);  /* Read scom */
 385                                         }
 386                                 }
 387                                 else {                                                                  /* Otherwise, tell the other processor */
 388                                         (void)cpu_signal(sarea.scomcpu, SIGPcpureq, CPRQscom ,(unsigned int)&sarea);    /* Ask him to do this */
 389                                         (void)hw_cpu_sync((unsigned long)&sarea.scomstat, LockTimeOut); /* Wait for the other processor to get its temperature */
 390                                 }
 391                         }
 392
 393                         ret = copyout((void *)&sarea, save->save_r4, sizeof(scomcomm)); /* Get the data */
 394                         if(ret) return 0;                                               /* Copyin failed - return an exception */
 395
 396                         return -1;                                                              /* Return and check for ASTs... */
 397
 398 /*
 399  *              Bind current thread to a processor. Parm is processor port.  If port is 0, unbind.
 400  */
 401
 402                 case dgBind:
 403
 404                         if(save->save_r4 == 0) {                                /* Are we unbinding? */
 405                                 thread_bind(current_thread(), PROCESSOR_NULL);  /* Unbind us */
 406                                 save->save_r3 = KERN_SUCCESS;           /* Set success */
 407                                 return -1;                                                      /* Return and check asts */
 408                         }
 409
 410                         ret = ipc_right_lookup_write(current_space(), (mach_port_name_t)save->save_r4,
 411                                 &ientry);                                                       /* Look up the IPC entry */
 412
 413                         if(ret != KERN_SUCCESS) {                               /* Couldn't find it */
 414                                 save->save_r3 = ret;                            /* Pass back return */
 415                                 return -1;                                                      /* Return and check asts */
 416                         }
 417
 418                         port = (ipc_port_t)ientry->ie_object;   /* Get the actual port */
 419
 420                         if (!ip_active(port) || (ip_kotype(port) != IKOT_PROCESSOR)) {  /* Active and a processor? */
 421                                 is_write_unlock(current_space());       /* Unlock the space */
 422                                 save->save_r3 = KERN_INVALID_ARGUMENT;  /* This port is not a processor */
 423                                 return -1;                                                      /* Return and check asts */
 424                         }
 425
 426                         prssr = (processor_t)port->ip_kobject;  /* Extract the processor */
 427                         is_write_unlock(current_space());               /* All done with the space now, unlock it */
 428
 429 /*
 430  *                      The following probably isn't valid if a processor is in the processor going offline,
 431  *                      but who cares, this is a diagnostic interface...
 432  */
 433
 434                         if(prssr->state == PROCESSOR_SHUTDOWN) {        /* Are we trying to bind to an offline processor? */
 435                                 save->save_r3 = KERN_INVALID_ARGUMENT;  /* This processor is offline */
 436                                 return -1;                                                      /* Return and check asts */
 437                         }
 438
 439                         thread_bind(current_thread(), prssr);   /* Bind us to the processor */
 440                         thread_block(THREAD_CONTINUE_NULL);             /* Make it so */
 441
 442                         save->save_r3 = KERN_SUCCESS;                   /* Set success */
 443                         return -1;                                                              /* Return and check asts */
 444
 445 /*
 446  *              Return per_proc for the named processor.  Pass in a port.  Returns per_proc or 0 if failure
 447  */
 448
 449                 case dgPproc:
 450
 451                         ret = ipc_right_lookup_write(current_space(), (mach_port_name_t)save->save_r4,
 452                                 &ientry);                                                       /* Look up the IPC entry */
 453
 454                         if(ret != KERN_SUCCESS) {                               /* Couldn't find it */
 455                                 save->save_r3 = 0;                                      /* Pass back return */
 456                                 return -1;                                                      /* Return and check asts */
 457                         }
 458
 459                         port = (ipc_port_t)ientry->ie_object;   /* Get the actualy port */
 460
 461                         if (!ip_active(port) || (ip_kotype(port) != IKOT_PROCESSOR)) {  /* Active and a processor? */
 462                                 is_write_unlock(current_space());       /* Unlock the space */
 463                                 save->save_r3 = 0;                                      /* This port is not a processor */
 464                                 return -1;                                                      /* Return and check asts */
 465                         }
 466
 467                         prssr = (processor_t)port->ip_kobject;  /* Extract the processor */
 468                         is_write_unlock(current_space());               /* All done with the space now, unlock it */
 469
 470                         save->save_r3 = (uint64_t)PerProcTable[prssr->processor_data.slot_num].ppe_vaddr;       /* Pass back ther per proc */
 471                         return -1;                                                              /* Return and check asts */
 472
 473 /*
 474  *              Allocate contiguous memory in the kernel. Pass in size, pass back vaddr or 0 for error
 475  *              Note that this must be explicitly released by the user.  There is an "issue"
 476  *              if we try to allocate directly into the user: the contiguous area has a kernel wire
 477  *              on it.   If we terminate, we will hang waiting for wire to be released.  Ain't no
 478  *              way that will happen,  so we do it in the kernel and make them release it.  That way
 479  *              we will leak rather than hang.
 480  *
 481  */
 482                 case dgAcntg:
 483
 484                         addrs = 0;                                                              /* Clear just in case */
 485
 486                         ret = kmem_alloc_contig(kernel_map, &addrs, (vm_size_t)save->save_r4,
 487                                 PAGE_MASK, 0);                                          /* That which does not make us stronger, kills us... */
 488                         if(ret != KERN_SUCCESS) addrs = 0;              /* Pass 0 if error */
 489
 490                         save->save_r3 = (uint64_t)addrs;                /* Pass back whatever */
 491                         return -1;                                                              /* Return and check for ASTs... */
 492
 493
 494 /*
 495  *              Return physical address of a page in the kernel
 496  */
 497                 case dgKlra:
 498
 499                         save->save_r3 = pmap_find_phys(kernel_pmap, save->save_r4);     /* Get read address */
 500                         return -1;                                                              /* Return no AST checking... */
 501
 502 /*
 503  *              Release kernel memory - intent is to release congiguous memory
 504  */
 505                 case dgKfree:
 506
 507                         kmem_free( kernel_map, (vm_address_t) save->save_r4, (vm_size_t)save->save_r5);
 508                         return -1;                                                              /* Return no AST checking... */
 509
 510
 511                 case dgWar:                                                                     /* Set or reset workaround flags */
 512
 513                         save->save_r3 = (uint32_t)warFlags;             /* Get the old flags */
 514                         oldwar = warFlags;                                              /* Remember the old war flags */
 515
 516                         subc = (int32_t)save->save_r4;                  /* Extract the subcommand */
 517                         switch(subc) {                                                  /* Do what we need */
 518                                 case 1:                                                         /* Replace all */
 519                                         warFlags = (uint32_t)save->save_r5;     /* Do them all */
 520                                         break;
 521
 522                                 case 2:                                                         /* Turn on selected workarounds */
 523                                         warFlags = warFlags | (uint32_t)save->save_r5;
 524                                         break;
 525
 526                                 case 3:                                                         /* Turn off selected workarounds */
 527                                         warFlags = warFlags & ~((uint32_t)save->save_r5);
 528                                         break;
 529
 530                                 case 4:                                                         /* Start up selected workaround */
 531                                         break;
 532
 533                                 case 5:                                                         /* Stop selected workaround */
 534                                         break;
 535
 536                                 case 6:                                                         /* Reset specific workaround parameters to default */
 537                                         break;
 538
 539                                 case 7:                                                         /* Set workaround parameters */
 540                                         break;
 541
 542                                 default:
 543
 544                                         break;
 545
 546                         }
 547
 548                         save->save_r3 = oldwar;                                 /* Pass back original */
 549                         return -1;
 550
 551
 552                 default:                                                                        /* Handle invalid ones */
 553                         return 0;                                                               /* Return an exception */
 554
 555         }
 556
 557 };
 558
 559 kern_return_t testPerfTrap(int trapno, struct savearea *ss,
 560         unsigned int dsisr, addr64_t dar) {
 561
 562         if(trapno != T_ALIGNMENT) return KERN_FAILURE;
 563
 564         kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss->save_srr0,
 565                 ss->save_srr1, dsisr, dar);
 566
 567         return KERN_SUCCESS;
 568
 569 }
 570