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2 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
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29 #ifndef _I386_POSTCODE_H_
30 #define _I386_POSTCODE_H_
36 /* Define this to delay about 1 sec after posting each code */
37 /* #define POSTCODE_DELAY 1 */
39 /* The POSTCODE is port 0x80 */
42 #define SPINCOUNT 300000000
43 #define CPU_PAUSE() rep; nop
47 * Macro to output byte value to postcode, destoying register al.
48 * Additionally, if POSTCODE_DELAY, spin for about a second.
53 outb %al,$(POSTPORT); \
54 movl $(SPINCOUNT), %eax; \
62 #endif /* POSTCODE_DELAY */
64 #define POSTCODE(XX) \
68 /* Output byte value to postcode, without destoying register eax */
69 #define POSTCODE_SAVE_EAX(XX) \
75 * Display a 32-bit value to the post card - low byte to high byte
76 * Entry: value in %ebx
77 * Exit: %ebx preserved; %eax destroyed
79 #define POSTCODE32_EBX \
99 #define POSTCODE32_EBX
103 * The following postcodes are defined for stages of early startup:
106 #define _PSTART_ENTRY 0xFF
107 #define _PSTART_RELOC 0xFE
108 #define PSTART_ENTRY 0xFD
109 #define PSTART_PAGE_TABLES 0xFC
110 #define PSTART_BEFORE_PAGING 0xFB
111 #define VSTART_ENTRY 0xFA
112 #define VSTART_STACK_SWITCH 0xF9
113 #define VSTART_EXIT 0xF8
114 #define I386_INIT_ENTRY 0xF7
115 #define CPU_INIT_D 0xF6
116 #define PE_INIT_PLATFORM_D 0xF5
118 #define SLAVE_RSTART_ENTRY 0xEF
119 #define SLAVE_REAL_TO_PROT_ENTRY 0xEE
120 #define SLAVE_REAL_TO_PROT_EXIT 0xED
121 #define SLAVE_STARTPROG_ENTRY 0xEC
122 #define SLAVE_STARTPROG_EXIT 0xEB
123 #define SLAVE_PSTART_ENTRY 0xEA
124 #define SLAVE_PSTART_EXIT 0xE9
125 #define SLAVE_VSTART_ENTRY 0xE8
126 #define SLAVE_VSTART_DESC_INIT 0xE7
127 #define SLAVE_VSTART_STACK_SWITCH 0xE6
128 #define SLAVE_VSTART_EXIT 0xE5
129 #define I386_INIT_SLAVE 0xE4
131 #define PANIC_DOUBLE_FAULT 0xDF /* Double Fault exception */
132 #define PANIC_MACHINE_CHECK 0xDE /* Machine-Check */
133 #define MP_KDP_ENTER 0xDB /* Machine in kdp DeBugger */
134 #define PANIC_HLT 0xD1 /* Die an early death */
135 #define NO_64BIT 0x64 /* No 64-bit support yet */
137 #define ACPI_WAKE_START_ENTRY 0xCF
138 #define ACPI_WAKE_PROT_ENTRY 0xCE
139 #define ACPI_WAKE_PAGED_ENTRY 0xCD
141 #define CPU_IA32_ENABLE_ENTRY 0xBF
142 #define CPU_IA32_ENABLE_EXIT 0xBE
143 #define ML_LOAD_DESC64_ENTRY 0xBD
144 #define ML_LOAD_DESC64_GDT 0xBC
145 #define ML_LOAD_DESC64_IDT 0xBB
146 #define ML_LOAD_DESC64_LDT 0xBA
147 #define ML_LOAD_DESC64_EXIT 0xB9
148 #define CPU_IA32_DISABLE_ENTRY 0xB8
149 #define CPU_IA32_DISABLE_EXIT 0xB7
153 _postcode_delay(uint32_t spincount
)
155 asm volatile("1: \n\t"
159 : : "a" (spincount
));
162 _postcode(uint8_t xx
)
164 asm volatile("outb %0, %1" : : "a" (xx
), "N" (POSTPORT
));
172 _postcode_delay(SPINCOUNT
);
180 #endif /* _I386_POSTCODE_H_ */