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1 /*
2 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29 #ifndef _I386_POSTCODE_H_
30 #define _I386_POSTCODE_H_
31
32 #ifndef DEBUG
33 #include <debug.h>
34 #endif
35
36 /* Define this to delay about 1 sec after posting each code */
37 /* #define POSTCODE_DELAY 1 */
38
39 /* The POSTCODE is port 0x80 */
40 #define POSTPORT 0x80
41
42 #define SPINCOUNT 300000000
43 #define CPU_PAUSE() rep; nop
44
45 #if DEBUG
46 /*
47 * Macro to output byte value to postcode, destoying register al.
48 * Additionally, if POSTCODE_DELAY, spin for about a second.
49 */
50
51 #if POSTCODE_DELAY
52 #define POSTCODE_AL \
53 outb %al,$(POSTPORT); \
54 movl $(SPINCOUNT), %eax; \
55 1: \
56 CPU_PAUSE(); \
57 decl %eax; \
58 jne 1b
59 #else
60 #define POSTCODE_AL \
61 outb %al,$(POSTPORT)
62 #endif /* POSTCODE_DELAY */
63
64 #define POSTCODE(XX) \
65 mov $(XX), %al; \
66 POSTCODE_AL
67
68 /* Output byte value to postcode, without destoying register eax */
69 #define POSTCODE_SAVE_EAX(XX) \
70 push %eax; \
71 POSTCODE(XX); \
72 pop %eax
73
74 /*
75 * Display a 32-bit value to the post card - low byte to high byte
76 * Entry: value in %ebx
77 * Exit: %ebx preserved; %eax destroyed
78 */
79 #define POSTCODE32_EBX \
80 roll $8, %ebx; \
81 movl %ebx, %eax; \
82 POSTCODE_AL; \
83 \
84 roll $8, %ebx; \
85 movl %ebx, %eax; \
86 POSTCODE_AL; \
87 \
88 roll $8, %ebx; \
89 movl %ebx, %eax; \
90 POSTCODE_AL; \
91 \
92 roll $8, %ebx; \
93 movl %ebx, %eax; \
94 POSTCODE_AL
95
96 #else /* DEBUG */
97 #define POSTCODE_AL
98 #define POSTCODE(X)
99 #define POSTCODE32_EBX
100 #endif /* DEBUG */
101
102 /*
103 * The following postcodes are defined for stages of early startup:
104 */
105
106 #define _PSTART_ENTRY 0xFF
107 #define _PSTART_RELOC 0xFE
108 #define PSTART_ENTRY 0xFD
109 #define PSTART_PAGE_TABLES 0xFC
110 #define PSTART_BEFORE_PAGING 0xFB
111 #define VSTART_ENTRY 0xFA
112 #define VSTART_STACK_SWITCH 0xF9
113 #define VSTART_EXIT 0xF8
114 #define I386_INIT_ENTRY 0xF7
115 #define CPU_INIT_D 0xF6
116 #define PE_INIT_PLATFORM_D 0xF5
117
118 #define SLAVE_RSTART_ENTRY 0xEF
119 #define SLAVE_REAL_TO_PROT_ENTRY 0xEE
120 #define SLAVE_REAL_TO_PROT_EXIT 0xED
121 #define SLAVE_STARTPROG_ENTRY 0xEC
122 #define SLAVE_STARTPROG_EXIT 0xEB
123 #define SLAVE_PSTART_ENTRY 0xEA
124 #define SLAVE_PSTART_EXIT 0xE9
125 #define SLAVE_VSTART_ENTRY 0xE8
126 #define SLAVE_VSTART_DESC_INIT 0xE7
127 #define SLAVE_VSTART_STACK_SWITCH 0xE6
128 #define SLAVE_VSTART_EXIT 0xE5
129 #define I386_INIT_SLAVE 0xE4
130
131 #define PANIC_DOUBLE_FAULT 0xDF /* Double Fault exception */
132 #define PANIC_MACHINE_CHECK 0xDE /* Machine-Check */
133 #define MP_KDP_ENTER 0xDB /* Machine in kdp DeBugger */
134 #define PANIC_HLT 0xD1 /* Die an early death */
135 #define NO_64BIT 0x64 /* No 64-bit support yet */
136
137 #define ACPI_WAKE_START_ENTRY 0xCF
138 #define ACPI_WAKE_PROT_ENTRY 0xCE
139 #define ACPI_WAKE_PAGED_ENTRY 0xCD
140
141 #define CPU_IA32_ENABLE_ENTRY 0xBF
142 #define CPU_IA32_ENABLE_EXIT 0xBE
143 #define ML_LOAD_DESC64_ENTRY 0xBD
144 #define ML_LOAD_DESC64_GDT 0xBC
145 #define ML_LOAD_DESC64_IDT 0xBB
146 #define ML_LOAD_DESC64_LDT 0xBA
147 #define ML_LOAD_DESC64_EXIT 0xB9
148 #define CPU_IA32_DISABLE_ENTRY 0xB8
149 #define CPU_IA32_DISABLE_EXIT 0xB7
150
151 #ifndef ASSEMBLER
152 inline static void
153 _postcode_delay(uint32_t spincount)
154 {
155 asm volatile("1: \n\t"
156 " rep; nop; \n\t"
157 " decl %%eax; \n\t"
158 " jne 1b"
159 : : "a" (spincount));
160 }
161 inline static void
162 _postcode(uint8_t xx)
163 {
164 asm volatile("outb %0, %1" : : "a" (xx), "N" (POSTPORT));
165 }
166 #if DEBUG
167 inline static void
168 postcode(uint8_t xx)
169 {
170 _postcode(xx);
171 #if POSTCODE_DELAY
172 _postcode_delay(SPINCOUNT);
173 #endif
174 }
175 #else
176 #define postcode(xx)
177 #endif
178 #endif
179
180 #endif /* _I386_POSTCODE_H_ */