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1 /*
2 * Copyright (c) 2005-2006 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29 #include <string.h>
30 #include <mach/vm_param.h>
31 #include <mach/vm_prot.h>
32 #include <mach/machine.h>
33 #include <mach/time_value.h>
34 #include <kern/spl.h>
35 #include <kern/assert.h>
36 #include <kern/debug.h>
37 #include <kern/misc_protos.h>
38 #include <kern/startup.h>
39 #include <kern/clock.h>
40 #include <kern/cpu_data.h>
41 #include <kern/processor.h>
42 #include <vm/vm_page.h>
43 #include <vm/pmap.h>
44 #include <vm/vm_kern.h>
45 #include <i386/pmap.h>
46 #include <i386/misc_protos.h>
47 #include <i386/cpuid.h>
48 #include <i386/mp.h>
49 #include <i386/machine_cpu.h>
50 #include <i386/machine_routines.h>
51 #include <i386/io_map_entries.h>
52 #include <architecture/i386/pio.h>
53 #include <i386/cpuid.h>
54 #include <i386/apic.h>
55 #include <i386/tsc.h>
56 #include <i386/hpet.h>
57 #include <i386/pmCPU.h>
58 #include <pexpert/device_tree.h>
59 #if MACH_KDB
60 #include <ddb/db_aout.h>
61 #include <ddb/db_access.h>
62 #include <ddb/db_sym.h>
63 #include <ddb/db_variables.h>
64 #include <ddb/db_command.h>
65 #include <ddb/db_output.h>
66 #include <ddb/db_expr.h>
67 #endif /* MACH_KDB */
68 #include <ddb/tr.h>
69
70 /* Decimal powers: */
71 #define kilo (1000ULL)
72 #define Mega (kilo * kilo)
73 #define Giga (kilo * Mega)
74 #define Tera (kilo * Giga)
75 #define Peta (kilo * Tera)
76
77 uint32_t hpetArea = 0;
78 uint32_t hpetAreap = 0;
79 uint64_t hpetFemto = 0;
80 uint64_t hpetFreq = 0;
81 uint64_t hpetCvt = 0; /* (TAKE OUT LATER) */
82 uint64_t hpetCvtt2n = 0;
83 uint64_t hpetCvtn2t = 0;
84 uint64_t tsc2hpet = 0;
85 uint64_t hpet2tsc = 0;
86 uint64_t bus2hpet = 0;
87 uint64_t hpet2bus = 0;
88
89 uint32_t rcbaArea = 0;
90 uint32_t rcbaAreap = 0;
91
92 #if DEBUG
93 #define DBG(x...) kprintf("DBG: " x)
94 #else
95 #define DBG(x...)
96 #endif
97
98 /*
99 * Map the RCBA area.
100 */
101 static void
102 map_rcbaArea(void)
103 {
104 /*
105 * Get RCBA area physical address and map it
106 */
107 outl(cfgAdr, lpcCfg | (0xF0 & 0xFC));
108 rcbaAreap = inl(cfgDat | (0xF0 & 0x03));
109 rcbaArea = io_map_spec(rcbaAreap & -4096, PAGE_SIZE * 4, VM_WIMG_IO);
110 kprintf("RCBA: vaddr = %08X, paddr = %08X\n", rcbaArea, rcbaAreap);
111 }
112
113 /*
114 * Initialize the HPET
115 */
116 void
117 hpet_init(void)
118 {
119 unsigned int *xmod;
120
121 map_rcbaArea();
122
123 /*
124 * Is the HPET memory already enabled?
125 * If not, set address and enable.
126 */
127 xmod = (uint32_t *)(rcbaArea + 0x3404); /* Point to the HPTC */
128 uint32_t hptc = *xmod; /* Get HPET config */
129 DBG(" current RCBA.HPTC: %08X\n", *xmod);
130 if(!(hptc & hptcAE)) {
131 DBG("HPET memory is not enabled, "
132 "enabling and assigning to 0xFED00000 (hope that's ok)\n");
133 *xmod = (hptc & ~3) | hptcAE;
134 }
135
136 /*
137 * Get physical address of HPET and map it.
138 */
139 hpetAreap = hpetAddr | ((hptc & 3) << 12);
140 hpetArea = io_map_spec(hpetAreap & -4096, PAGE_SIZE * 4, VM_WIMG_IO);
141 kprintf("HPET: vaddr = %08X, paddr = %08X\n", hpetArea, hpetAreap);
142
143 /*
144 * Extract the HPET tick rate.
145 * The period of the HPET is reported in femtoseconds (10**-15s)
146 * and convert to frequency in hertz.
147 */
148 hpetFemto = (uint32_t)(((hpetReg_t *)hpetArea)->GCAP_ID >> 32);
149 hpetFreq = (1 * Peta) / hpetFemto;
150
151 /*
152 * The conversion factor is the number of nanoseconds per HPET tick
153 * with about 32 bits of fraction. The value is converted to a
154 * base-2 fixed point number. To convert from HPET to nanoseconds,
155 * multiply the value by the conversion factor using 96-bit arithmetic,
156 * then shift right 32 bits. If the value is known to be small,
157 * 64-bit arithmetic will work.
158 */
159
160 /*
161 * Begin conversion of base 10 femtoseconds to base 2, calculate:
162 * - HPET ticks to nanoseconds conversion in base 2 fraction (* 2**32)
163 * - nanoseconds to HPET ticks conversion
164 */
165 hpetCvtt2n = (uint64_t)hpetFemto << 32;
166 hpetCvtt2n = hpetCvtt2n / 1000000ULL;
167 hpetCvtn2t = 0xFFFFFFFFFFFFFFFFULL / hpetCvtt2n;
168 kprintf("HPET: Frequency = %6d.%04dMHz, "
169 "cvtt2n = %08X.%08X, cvtn2t = %08X.%08X\n",
170 (uint32_t)(hpetFreq / Mega), (uint32_t)(hpetFreq % Mega),
171 (uint32_t)(hpetCvtt2n >> 32), (uint32_t)hpetCvtt2n,
172 (uint32_t)(hpetCvtn2t >> 32), (uint32_t)hpetCvtn2t);
173
174
175 /* (TAKE OUT LATER)
176 * Begin conversion of base 10 femtoseconds to base 2
177 * HPET ticks to nanoseconds in base 2 fraction (times 1048576)
178 */
179 hpetCvt = (uint64_t)hpetFemto << 20;
180 hpetCvt = hpetCvt / 1000000ULL;
181
182 /* Calculate conversion from TSC to HPET */
183 tsc2hpet = tmrCvt(tscFCvtt2n, hpetCvtn2t);
184 DBG(" CVT: TSC to HPET = %08X.%08X\n",
185 (uint32_t)(tsc2hpet >> 32), (uint32_t)tsc2hpet);
186
187 /* Calculate conversion from HPET to TSC */
188 hpet2tsc = tmrCvt(hpetCvtt2n, tscFCvtn2t);
189 DBG(" CVT: HPET to TSC = %08X.%08X\n",
190 (uint32_t)(hpet2tsc >> 32), (uint32_t)hpet2tsc);
191
192 /* Calculate conversion from BUS to HPET */
193 bus2hpet = tmrCvt(busFCvtt2n, hpetCvtn2t);
194 DBG(" CVT: BUS to HPET = %08X.%08X\n",
195 (uint32_t)(bus2hpet >> 32), (uint32_t)bus2hpet);
196
197 /* Calculate conversion from HPET to BUS */
198 hpet2bus = tmrCvt(hpetCvtt2n, busFCvtn2t);
199 DBG(" CVT: HPET to BUS = %08X.%08X\n",
200 (uint32_t)(hpet2bus >> 32), (uint32_t)hpet2bus);
201
202 /* Make sure the counter is off in the HPET configuration flags */
203 uint64_t hpetcon = ((hpetReg_t *)hpetArea)->GEN_CONF;
204 hpetcon = hpetcon & ~1;
205 ((hpetReg_t *)hpetArea)->GEN_CONF = hpetcon;
206
207 /*
208 * Convert current TSC to HPET value,
209 * set it, and start it ticking.
210 */
211 uint64_t currtsc = rdtsc64();
212 uint64_t tscInHPET = tmrCvt(currtsc, tsc2hpet);
213 ((hpetReg_t *)hpetArea)->MAIN_CNT = tscInHPET;
214 hpetcon = hpetcon | 1;
215 ((hpetReg_t *)hpetArea)->GEN_CONF = hpetcon;
216 kprintf("HPET started: TSC = %08X.%08X, HPET = %08X.%08X\n",
217 (uint32_t)(currtsc >> 32), (uint32_t)currtsc,
218 (uint32_t)(tscInHPET >> 32), (uint32_t)tscInHPET);
219
220 #if MACH_KDB
221 db_display_hpet((hpetReg_t *)hpetArea); /* (BRINGUP) */
222 #endif
223 }
224
225 /*
226 * This routine is used to get various information about the HPET
227 * without having to export gobs of globals. It fills in a data
228 * structure with the info.
229 */
230 void
231 hpet_get_info(hpetInfo_t *info)
232 {
233 info->hpetCvtt2n = hpetCvtt2n;
234 info->hpetCvtn2t = hpetCvtn2t;
235 info->tsc2hpet = tsc2hpet;
236 info->hpet2tsc = hpet2tsc;
237 info->bus2hpet = bus2hpet;
238 info->hpet2bus = hpet2bus;
239 info->rcbaArea = rcbaArea;
240 info->rcbaAreap = rcbaAreap;
241 }
242
243
244 /*
245 * This routine is called by the HPET driver
246 * when it assigns an HPET timer to a processor
247 */
248
249 void
250 ml_hpet_cfg(uint32_t cpu, uint32_t hpetVect)
251 {
252 uint64_t *hpetVaddr;
253 uint64_t hpetcnf;
254
255 if(cpu > 1) {
256 panic("ml_hpet_cfg: invalid cpu = %d\n", cpu);
257 }
258
259 /* Calculate address of the HPET for this processor */
260 hpetVaddr = (uint64_t *)(((uint32_t)&(((hpetReg_t *)hpetArea)->TIM1_CONF)) + (cpu << 5));
261
262 DBG("ml_hpet_cfg: HPET for cpu %d at %08X, vector = %d\n",
263 cpu, hpetVaddr, hpetVect);
264
265 /* Save the address and vector of the HPET for this processor */
266 cpu_data_ptr[cpu]->cpu_pmHpet = (uint64_t *)hpetVaddr;
267 cpu_data_ptr[cpu]->cpu_pmHpetVec = hpetVect;
268
269 /* Enable the interruptions now that we have a vector */
270 hpetcnf = *hpetVaddr;
271 hpetcnf = hpetcnf | Tn_INT_ENB_CNF;
272 *hpetVaddr = hpetcnf;
273
274 /* Save the configuration */
275 cpu_data_ptr[cpu]->cpu_pmStats.pmHpetCfg = hpetcnf;
276 cpu_data_ptr[cpu]->cpu_pmStats.pmHpetCmp = 0;
277
278 /* See if nap policy has changed now */
279 machine_nap_policy();
280
281 }
282
283 /*
284 * This is the HPET interrupt handler.
285 *
286 * We really don't want to be here, but so far, I haven't figured out
287 * a way to cancel the interrupt. Hopefully, some day we will figure out
288 * how to do that or switch all timers to the HPET.
289 */
290 int
291 HPETInterrupt(void)
292 {
293
294 /* All we do here is to bump the count */
295 current_cpu_datap()->cpu_pmStats.pmHPETRupt++;
296
297 /* Return and show that the 'rupt has been handled... */
298 return 1;
299 }
300
301
302 static hpetReg_t saved_hpet;
303
304 void hpet_save( void )
305 {
306 hpetReg_t *from = (hpetReg_t *) hpetArea;
307 hpetReg_t *to = &saved_hpet;
308
309 to->GEN_CONF = from->GEN_CONF;
310 to->TIM0_CONF = from->TIM0_CONF;
311 to->TIM0_COMP = from->TIM0_COMP;
312 to->TIM1_CONF = from->TIM1_CONF;
313 to->TIM1_COMP = from->TIM1_COMP;
314 to->TIM2_CONF = from->TIM2_CONF;
315 to->TIM2_COMP = from->TIM2_COMP;
316 to->MAIN_CNT = from->MAIN_CNT;
317 }
318
319 void hpet_restore( void )
320 {
321 hpetReg_t *from = &saved_hpet;
322 hpetReg_t *to = (hpetReg_t *) hpetArea;
323
324 /*
325 * Is the HPET memory already enabled?
326 * If not, set address and enable.
327 */
328 uint32_t *hptcp = (uint32_t *)(rcbaArea + 0x3404);
329 uint32_t hptc = *hptcp;
330 if(!(hptc & hptcAE)) {
331 DBG("HPET memory is not enabled, "
332 "enabling and assigning to 0xFED00000 (hope that's ok)\n");
333 *hptcp = (hptc & ~3) | hptcAE;
334 }
335
336 to->GEN_CONF = from->GEN_CONF & ~1;
337
338 to->TIM0_CONF = from->TIM0_CONF;
339 to->TIM0_COMP = from->TIM0_COMP;
340 to->TIM1_CONF = from->TIM1_CONF;
341 to->TIM1_COMP = from->TIM1_COMP;
342 to->TIM2_CONF = from->TIM2_CONF;
343 to->TIM2_COMP = from->TIM2_COMP;
344 to->GINTR_STA = -1ULL;
345 to->MAIN_CNT = from->MAIN_CNT;
346
347 to->GEN_CONF = from->GEN_CONF;
348 }
349
350 /*
351 * Read the HPET timer
352 *
353 */
354 uint64_t
355 rdHPET(void)
356 {
357 hpetReg_t *hpetp = (hpetReg_t *) hpetArea;
358 volatile uint32_t *regp = (uint32_t *) &hpetp->MAIN_CNT;
359 uint32_t high;
360 uint32_t low;
361
362 do {
363 high = *(regp + 1);
364 low = *regp;
365 } while (high != *(regp + 1));
366
367 return (((uint64_t) high) << 32) | low;
368 }
369
370 #if MACH_KDB
371
372 #define HI32(x) ((uint32_t)(((x) >> 32) & 0xFFFFFFFF))
373 #define LO32(x) ((uint32_t)((x) & 0xFFFFFFFF))
374
375 /*
376 * Displays HPET memory mapped area
377 * hp
378 */
379 void
380 db_hpet(__unused db_expr_t addr, __unused int have_addr, __unused db_expr_t count, __unused char *modif)
381 {
382
383 db_display_hpet((hpetReg_t *) hpetArea); /* Dump out the HPET
384 * stuff */
385 return;
386 }
387
388 void
389 db_display_hpet(hpetReg_t * hpt)
390 {
391
392 uint64_t cmain;
393
394 cmain = hpt->MAIN_CNT; /* Get the main timer */
395
396 /* General capabilities */
397 db_printf(" GCAP_ID = %08X.%08X\n",
398 HI32(hpt->GCAP_ID), LO32(hpt->GCAP_ID));
399 /* General configuration */
400 db_printf(" GEN_CONF = %08X.%08X\n",
401 HI32(hpt->GEN_CONF), LO32(hpt->GEN_CONF));
402 /* General Interrupt status */
403 db_printf("GINTR_STA = %08X.%08X\n",
404 HI32(hpt->GINTR_STA), LO32(hpt->GINTR_STA));
405 /* Main counter */
406 db_printf(" MAIN_CNT = %08X.%08X\n",
407 HI32(cmain), LO32(cmain));
408 /* Timer 0 config and cap */
409 db_printf("TIM0_CONF = %08X.%08X\n",
410 HI32(hpt->TIM0_CONF), LO32(hpt->TIM0_CONF));
411 /* Timer 0 comparator */
412 db_printf("TIM0_COMP = %08X.%08X\n",
413 HI32(hpt->TIM0_COMP), LO32(hpt->TIM0_COMP));
414 /* Timer 1 config and cap */
415 db_printf("TIM0_CONF = %08X.%08X\n",
416 HI32(hpt->TIM1_CONF), LO32(hpt->TIM1_CONF));
417 /* Timer 1 comparator */
418 db_printf("TIM1_COMP = %08X.%08X\n",
419 HI32(hpt->TIM1_COMP), LO32(hpt->TIM1_COMP));
420 /* Timer 2 config and cap */
421 db_printf("TIM2_CONF = %08X.%08X\n",
422 HI32(hpt->TIM2_CONF), LO32(hpt->TIM2_CONF));
423 /* Timer 2 comparator */
424 db_printf("TIM2_COMP = %08X.%08X\n",
425 HI32(hpt->TIM2_COMP), LO32(hpt->TIM2_COMP));
426
427 db_printf("\nHPET Frequency = %d.%05dMHz\n",
428 (uint32_t) (hpetFreq / 1000000), (uint32_t) (hpetFreq % 1000000));
429
430 return;
431
432 }
433
434 #endif