osfmk/x86_64/idt64.s

   1 /*
   2  * Copyright (c) 2010 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 #include <i386/asm.h>
  29 #include <assym.s>
  30 #include <debug.h>
  31 #include <i386/eflags.h>
  32 #include <i386/rtclock_asm.h>
  33 #include <i386/trap.h>
  34 #define _ARCH_I386_ASM_HELP_H_  /* Prevent inclusion of user header */
  35 #include <mach/i386/syscall_sw.h>
  36 #include <i386/postcode.h>
  37 #include <i386/proc_reg.h>
  38 #include <mach/exception_types.h>
  39
  40 #if DEBUG
  41 #define DEBUG_IDT64             1
  42 #endif
  43
  44 /*
  45  * This is the low-level trap and interrupt handling code associated with
  46  * the IDT. It also includes system call handlers for sysenter/syscall.
  47  * The IDT itself is defined in mp_desc.c.
  48  *
  49  * Code here is structured as follows:
  50  *
  51  * stubs        Code called directly from an IDT vector.
  52  *              All entry points have the "idt64_" prefix and they are built
  53  *              using macros expanded by the inclusion of idt_table.h.
  54  *              This code performs vector-dependent identification and jumps
  55  *              into the dispatch code.
  56  *
  57  * dispatch     The dispatch code is responsible for saving the thread state
  58  *              (which is either 64-bit or 32-bit) and then jumping to the
  59  *              class handler identified by the stub.
  60  *
  61  * returns      Code to restore state and return to the previous context.
  62  *
  63  * handlers     There are several classes of handlers:
  64  *   interrupt  - asynchronous events typically from external devices
  65  *   trap       - synchronous events due to thread execution
  66  *   syscall    - synchronous system call request
  67  *   fatal      - fatal traps
  68  */
  69
  70 /*
  71  * Handlers:
  72  */
  73 #define HNDL_ALLINTRS           EXT(hndl_allintrs)
  74 #define HNDL_ALLTRAPS           EXT(hndl_alltraps)
  75 #define HNDL_SYSENTER           EXT(hndl_sysenter)
  76 #define HNDL_SYSCALL            EXT(hndl_syscall)
  77 #define HNDL_UNIX_SCALL         EXT(hndl_unix_scall)
  78 #define HNDL_MACH_SCALL         EXT(hndl_mach_scall)
  79 #define HNDL_MDEP_SCALL         EXT(hndl_mdep_scall)
  80 #define HNDL_DOUBLE_FAULT       EXT(hndl_double_fault)
  81 #define HNDL_MACHINE_CHECK      EXT(hndl_machine_check)
  82
  83
  84 #if 1
  85 #define PUSH_FUNCTION(func)                      \
  86         sub     $8, %rsp                        ;\
  87         push    %rax                            ;\
  88         leaq    func(%rip), %rax                ;\
  89         movq    %rax, 8(%rsp)                   ;\
  90         pop     %rax
  91 #else
  92 #define PUSH_FUNCTION(func) pushq func
  93 #endif
  94
  95 /* The wrapper for all non-special traps/interrupts */
  96 /* Everything up to PUSH_FUNCTION is just to output
  97  * the interrupt number out to the postcode display
  98  */
  99 #if DEBUG_IDT64
 100 #define IDT_ENTRY_WRAPPER(n, f)                  \
 101         push    %rax                            ;\
 102         POSTCODE2(0x6400+n)                     ;\
 103         pop     %rax                            ;\
 104         PUSH_FUNCTION(f)                        ;\
 105         pushq   $(n)                            ;\
 106         jmp L_dispatch
 107 #else
 108 #define IDT_ENTRY_WRAPPER(n, f)                  \
 109         PUSH_FUNCTION(f)                        ;\
 110         pushq   $(n)                            ;\
 111         jmp L_dispatch
 112 #endif
 113
 114 /* A trap that comes with an error code already on the stack */
 115 #define TRAP_ERR(n, f)                           \
 116         Entry(f)                                ;\
 117         IDT_ENTRY_WRAPPER(n, HNDL_ALLTRAPS)
 118
 119 /* A normal trap */
 120 #define TRAP(n, f)                               \
 121         Entry(f)                                ;\
 122         pushq   $0                              ;\
 123         IDT_ENTRY_WRAPPER(n, HNDL_ALLTRAPS)
 124
 125 #define USER_TRAP TRAP
 126
 127 /* An interrupt */
 128 #define INTERRUPT(n)                            \
 129         Entry(_intr_ ## n)                      ;\
 130         pushq   $0                              ;\
 131         IDT_ENTRY_WRAPPER(n, HNDL_ALLINTRS)
 132
 133 /* A trap with a special-case handler, hence we don't need to define anything */
 134 #define TRAP_SPC(n, f)
 135 #define TRAP_IST1(n, f)
 136 #define TRAP_IST2(n, f)
 137 #define USER_TRAP_SPC(n, f)
 138
 139 /* Generate all the stubs */
 140 #include "idt_table.h"
 141
 142 /*
 143  * Common dispatch point.
 144  * Determine what mode has been interrupted and save state accordingly.
 145  * Here with:
 146  *      rsp     from user-space:   interrupt state in PCB, or
 147  *              from kernel-space: interrupt state in kernel or interrupt stack
 148  *      GSBASE  from user-space:   pthread area, or
 149  *              from kernel-space: cpu_data
 150  */
 151 L_dispatch:
 152         cmpl    $(KERNEL64_CS), ISF64_CS(%rsp)
 153         je      L_dispatch_kernel
 154
 155         swapgs
 156
 157 L_dispatch_user:
 158         cmpl    $(TASK_MAP_32BIT), %gs:CPU_TASK_MAP
 159         je      L_dispatch_U32          /* 32-bit user task */
 160
 161 L_dispatch_U64:
 162         subq    $(ISS64_OFFSET), %rsp
 163         mov     %r15, R64_R15(%rsp)
 164         mov     %rsp, %r15
 165         mov     %gs:CPU_KERNEL_STACK, %rsp
 166         jmp     L_dispatch_64bit
 167
 168 L_dispatch_kernel:
 169         subq    $(ISS64_OFFSET), %rsp
 170         mov     %r15, R64_R15(%rsp)
 171         mov     %rsp, %r15
 172
 173 /*
 174  * Here for 64-bit user task or kernel
 175  */
 176 L_dispatch_64bit:
 177         movl    $(SS_64), SS_FLAVOR(%r15)
 178
 179         /*
 180          * Save segment regs - for completeness since theyre not used.
 181          */
 182         movl    %fs, R64_FS(%r15)
 183         movl    %gs, R64_GS(%r15)
 184
 185         /* Save general-purpose registers */
 186         mov     %rax, R64_RAX(%r15)
 187         mov     %rbx, R64_RBX(%r15)
 188         mov     %rcx, R64_RCX(%r15)
 189         mov     %rdx, R64_RDX(%r15)
 190         mov     %rbp, R64_RBP(%r15)
 191         mov     %rdi, R64_RDI(%r15)
 192         mov     %rsi, R64_RSI(%r15)
 193         mov     %r8,  R64_R8(%r15)
 194         mov     %r9,  R64_R9(%r15)
 195         mov     %r10, R64_R10(%r15)
 196         mov     %r11, R64_R11(%r15)
 197         mov     %r12, R64_R12(%r15)
 198         mov     %r13, R64_R13(%r15)
 199         mov     %r14, R64_R14(%r15)
 200
 201         /* cr2 is significant only for page-faults */
 202         mov     %cr2, %rax
 203         mov     %rax, R64_CR2(%r15)
 204
 205         mov     R64_TRAPNO(%r15), %ebx  /* %ebx := trapno for later */
 206         mov     R64_TRAPFN(%r15), %rdx  /* %rdx := trapfn for later */
 207         mov     R64_CS(%r15), %esi      /* %esi := cs for later */
 208
 209         jmp     L_common_dispatch
 210
 211 L_64bit_entry_reject:
 212         /*
 213          * Here for a 64-bit user attempting an invalid kernel entry.
 214          */
 215         pushq   %rax
 216         leaq    HNDL_ALLTRAPS(%rip), %rax
 217         movq    %rax, ISF64_TRAPFN+8(%rsp)
 218         popq    %rax
 219         movq    $(T_INVALID_OPCODE), ISF64_TRAPNO(%rsp)
 220         jmp     L_dispatch_U64
 221
 222 L_32bit_entry_check:
 223         /*
 224          * Check we're not a confused 64-bit user.
 225          */
 226         cmpl    $(TASK_MAP_32BIT), %gs:CPU_TASK_MAP
 227         jne     L_64bit_entry_reject
 228         /* fall through to 32-bit handler: */
 229
 230 L_dispatch_U32: /* 32-bit user task */
 231         subq    $(ISS64_OFFSET), %rsp
 232         mov     %rsp, %r15
 233         mov     %gs:CPU_KERNEL_STACK, %rsp
 234         movl    $(SS_32), SS_FLAVOR(%r15)
 235
 236         /*
 237          * Save segment regs
 238          */
 239         movl    %ds, R32_DS(%r15)
 240         movl    %es, R32_ES(%r15)
 241         movl    %fs, R32_FS(%r15)
 242         movl    %gs, R32_GS(%r15)
 243
 244         /*
 245          * Save general 32-bit registers
 246          */
 247         mov     %eax, R32_EAX(%r15)
 248         mov     %ebx, R32_EBX(%r15)
 249         mov     %ecx, R32_ECX(%r15)
 250         mov     %edx, R32_EDX(%r15)
 251         mov     %ebp, R32_EBP(%r15)
 252         mov     %esi, R32_ESI(%r15)
 253         mov     %edi, R32_EDI(%r15)
 254
 255         /* Unconditionally save cr2; only meaningful on page faults */
 256         mov     %cr2, %rax
 257         mov     %eax, R32_CR2(%r15)
 258
 259         /*
 260          * Copy registers already saved in the machine state
 261          * (in the interrupt stack frame) into the compat save area.
 262          */
 263         mov     R64_RIP(%r15), %eax
 264         mov     %eax, R32_EIP(%r15)
 265         mov     R64_RFLAGS(%r15), %eax
 266         mov     %eax, R32_EFLAGS(%r15)
 267         mov     R64_RSP(%r15), %eax
 268         mov     %eax, R32_UESP(%r15)
 269         mov     R64_SS(%r15), %eax
 270         mov     %eax, R32_SS(%r15)
 271 L_dispatch_U32_after_fault:
 272         mov     R64_CS(%r15), %esi              /* %esi := %cs for later */
 273         mov     %esi, R32_CS(%r15)
 274         mov     R64_TRAPNO(%r15), %ebx          /* %ebx := trapno for later */
 275         mov     %ebx, R32_TRAPNO(%r15)
 276         mov     R64_ERR(%r15), %eax
 277         mov     %eax, R32_ERR(%r15)
 278         mov     R64_TRAPFN(%r15), %rdx          /* %rdx := trapfn for later */
 279
 280 L_common_dispatch:
 281         cld             /* Ensure the direction flag is clear in the kernel */
 282         cmpl    $0, EXT(pmap_smap_enabled)(%rip)
 283         je      1f
 284         clac            /* Clear EFLAGS.AC if SMAP is present/enabled */
 285 1:
 286         /*
 287          * On entering the kernel, we don't need to switch cr3
 288          * because the kernel shares the user's address space.
 289          * But we mark the kernel's cr3 as "active".
 290          * If, however, the invalid cr3 flag is set, we have to flush tlbs
 291          * since the kernel's mapping was changed while we were in userspace.
 292          *
 293          * But: if global no_shared_cr3 is TRUE we do switch to the kernel's cr3
 294          * so that illicit accesses to userspace can be trapped.
 295          */
 296         mov     %gs:CPU_KERNEL_CR3, %rcx
 297         mov     %rcx, %gs:CPU_ACTIVE_CR3
 298         test    $3, %esi                        /* user/kernel? */
 299         jz      2f                              /* skip cr3 reload from kernel */
 300         xor     %rbp, %rbp
 301         cmpl    $0, EXT(no_shared_cr3)(%rip)
 302         je      2f
 303         mov     %rcx, %cr3                      /* load kernel cr3 */
 304         jmp     4f                              /* and skip tlb flush test */
 305 2:
 306         mov     %gs:CPU_ACTIVE_CR3+4, %rcx
 307         shr     $32, %rcx
 308         testl   %ecx, %ecx
 309         jz      4f
 310         testl   $(1<<16), %ecx                  /* Global? */
 311         jz      3f
 312         movl    $0, %gs:CPU_TLB_INVALID
 313         mov     %cr4, %rcx      /* RMWW CR4, for lack of an alternative*/
 314         and     $(~CR4_PGE), %rcx
 315         mov     %rcx, %cr4
 316         or      $(CR4_PGE), %rcx
 317         mov     %rcx, %cr4
 318         jmp     4f
 319 3:
 320         movb    $0, %gs:CPU_TLB_INVALID_LOCAL
 321         mov     %cr3, %rcx
 322         mov     %rcx, %cr3
 323 4:
 324         mov     %gs:CPU_ACTIVE_THREAD, %rcx     /* Get the active thread */
 325         movl    $-1, TH_IOTIER_OVERRIDE(%rcx)   /* Reset IO tier override to -1 before handling trap */
 326         cmpq    $0, TH_PCB_IDS(%rcx)    /* Is there a debug register state? */
 327         je      5f
 328         xor     %ecx, %ecx              /* If so, reset DR7 (the control) */
 329         mov     %rcx, %dr7
 330 5:
 331         incl    %gs:hwIntCnt(,%ebx,4)           // Bump the trap/intr count
 332         /* Dispatch the designated handler */
 333         jmp     *%rdx
 334
 335 /*
 336  * Control is passed here to return to user.
 337  */
 338 Entry(return_to_user)
 339         TIME_TRAP_UEXIT
 340
 341 Entry(ret_to_user)
 342 // XXX 'Be nice to tidy up this debug register restore sequence...
 343         mov     %gs:CPU_ACTIVE_THREAD, %rdx
 344         movq    TH_PCB_IDS(%rdx),%rax   /* Obtain this thread's debug state */
 345
 346         test    %rax, %rax              /* Is there a debug register context? */
 347         je      2f                      /* branch if not */
 348         cmpl    $(TASK_MAP_32BIT), %gs:CPU_TASK_MAP /* Are we a 32-bit task? */
 349         jne     1f
 350         movl    DS_DR0(%rax), %ecx      /* If so, load the 32 bit DRs */
 351         movq    %rcx, %dr0
 352         movl    DS_DR1(%rax), %ecx
 353         movq    %rcx, %dr1
 354         movl    DS_DR2(%rax), %ecx
 355         movq    %rcx, %dr2
 356         movl    DS_DR3(%rax), %ecx
 357         movq    %rcx, %dr3
 358         movl    DS_DR7(%rax), %ecx
 359         movq    %rcx, %gs:CPU_DR7
 360         jmp     2f
 361 1:
 362         mov     DS64_DR0(%rax), %rcx    /* Load the full width DRs*/
 363         mov     %rcx, %dr0
 364         mov     DS64_DR1(%rax), %rcx
 365         mov     %rcx, %dr1
 366         mov     DS64_DR2(%rax), %rcx
 367         mov     %rcx, %dr2
 368         mov     DS64_DR3(%rax), %rcx
 369         mov     %rcx, %dr3
 370         mov     DS64_DR7(%rax), %rcx
 371         mov     %rcx, %gs:CPU_DR7
 372 2:
 373         /*
 374          * On exiting the kernel there's no need to switch cr3 since we're
 375          * already running in the user's address space which includes the
 376          * kernel. Nevertheless, we now mark the task's cr3 as active.
 377          * But, if no_shared_cr3 is set, we do need to switch cr3 at this point.
 378          */
 379         mov     %gs:CPU_TASK_CR3, %rcx
 380         mov     %rcx, %gs:CPU_ACTIVE_CR3
 381         movl    EXT(no_shared_cr3)(%rip), %eax
 382         test    %eax, %eax              /* -no_shared_cr3 */
 383         jz      3f
 384         mov     %rcx, %cr3
 385 3:
 386         mov     %gs:CPU_DR7, %rax       /* Is there a debug control register?*/
 387         cmp     $0, %rax
 388         je      4f
 389         mov     %rax, %dr7              /* Set DR7 */
 390         movq    $0, %gs:CPU_DR7
 391 4:
 392         cmpl    $(SS_64), SS_FLAVOR(%r15)       /* 64-bit state? */
 393         je      L_64bit_return
 394
 395 L_32bit_return:
 396 #if DEBUG_IDT64
 397         cmpl    $(SS_32), SS_FLAVOR(%r15)       /* 32-bit state? */
 398         je      1f
 399         cli
 400         POSTCODE2(0x6432)
 401         CCALL1(panic_idt64, %r15)
 402 1:
 403 #endif /* DEBUG_IDT64 */
 404
 405         /*
 406          * Restore registers into the machine state for iret.
 407          * Here on fault stack and PCB address in R11.
 408          */
 409         movl    R32_EIP(%r15), %eax
 410         movl    %eax, R64_RIP(%r15)
 411         movl    R32_EFLAGS(%r15), %eax
 412         movl    %eax, R64_RFLAGS(%r15)
 413         movl    R32_CS(%r15), %eax
 414         movl    %eax, R64_CS(%r15)
 415         movl    R32_UESP(%r15), %eax
 416         movl    %eax, R64_RSP(%r15)
 417         movl    R32_SS(%r15), %eax
 418         movl    %eax, R64_SS(%r15)
 419
 420         /*
 421          * Restore general 32-bit registers
 422          */
 423         movl    R32_EAX(%r15), %eax
 424         movl    R32_EBX(%r15), %ebx
 425         movl    R32_ECX(%r15), %ecx
 426         movl    R32_EDX(%r15), %edx
 427         movl    R32_EBP(%r15), %ebp
 428         movl    R32_ESI(%r15), %esi
 429         movl    R32_EDI(%r15), %edi
 430
 431         /*
 432          * Restore segment registers. A segment exception taken here will
 433          * push state on the IST1 stack and will not affect the "PCB stack".
 434          */
 435         mov     %r15, %rsp              /* Set the PCB as the stack */
 436         swapgs
 437 EXT(ret32_set_ds):
 438         movl    R32_DS(%rsp), %ds
 439 EXT(ret32_set_es):
 440         movl    R32_ES(%rsp), %es
 441 EXT(ret32_set_fs):
 442         movl    R32_FS(%rsp), %fs
 443 EXT(ret32_set_gs):
 444         movl    R32_GS(%rsp), %gs
 445
 446         /* pop compat frame + trapno, trapfn and error */
 447         add     $(ISS64_OFFSET)+8+8+8, %rsp
 448         cmpl    $(SYSENTER_CS),ISF64_CS-8-8-8(%rsp)
 449                                         /* test for fast entry/exit */
 450         je      L_fast_exit
 451 EXT(ret32_iret):
 452         iretq                           /* return from interrupt */
 453
 454 L_fast_exit:
 455         pop     %rdx                    /* user return eip */
 456         pop     %rcx                    /* pop and toss cs */
 457         andl    $(~EFL_IF), (%rsp)      /* clear interrupts enable, sti below */
 458         popf                            /* flags - carry denotes failure */
 459         pop     %rcx                    /* user return esp */
 460         sti                             /* interrupts enabled after sysexit */
 461         sysexitl                        /* 32-bit sysexit */
 462
 463 ret_to_kernel:
 464 #if DEBUG_IDT64
 465         cmpl    $(SS_64), SS_FLAVOR(%r15)       /* 64-bit state? */
 466         je      1f
 467         cli
 468         POSTCODE2(0x6464)
 469         CCALL1(panic_idt64, %r15)
 470         hlt
 471 1:
 472         cmpl    $(KERNEL64_CS), R64_CS(%r15)
 473         je      2f
 474         CCALL1(panic_idt64, %r15)
 475         hlt
 476 2:
 477 #endif
 478
 479 L_64bit_return:
 480         /*
 481          * Restore general 64-bit registers.
 482          * Here on fault stack and PCB address in R15.
 483          */
 484         mov     R64_R14(%r15), %r14
 485         mov     R64_R13(%r15), %r13
 486         mov     R64_R12(%r15), %r12
 487         mov     R64_R11(%r15), %r11
 488         mov     R64_R10(%r15), %r10
 489         mov     R64_R9(%r15),  %r9
 490         mov     R64_R8(%r15),  %r8
 491         mov     R64_RSI(%r15), %rsi
 492         mov     R64_RDI(%r15), %rdi
 493         mov     R64_RBP(%r15), %rbp
 494         mov     R64_RDX(%r15), %rdx
 495         mov     R64_RCX(%r15), %rcx
 496         mov     R64_RBX(%r15), %rbx
 497         mov     R64_RAX(%r15), %rax
 498
 499         /*
 500          * We must swap GS base if we're returning to user-space,
 501          * or we're returning from an NMI that occurred in a trampoline
 502          * before the user GS had been swapped. In the latter case, the NMI
 503          * handler will have flagged the high-order 32-bits of the CS.
 504          */
 505         cmpq    $(KERNEL64_CS), R64_CS(%r15)
 506         jz      1f
 507         swapgs
 508 1:
 509         mov     R64_R15(%r15), %rsp
 510         xchg    %r15, %rsp
 511         add     $(ISS64_OFFSET)+24, %rsp        /* pop saved state       */
 512                                                 /* + trapno/trapfn/error */
 513         cmpl    $(SYSCALL_CS),ISF64_CS-24(%rsp)
 514                                                 /* test for fast entry/exit */
 515         je      L_sysret
 516 .globl _dump_iretq
 517 EXT(ret64_iret):
 518         iretq                           /* return from interrupt */
 519
 520 L_sysret:
 521         /*
 522          * Here to load rcx/r11/rsp and perform the sysret back to user-space.
 523          *      rcx     user rip
 524          *      r11     user rflags
 525          *      rsp     user stack pointer
 526          */
 527         mov     ISF64_RIP-24(%rsp), %rcx
 528         mov     ISF64_RFLAGS-24(%rsp), %r11
 529         mov     ISF64_RSP-24(%rsp), %rsp
 530         sysretq                         /* return from systen call */
 531
 532
 533
 534 /*
 535  * System call handlers.
 536  * These are entered via a syscall interrupt. The system call number in %rax
 537  * is saved to the error code slot in the stack frame. We then branch to the
 538  * common state saving code.
 539  */
 540
 541 #ifndef UNIX_INT
 542 #error NO UNIX INT!!!
 543 #endif
 544 Entry(idt64_unix_scall)
 545         swapgs                          /* switch to kernel gs (cpu_data) */
 546         pushq   %rax                    /* save system call number */
 547         PUSH_FUNCTION(HNDL_UNIX_SCALL)
 548         pushq   $(UNIX_INT)
 549         jmp     L_32bit_entry_check
 550
 551
 552 Entry(idt64_mach_scall)
 553         swapgs                          /* switch to kernel gs (cpu_data) */
 554         pushq   %rax                    /* save system call number */
 555         PUSH_FUNCTION(HNDL_MACH_SCALL)
 556         pushq   $(MACH_INT)
 557         jmp     L_32bit_entry_check
 558
 559
 560 Entry(idt64_mdep_scall)
 561         swapgs                          /* switch to kernel gs (cpu_data) */
 562         pushq   %rax                    /* save system call number */
 563         PUSH_FUNCTION(HNDL_MDEP_SCALL)
 564         pushq   $(MACHDEP_INT)
 565         jmp     L_32bit_entry_check
 566
 567 /* Programmed into MSR_IA32_LSTAR by mp_desc.c */
 568 Entry(hi64_syscall)
 569 Entry(idt64_syscall)
 570 L_syscall_continue:
 571         swapgs                          /* Kapow! get per-cpu data area */
 572         mov     %rsp, %gs:CPU_UBER_TMP  /* save user stack */
 573         mov     %gs:CPU_UBER_ISF, %rsp  /* switch stack to pcb */
 574
 575         /*
 576          * Save values in the ISF frame in the PCB
 577          * to cons up the saved machine state.
 578          */
 579         movl    $(USER_DS), ISF64_SS(%rsp)
 580         movl    $(SYSCALL_CS), ISF64_CS(%rsp)   /* cs - a pseudo-segment */
 581         mov     %r11, ISF64_RFLAGS(%rsp)        /* rflags */
 582         mov     %rcx, ISF64_RIP(%rsp)           /* rip */
 583         mov     %gs:CPU_UBER_TMP, %rcx
 584         mov     %rcx, ISF64_RSP(%rsp)           /* user stack */
 585         mov     %rax, ISF64_ERR(%rsp)           /* err/rax - syscall code */
 586         movq    $(T_SYSCALL), ISF64_TRAPNO(%rsp)        /* trapno */
 587         leaq    HNDL_SYSCALL(%rip), %r11;
 588         movq    %r11, ISF64_TRAPFN(%rsp)
 589         mov     ISF64_RFLAGS(%rsp), %r11        /* Avoid leak, restore R11 */
 590         jmp     L_dispatch_U64                  /* this can only be 64-bit */
 591
 592 /*
 593  * sysenter entry point
 594  * Requires user code to set up:
 595  *      edx: user instruction pointer (return address)
 596  *      ecx: user stack pointer
 597  *              on which is pushed stub ret addr and saved ebx
 598  * Return to user-space is made using sysexit.
 599  * Note: sysenter/sysexit cannot be used for calls returning a value in edx,
 600  *       or requiring ecx to be preserved.
 601  */
 602 Entry(hi64_sysenter)
 603 Entry(idt64_sysenter)
 604         movq    (%rsp), %rsp
 605         /*
 606          * Push values on to the PCB stack
 607          * to cons up the saved machine state.
 608          */
 609         push    $(USER_DS)              /* ss */
 610         push    %rcx                    /* uesp */
 611         pushf                           /* flags */
 612         /*
 613          * Clear, among others, the Nested Task (NT) flags bit;
 614          * this is zeroed by INT, but not by SYSENTER.
 615          */
 616         push    $0
 617         popf
 618         push    $(SYSENTER_CS)          /* cs */
 619 L_sysenter_continue:
 620         swapgs                          /* switch to kernel gs (cpu_data) */
 621         push    %rdx                    /* eip */
 622         push    %rax                    /* err/eax - syscall code */
 623         PUSH_FUNCTION(HNDL_SYSENTER)
 624         pushq   $(T_SYSENTER)
 625         orl     $(EFL_IF), ISF64_RFLAGS(%rsp)
 626         jmp     L_32bit_entry_check
 627
 628
 629 Entry(idt64_page_fault)
 630         PUSH_FUNCTION(HNDL_ALLTRAPS)
 631         push    $(T_PAGE_FAULT)
 632         push    %rax                    /* save %rax temporarily */
 633         testb   $3, 8+ISF64_CS(%rsp)    /* was trap from kernel? */
 634         jz      L_kernel_trap           /* - yes, handle with care */
 635         pop     %rax                    /* restore %rax, swapgs, and continue */
 636         swapgs
 637         jmp     L_dispatch_user
 638
 639
 640 /*
 641  * Debug trap.  Check for single-stepping across system call into
 642  * kernel.  If this is the case, taking the debug trap has turned
 643  * off single-stepping - save the flags register with the trace
 644  * bit set.
 645  */
 646 Entry(idt64_debug)
 647         push    $0                      /* error code */
 648         PUSH_FUNCTION(HNDL_ALLTRAPS)
 649         pushq   $(T_DEBUG)
 650
 651         testb   $3, ISF64_CS(%rsp)
 652         jnz     L_dispatch
 653
 654         /*
 655          * trap came from kernel mode
 656          */
 657
 658         push    %rax                    /* save %rax temporarily */
 659         lea     EXT(idt64_sysenter)(%rip), %rax
 660         cmp     %rax, ISF64_RIP+8(%rsp)
 661         pop     %rax
 662         jne     L_dispatch
 663         /*
 664          * Interrupt stack frame has been pushed on the temporary stack.
 665          * We have to switch to pcb stack and patch up the saved state.
 666          */
 667         mov     %rcx, ISF64_ERR(%rsp)   /* save %rcx in error slot */
 668         mov     ISF64_SS+8(%rsp), %rcx  /* top of temp stack -> pcb stack */
 669         xchg    %rcx,%rsp               /* switch to pcb stack */
 670         push    $(USER_DS)              /* ss */
 671         push    ISF64_ERR(%rcx)         /* saved %rcx into rsp slot */
 672         push    ISF64_RFLAGS(%rcx)      /* rflags */
 673         push    $(SYSENTER_TF_CS)       /* cs - not SYSENTER_CS for iret path */
 674         mov     ISF64_ERR(%rcx),%rcx    /* restore %rcx */
 675         jmp     L_sysenter_continue     /* continue sysenter entry */
 676
 677
 678 Entry(idt64_double_fault)
 679         PUSH_FUNCTION(HNDL_DOUBLE_FAULT)
 680         pushq   $(T_DOUBLE_FAULT)
 681
 682         push    %rax
 683         leaq    EXT(idt64_syscall)(%rip), %rax
 684         cmp     %rax, ISF64_RIP+8(%rsp)
 685         pop     %rax
 686         jne     L_dispatch_kernel
 687
 688         mov     ISF64_RSP(%rsp), %rsp
 689         jmp     L_syscall_continue
 690
 691
 692 /*
 693  * For GP/NP/SS faults, we use the IST1 stack.
 694  * For faults from user-space, we have to copy the machine state to the
 695  * PCB stack and then dispatch as normal.
 696  * For faults in kernel-space, we need to scrub for kernel exit faults and
 697  * treat these as user-space faults. But for all other kernel-space faults
 698  * we continue to run on the IST1 stack and we dispatch to handle the fault
 699  * as fatal.
 700  */
 701 Entry(idt64_gen_prot)
 702         PUSH_FUNCTION(HNDL_ALLTRAPS)
 703         pushq   $(T_GENERAL_PROTECTION)
 704         jmp     trap_check_kernel_exit  /* check for kernel exit sequence */
 705
 706 Entry(idt64_stack_fault)
 707         PUSH_FUNCTION(HNDL_ALLTRAPS)
 708         pushq   $(T_STACK_FAULT)
 709         jmp     trap_check_kernel_exit  /* check for kernel exit sequence */
 710
 711 Entry(idt64_segnp)
 712         PUSH_FUNCTION(HNDL_ALLTRAPS)
 713         pushq   $(T_SEGMENT_NOT_PRESENT)
 714                                         /* indicate fault type */
 715 trap_check_kernel_exit:
 716         testb   $3,ISF64_CS(%rsp)
 717         jz      L_kernel_gpf
 718
 719         /* Here for fault from user-space. Copy interrupt state to PCB. */
 720         swapgs
 721         push    %rax
 722         mov     %rcx, %gs:CPU_UBER_TMP          /* save user RCX  */
 723         mov     %gs:CPU_UBER_ISF, %rcx          /* PCB stack addr */
 724         mov     ISF64_SS+8(%rsp), %rax
 725         mov     %rax, ISF64_SS(%rcx)
 726         mov     ISF64_RSP+8(%rsp), %rax
 727         mov     %rax, ISF64_RSP(%rcx)
 728         mov     ISF64_RFLAGS+8(%rsp), %rax
 729         mov     %rax, ISF64_RFLAGS(%rcx)
 730         mov     ISF64_CS+8(%rsp), %rax
 731         mov     %rax, ISF64_CS(%rcx)
 732         mov     ISF64_RIP+8(%rsp), %rax
 733         mov     %rax, ISF64_RIP(%rcx)
 734         mov     ISF64_ERR+8(%rsp), %rax
 735         mov     %rax, ISF64_ERR(%rcx)
 736         mov     ISF64_TRAPFN+8(%rsp), %rax
 737         mov     %rax, ISF64_TRAPFN(%rcx)
 738         mov     ISF64_TRAPNO+8(%rsp), %rax
 739         mov     %rax, ISF64_TRAPNO(%rcx)
 740         pop     %rax
 741         mov     %gs:CPU_UBER_TMP, %rsp          /* user RCX into RSP */
 742         xchg    %rcx, %rsp                      /* to PCB stack with user RCX */
 743         jmp     L_dispatch_user
 744
 745 L_kernel_gpf:
 746         /* Here for GPF from kernel_space. Check for recoverable cases. */
 747         push    %rax
 748         leaq    EXT(ret32_iret)(%rip), %rax
 749         cmp     %rax, 8+ISF64_RIP(%rsp)
 750         je      L_fault_iret
 751         leaq    EXT(ret64_iret)(%rip), %rax
 752         cmp     %rax, 8+ISF64_RIP(%rsp)
 753         je      L_fault_iret
 754         leaq    EXT(ret32_set_ds)(%rip), %rax
 755         cmp     %rax, 8+ISF64_RIP(%rsp)
 756         je      L_32bit_fault_set_seg
 757         leaq    EXT(ret32_set_es)(%rip), %rax
 758         cmp     %rax, 8+ISF64_RIP(%rsp)
 759         je      L_32bit_fault_set_seg
 760         leaq    EXT(ret32_set_fs)(%rip), %rax
 761         cmp     %rax, 8+ISF64_RIP(%rsp)
 762         je      L_32bit_fault_set_seg
 763         leaq    EXT(ret32_set_gs)(%rip), %rax
 764         cmp     %rax, 8+ISF64_RIP(%rsp)
 765         je      L_32bit_fault_set_seg
 766
 767         /* Fall through */
 768
 769 L_kernel_trap:
 770         /*
 771          * Here after taking an unexpected trap from kernel mode - perhaps
 772          * while running in the trampolines hereabouts.
 773          * Note: %rax has been pushed on stack.
 774          * Make sure we're not on the PCB stack, if so move to the kernel stack.
 775          * This is likely a fatal condition.
 776          * But first, ensure we have the kernel gs base active...
 777          */
 778         push    %rcx
 779         push    %rdx
 780         mov     $(MSR_IA32_GS_BASE), %ecx
 781         rdmsr                                   /* read kernel gsbase */
 782         test    $0x80000000, %edx               /* test MSB of address */
 783         jne     1f
 784         swapgs                                  /* so swap */
 785 1:
 786         pop     %rdx
 787         pop     %rcx
 788
 789         movq    %gs:CPU_UBER_ISF, %rax          /* PCB stack addr */
 790         subq    %rsp, %rax
 791         cmpq    $(PAGE_SIZE), %rax              /* current stack in PCB? */
 792         jb      2f                              /*  - yes, deal with it */
 793         pop     %rax                            /*  - no, restore %rax */
 794         jmp     L_dispatch_kernel
 795 2:
 796         /*
 797          *  Here if %rsp is in the PCB
 798          *  Copy the interrupt stack frame from PCB stack to kernel stack
 799          */
 800         movq    %gs:CPU_KERNEL_STACK, %rax
 801         xchgq   %rax, %rsp
 802         pushq   8+ISF64_SS(%rax)
 803         pushq   8+ISF64_RSP(%rax)
 804         pushq   8+ISF64_RFLAGS(%rax)
 805         pushq   8+ISF64_CS(%rax)
 806         pushq   8+ISF64_RIP(%rax)
 807         pushq   8+ISF64_ERR(%rax)
 808         pushq   8+ISF64_TRAPFN(%rax)
 809         pushq   8+ISF64_TRAPNO(%rax)
 810         movq    (%rax), %rax
 811         jmp     L_dispatch_kernel
 812
 813
 814 /*
 815  * GP/NP fault on IRET: CS or SS is in error.
 816  * User GSBASE is active.
 817  * On IST1 stack containing:
 818  *  (rax saved above, which is immediately popped)
 819  *  0  ISF64_TRAPNO:    trap code (NP or GP)
 820  *  8  ISF64_TRAPFN:    trap function
 821  *  16 ISF64_ERR:       segment number in error (error code)
 822  *  24 ISF64_RIP:       kernel RIP
 823  *  32 ISF64_CS:        kernel CS
 824  *  40 ISF64_RFLAGS:    kernel RFLAGS
 825  *  48 ISF64_RSP:       kernel RSP
 826  *  56 ISF64_SS:        kernel SS
 827  * On the PCB stack, pointed to by the kernel's RSP is:
 828  *   0                  user RIP
 829  *   8                  user CS
 830  *  16                  user RFLAGS
 831  *  24                  user RSP
 832  *  32                  user SS
 833  *
 834  * We need to move the kernel's TRAPNO, TRAPFN and ERR to the PCB and handle
 835  * as a user fault with:
 836  *  0  ISF64_TRAPNO:    trap code (NP or GP)
 837  *  8  ISF64_TRAPFN:    trap function
 838  *  16 ISF64_ERR:       segment number in error (error code)
 839  *  24                  user RIP
 840  *  32                  user CS
 841  *  40                  user RFLAGS
 842  *  48                  user RSP
 843  *  56                  user SS
 844  */
 845 L_fault_iret:
 846         pop     %rax                    /* recover saved %rax */
 847         mov     %rax, ISF64_RIP(%rsp)   /* save rax (we don`t need saved rip) */
 848         mov     ISF64_RSP(%rsp), %rax
 849         xchg    %rax, %rsp              /* switch to PCB stack */
 850         push    ISF64_ERR(%rax)
 851         push    ISF64_TRAPFN(%rax)
 852         push    ISF64_TRAPNO(%rax)
 853         mov     ISF64_RIP(%rax), %rax   /* restore rax */
 854                                         /* now treat as fault from user */
 855         jmp     L_dispatch
 856
 857 /*
 858  * Fault restoring a segment register.  All of the saved state is still
 859  * on the stack untouched since we haven't yet moved the stack pointer.
 860  * On IST1 stack containing:
 861  *  (rax saved above, which is immediately popped)
 862  *  0  ISF64_TRAPNO:    trap code (NP or GP)
 863  *  8  ISF64_TRAPFN:    trap function
 864  *  16 ISF64_ERR:       segment number in error (error code)
 865  *  24 ISF64_RIP:       kernel RIP
 866  *  32 ISF64_CS:        kernel CS
 867  *  40 ISF64_RFLAGS:    kernel RFLAGS
 868  *  48 ISF64_RSP:       kernel RSP
 869  *  56 ISF64_SS:        kernel SS
 870  * On the PCB stack, pointed to by the kernel's RSP is:
 871  *  0                   user trap code
 872  *  8                   user trap function
 873  *  16                  user err
 874  *  24                  user RIP
 875  *  32                  user CS
 876  *  40                  user RFLAGS
 877  *  48                  user RSP
 878  *  56                  user SS
 879  */
 880 L_32bit_fault_set_seg:
 881         swapgs
 882         pop     %rax                    /* toss saved %rax from stack */
 883         mov     ISF64_TRAPNO(%rsp), %rax
 884         mov     ISF64_TRAPFN(%rsp), %rcx
 885         mov     ISF64_ERR(%rsp), %rdx
 886         mov     ISF64_RSP(%rsp), %rsp   /* reset stack to saved state */
 887         mov     %rax,R64_TRAPNO(%rsp)
 888         mov     %rcx,R64_TRAPFN(%rsp)
 889         mov     %rdx,R64_ERR(%rsp)
 890                                         /* now treat as fault from user */
 891                                         /* except that all the state is */
 892                                         /* already saved - we just have to */
 893                                         /* move the trapno and error into */
 894                                         /* the compatibility frame */
 895         jmp     L_dispatch_U32_after_fault
 896
 897 /*
 898  * Fatal exception handlers:
 899  */
 900 Entry(idt64_db_task_dbl_fault)
 901         PUSH_FUNCTION(HNDL_DOUBLE_FAULT)
 902         pushq   $(T_DOUBLE_FAULT)
 903         jmp     L_dispatch
 904
 905 Entry(idt64_db_task_stk_fault)
 906         PUSH_FUNCTION(HNDL_DOUBLE_FAULT)
 907         pushq   $(T_STACK_FAULT)
 908         jmp     L_dispatch
 909
 910 Entry(idt64_mc)
 911         push    $(0)                    /* Error */
 912         PUSH_FUNCTION(HNDL_MACHINE_CHECK)
 913         pushq   $(T_MACHINE_CHECK)
 914         jmp     L_dispatch
 915
 916 /*
 917  * NMI
 918  * This may or may not be fatal but extreme care is required
 919  * because it may fall when control was already in another trampoline.
 920  *
 921  * We get here on IST2 stack which is used for NMIs only.
 922  * We must be aware of the interrupted state:
 923  *  - from user-space, we
 924  *    - copy state to the PCB and continue;
 925  *  - from kernel-space, we
 926  *    - copy state to the kernel stack and continue, but
 927  *    - check what GSBASE was active, set the kernel base and
 928  *    - ensure that the active state is restored when the NMI is dismissed.
 929  */
 930 Entry(idt64_nmi)
 931         push    %rax                            /* save RAX to ISF64_ERR */
 932         push    %rcx                            /* save RCX to ISF64_TRAPFN */
 933         push    %rdx                            /* save RDX to ISF64_TRAPNO */
 934         testb   $3, ISF64_CS(%rsp)              /* NMI from user-space? */
 935         je      1f
 936
 937         /* From user-space: copy interrupt state to user PCB */
 938         swapgs
 939         mov     %gs:CPU_UBER_ISF, %rcx          /* PCB stack addr */
 940         add     $(ISF64_SIZE), %rcx             /* adjust to base of ISF */
 941         swapgs                                  /* swap back for L_dispatch */
 942         jmp     4f                              /* Copy state to PCB */
 943
 944 1:
 945         /*
 946         * From kernel-space:
 947          * Determine whether the kernel or user GS is set.
 948          * Set the kernel and ensure that we'll swap back correctly at IRET.
 949          */
 950         mov     $(MSR_IA32_GS_BASE), %ecx
 951         rdmsr                                   /* read kernel gsbase */
 952         test    $0x80000000, %edx               /* test MSB of address */
 953         jne     2f
 954         swapgs                                  /* so swap */
 955         movl    $1, ISF64_CS+4(%rsp)            /* and set flag in CS slot */
 956 2:
 957         /*
 958          * Determine whether we're on the kernel or interrupt stack
 959          * when the NMI hit.
 960          */
 961         mov     ISF64_RSP(%rsp), %rcx
 962         mov     %gs:CPU_KERNEL_STACK, %rax
 963         xor     %rcx, %rax
 964         and     EXT(kernel_stack_mask)(%rip), %rax
 965         test    %rax, %rax              /* are we on the kernel stack? */
 966         je      3f                      /* yes */
 967
 968         mov     %gs:CPU_INT_STACK_TOP, %rax
 969         dec     %rax                    /* intr stack top is byte above max */
 970         xor     %rcx, %rax
 971         and     EXT(kernel_stack_mask)(%rip), %rax
 972         test    %rax, %rax              /* are we on the interrupt stack? */
 973         je      3f                      /* yes */
 974
 975         mov    %gs:CPU_KERNEL_STACK, %rcx
 976 3:
 977         /* 16-byte-align kernel/interrupt stack for state push */
 978         and     $0xFFFFFFFFFFFFFFF0, %rcx
 979
 980 4:
 981         /*
 982          * Copy state from NMI stack (RSP) to the save area (RCX) which is
 983          * the PCB for user or kernel/interrupt stack from kernel.
 984          * ISF64_ERR(RSP)    saved RAX
 985          * ISF64_TRAPFN(RSP) saved RCX
 986          * ISF64_TRAPNO(RSP) saved RDX
 987          */
 988         xchg    %rsp, %rcx                      /* set for pushes */
 989         push    ISF64_SS(%rcx)
 990         push    ISF64_RSP(%rcx)
 991         push    ISF64_RFLAGS(%rcx)
 992         push    ISF64_CS(%rcx)
 993         push    ISF64_RIP(%rcx)
 994         push    $(0)                            /* error code 0 */
 995         lea     HNDL_ALLINTRS(%rip), %rax
 996         push    %rax                            /* trapfn allintrs */
 997         push    $(T_NMI)                        /* trapno T_NMI */
 998         mov     ISF64_ERR(%rcx), %rax
 999         mov     ISF64_TRAPNO(%rcx), %rdx
1000         mov     ISF64_TRAPFN(%rcx), %rcx
1001         jmp     L_dispatch
1002
1003
1004 /* All 'exceptions' enter hndl_alltraps, with:
1005  *      r15     x86_saved_state_t address
1006  *      rsp     kernel stack if user-space, otherwise interrupt or kernel stack
1007  *      esi     cs at trap
1008  *
1009  * The rest of the state is set up as:
1010  *      both rsp and r15 are 16-byte aligned
1011  *      interrupts disabled
1012  *      direction flag cleared
1013  */
1014 Entry(hndl_alltraps)
1015         mov     %esi, %eax
1016         testb   $3, %al
1017         jz      trap_from_kernel
1018
1019         TIME_TRAP_UENTRY
1020
1021         /* Check for active vtimers in the current task */
1022         mov     %gs:CPU_ACTIVE_THREAD, %rcx
1023         movl    $-1, TH_IOTIER_OVERRIDE(%rcx)   /* Reset IO tier override to -1 before handling trap/exception */
1024         mov     TH_TASK(%rcx), %rbx
1025         TASK_VTIMER_CHECK(%rbx, %rcx)
1026
1027         CCALL1(user_trap, %r15)                 /* call user trap routine */
1028         /* user_trap() unmasks interrupts */
1029         cli                                     /* hold off intrs - critical section */
1030         xorl    %ecx, %ecx                      /* don't check if we're in the PFZ */
1031
1032
1033 Entry(return_from_trap)
1034         movq    %gs:CPU_ACTIVE_THREAD,%r15      /* Get current thread */
1035         movl    $-1, TH_IOTIER_OVERRIDE(%r15)   /* Reset IO tier override to -1 before returning to userspace */
1036         cmpl    $0, TH_RWLOCK_COUNT(%r15)       /* Check if current thread has pending RW locks held */
1037         jz      1f
1038         xorq    %rbp, %rbp              /* clear framepointer */
1039         mov     %r15, %rdi              /* Set RDI to current thread */
1040         CCALL(lck_rw_clear_promotions_x86)      /* Clear promotions if needed */
1041 1:
1042         movq    TH_PCB_ISS(%r15), %r15          /* PCB stack */
1043         movl    %gs:CPU_PENDING_AST,%eax
1044         testl   %eax,%eax
1045         je      EXT(return_to_user)             /* branch if no AST */
1046
1047 L_return_from_trap_with_ast:
1048         testl   %ecx, %ecx              /* see if we need to check for an EIP in the PFZ */
1049         je      2f                      /* no, go handle the AST */
1050         cmpl    $(SS_64), SS_FLAVOR(%r15)       /* are we a 64-bit task? */
1051         je      1f
1052                                         /* no... 32-bit user mode */
1053         movl    R32_EIP(%r15), %edi
1054         xorq    %rbp, %rbp              /* clear framepointer */
1055         CCALL(commpage_is_in_pfz32)
1056         testl   %eax, %eax
1057         je      2f                      /* not in the PFZ... go service AST */
1058         movl    %eax, R32_EBX(%r15)     /* let the PFZ know we've pended an AST */
1059         jmp     EXT(return_to_user)
1060 1:
1061         movq    R64_RIP(%r15), %rdi
1062         xorq    %rbp, %rbp              /* clear framepointer */
1063         CCALL(commpage_is_in_pfz64)
1064         testl   %eax, %eax
1065         je      2f                      /* not in the PFZ... go service AST */
1066         movl    %eax, R64_RBX(%r15)     /* let the PFZ know we've pended an AST */
1067         jmp     EXT(return_to_user)
1068 2:
1069         sti                             /* interrupts always enabled on return to user mode */
1070
1071         xor     %edi, %edi              /* zero %rdi */
1072         xorq    %rbp, %rbp              /* clear framepointer */
1073         CCALL(i386_astintr)             /* take the AST */
1074
1075         cli
1076         mov     %rsp, %r15              /* AST changes stack, saved state */
1077         xorl    %ecx, %ecx              /* don't check if we're in the PFZ */
1078         jmp     EXT(return_from_trap)   /* and check again (rare) */
1079
1080 /*
1081  * Trap from kernel mode.  No need to switch stacks.
1082  * Interrupts must be off here - we will set them to state at time of trap
1083  * as soon as it's safe for us to do so and not recurse doing preemption
1084  *
1085  */
1086 trap_from_kernel:
1087         movq    %r15, %rdi              /* saved state addr */
1088         pushq   R64_RIP(%r15)           /* Simulate a CALL from fault point */
1089         pushq   %rbp                    /* Extend framepointer chain */
1090         movq    %rsp, %rbp
1091         CCALLWITHSP(kernel_trap)        /* to kernel trap routine */
1092         popq    %rbp
1093         addq    $8, %rsp
1094         mov     %rsp, %r15              /* DTrace slides stack/saved-state */
1095         cli
1096
1097         movl    %gs:CPU_PENDING_AST,%eax        /* get pending asts */
1098         testl   $(AST_URGENT),%eax              /* any urgent preemption? */
1099         je      ret_to_kernel                   /* no, nothing to do */
1100         cmpl    $(T_PREEMPT),R64_TRAPNO(%r15)
1101         je      ret_to_kernel                   /* T_PREEMPT handled in kernel_trap() */
1102         testl   $(EFL_IF),R64_RFLAGS(%r15)      /* interrupts disabled? */
1103         je      ret_to_kernel
1104         cmpl    $0,%gs:CPU_PREEMPTION_LEVEL     /* preemption disabled? */
1105         jne     ret_to_kernel
1106         movq    %gs:CPU_KERNEL_STACK,%rax
1107         movq    %rsp,%rcx
1108         xorq    %rax,%rcx
1109         andq    EXT(kernel_stack_mask)(%rip),%rcx
1110         testq   %rcx,%rcx               /* are we on the kernel stack? */
1111         jne     ret_to_kernel           /* no, skip it */
1112
1113         CCALL1(i386_astintr, $1)        /* take the AST */
1114
1115         mov     %rsp, %r15              /* AST changes stack, saved state */
1116         jmp     ret_to_kernel
1117
1118
1119 /*
1120  * All interrupts on all tasks enter here with:
1121  *      r15      x86_saved_state_t
1122  *      rsp      kernel or interrupt stack
1123  *      esi      cs at trap
1124  *
1125  *      both rsp and r15 are 16-byte aligned
1126  *      interrupts disabled
1127  *      direction flag cleared
1128  */
1129 Entry(hndl_allintrs)
1130         /*
1131          * test whether already on interrupt stack
1132          */
1133         movq    %gs:CPU_INT_STACK_TOP,%rcx
1134         cmpq    %rsp,%rcx
1135         jb      1f
1136         leaq    -INTSTACK_SIZE(%rcx),%rdx
1137         cmpq    %rsp,%rdx
1138         jb      int_from_intstack
1139 1:
1140         xchgq   %rcx,%rsp               /* switch to interrupt stack */
1141
1142         mov     %cr0,%rax               /* get cr0 */
1143         orl     $(CR0_TS),%eax          /* or in TS bit */
1144         mov     %rax,%cr0               /* set cr0 */
1145
1146         pushq   %rcx                    /* save pointer to old stack */
1147         pushq   %gs:CPU_INT_STATE       /* save previous intr state */
1148         movq    %r15,%gs:CPU_INT_STATE  /* set intr state */
1149
1150         TIME_INT_ENTRY                  /* do timing */
1151
1152         /* Check for active vtimers in the current task */
1153         mov     %gs:CPU_ACTIVE_THREAD, %rcx
1154         mov     TH_TASK(%rcx), %rbx
1155         TASK_VTIMER_CHECK(%rbx, %rcx)
1156
1157         incl    %gs:CPU_PREEMPTION_LEVEL
1158         incl    %gs:CPU_INTERRUPT_LEVEL
1159
1160         CCALL1(interrupt, %r15)         /* call generic interrupt routine */
1161
1162         .globl  EXT(return_to_iret)
1163 LEXT(return_to_iret)                    /* (label for kdb_kintr and hardclock) */
1164
1165         decl    %gs:CPU_INTERRUPT_LEVEL
1166         decl    %gs:CPU_PREEMPTION_LEVEL
1167
1168         TIME_INT_EXIT                   /* do timing */
1169
1170         popq    %gs:CPU_INT_STATE       /* reset/clear intr state pointer */
1171         popq    %rsp                    /* switch back to old stack */
1172
1173         movq    %gs:CPU_ACTIVE_THREAD,%rax
1174         movq    TH_PCB_FPS(%rax),%rax   /* get pcb's ifps */
1175         cmpq    $0,%rax                 /* Is there a context */
1176         je      1f                      /* Branch if not */
1177         movl    FP_VALID(%rax),%eax     /* Load fp_valid */
1178         cmpl    $0,%eax                 /* Check if valid */
1179         jne     1f                      /* Branch if valid */
1180         clts                            /* Clear TS */
1181         jmp     2f
1182 1:
1183         mov     %cr0,%rax               /* get cr0 */
1184         orl     $(CR0_TS),%eax          /* or in TS bit */
1185         mov     %rax,%cr0               /* set cr0 */
1186 2:
1187         /* Load interrupted code segment into %eax */
1188         movl    R32_CS(%r15),%eax       /* assume 32-bit state */
1189         cmpl    $(SS_64),SS_FLAVOR(%r15)/* 64-bit? */
1190 #if DEBUG_IDT64
1191         jne     4f
1192         movl    R64_CS(%r15),%eax       /* 64-bit user mode */
1193         jmp     3f
1194 4:
1195         cmpl    $(SS_32),SS_FLAVOR(%r15)
1196         je      3f
1197         POSTCODE2(0x6431)
1198         CCALL1(panic_idt64, %r15)
1199         hlt
1200 #else
1201         jne     3f
1202         movl    R64_CS(%r15),%eax       /* 64-bit user mode */
1203 #endif
1204 3:
1205         testb   $3,%al                  /* user mode, */
1206         jnz     ast_from_interrupt_user /* go handle potential ASTs */
1207         /*
1208          * we only want to handle preemption requests if
1209          * the interrupt fell in the kernel context
1210          * and preemption isn't disabled
1211          */
1212         movl    %gs:CPU_PENDING_AST,%eax
1213         testl   $(AST_URGENT),%eax              /* any urgent requests? */
1214         je      ret_to_kernel                   /* no, nothing to do */
1215
1216         cmpl    $0,%gs:CPU_PREEMPTION_LEVEL     /* preemption disabled? */
1217         jne     ret_to_kernel                   /* yes, skip it */
1218
1219         /*
1220          * Take an AST from kernel space.  We don't need (and don't want)
1221          * to do as much as the case where the interrupt came from user
1222          * space.
1223          */
1224         CCALL1(i386_astintr, $1)
1225
1226         mov     %rsp, %r15              /* AST changes stack, saved state */
1227         jmp     ret_to_kernel
1228
1229
1230 /*
1231  * nested int - simple path, can't preempt etc on way out
1232  */
1233 int_from_intstack:
1234         incl    %gs:CPU_PREEMPTION_LEVEL
1235         incl    %gs:CPU_INTERRUPT_LEVEL
1236         incl    %gs:CPU_NESTED_ISTACK
1237
1238         push    %gs:CPU_INT_STATE
1239         mov     %r15, %gs:CPU_INT_STATE
1240
1241         CCALL1(interrupt, %r15)
1242
1243         pop     %gs:CPU_INT_STATE
1244
1245         decl    %gs:CPU_INTERRUPT_LEVEL
1246         decl    %gs:CPU_PREEMPTION_LEVEL
1247         decl    %gs:CPU_NESTED_ISTACK
1248
1249         jmp     ret_to_kernel
1250
1251 /*
1252  *      Take an AST from an interrupted user
1253  */
1254 ast_from_interrupt_user:
1255         movl    %gs:CPU_PENDING_AST,%eax
1256         testl   %eax,%eax               /* pending ASTs? */
1257         je      EXT(ret_to_user)        /* no, nothing to do */
1258
1259         TIME_TRAP_UENTRY
1260
1261         movl    $1, %ecx                /* check if we're in the PFZ */
1262         jmp     L_return_from_trap_with_ast     /* return */
1263
1264
1265 /* Syscall dispatch routines! */
1266
1267 /*
1268  *
1269  * 32bit Tasks
1270  * System call entries via INTR_GATE or sysenter:
1271  *
1272  *      r15      x86_saved_state32_t
1273  *      rsp      kernel stack
1274  *
1275  *      both rsp and r15 are 16-byte aligned
1276  *      interrupts disabled
1277  *      direction flag cleared
1278  */
1279
1280 Entry(hndl_sysenter)
1281         /*
1282          * We can be here either for a mach syscall or a unix syscall,
1283          * as indicated by the sign of the code:
1284          */
1285         movl    R32_EAX(%r15),%eax
1286         testl   %eax,%eax
1287         js      EXT(hndl_mach_scall)            /* < 0 => mach */
1288                                                 /* > 0 => unix */
1289
1290 Entry(hndl_unix_scall)
1291
1292         TIME_TRAP_UENTRY
1293
1294         movq    %gs:CPU_ACTIVE_THREAD,%rcx      /* get current thread     */
1295         movq    TH_TASK(%rcx),%rbx              /* point to current task  */
1296         incl    TH_SYSCALLS_UNIX(%rcx)          /* increment call count   */
1297
1298         /* Check for active vtimers in the current task */
1299         TASK_VTIMER_CHECK(%rbx,%rcx)
1300
1301         sti
1302
1303         CCALL1(unix_syscall, %r15)
1304         /*
1305          * always returns through thread_exception_return
1306          */
1307
1308
1309 Entry(hndl_mach_scall)
1310         TIME_TRAP_UENTRY
1311
1312         movq    %gs:CPU_ACTIVE_THREAD,%rcx      /* get current thread     */
1313         movq    TH_TASK(%rcx),%rbx              /* point to current task  */
1314         incl    TH_SYSCALLS_MACH(%rcx)          /* increment call count   */
1315
1316         /* Check for active vtimers in the current task */
1317         TASK_VTIMER_CHECK(%rbx,%rcx)
1318
1319         sti
1320
1321         CCALL1(mach_call_munger, %r15)
1322         /*
1323          * always returns through thread_exception_return
1324          */
1325
1326
1327 Entry(hndl_mdep_scall)
1328         TIME_TRAP_UENTRY
1329
1330         /* Check for active vtimers in the current task */
1331         movq    %gs:CPU_ACTIVE_THREAD,%rcx      /* get current thread     */
1332         movq    TH_TASK(%rcx),%rbx              /* point to current task  */
1333         TASK_VTIMER_CHECK(%rbx,%rcx)
1334
1335         sti
1336
1337         CCALL1(machdep_syscall, %r15)
1338         /*
1339          * always returns through thread_exception_return
1340          */
1341
1342 /*
1343  * 64bit Tasks
1344  * System call entries via syscall only:
1345  *
1346  *      r15      x86_saved_state64_t
1347  *      rsp      kernel stack
1348  *
1349  *      both rsp and r15 are 16-byte aligned
1350  *      interrupts disabled
1351  *      direction flag cleared
1352  */
1353
1354 Entry(hndl_syscall)
1355         TIME_TRAP_UENTRY
1356
1357         movq    %gs:CPU_ACTIVE_THREAD,%rcx      /* get current thread     */
1358         movl    $-1, TH_IOTIER_OVERRIDE(%rcx)   /* Reset IO tier override to -1 before handling syscall */
1359         movq    TH_TASK(%rcx),%rbx              /* point to current task  */
1360
1361         /* Check for active vtimers in the current task */
1362         TASK_VTIMER_CHECK(%rbx,%rcx)
1363
1364         /*
1365          * We can be here either for a mach, unix machdep or diag syscall,
1366          * as indicated by the syscall class:
1367          */
1368         movl    R64_RAX(%r15), %eax             /* syscall number/class */
1369         movl    %eax, %edx
1370         andl    $(SYSCALL_CLASS_MASK), %edx     /* syscall class */
1371         cmpl    $(SYSCALL_CLASS_MACH<<SYSCALL_CLASS_SHIFT), %edx
1372         je      EXT(hndl_mach_scall64)
1373         cmpl    $(SYSCALL_CLASS_UNIX<<SYSCALL_CLASS_SHIFT), %edx
1374         je      EXT(hndl_unix_scall64)
1375         cmpl    $(SYSCALL_CLASS_MDEP<<SYSCALL_CLASS_SHIFT), %edx
1376         je      EXT(hndl_mdep_scall64)
1377         cmpl    $(SYSCALL_CLASS_DIAG<<SYSCALL_CLASS_SHIFT), %edx
1378         je      EXT(hndl_diag_scall64)
1379
1380         /* Syscall class unknown */
1381         sti
1382         CCALL3(i386_exception, $(EXC_SYSCALL), %rax, $1)
1383         /* no return */
1384
1385
1386 Entry(hndl_unix_scall64)
1387         incl    TH_SYSCALLS_UNIX(%rcx)          /* increment call count   */
1388         sti
1389
1390         CCALL1(unix_syscall64, %r15)
1391         /*
1392          * always returns through thread_exception_return
1393          */
1394
1395
1396 Entry(hndl_mach_scall64)
1397         incl    TH_SYSCALLS_MACH(%rcx)          /* increment call count   */
1398         sti
1399
1400         CCALL1(mach_call_munger64, %r15)
1401         /*
1402          * always returns through thread_exception_return
1403          */
1404
1405
1406
1407 Entry(hndl_mdep_scall64)
1408         sti
1409
1410         CCALL1(machdep_syscall64, %r15)
1411         /*
1412          * always returns through thread_exception_return
1413          */
1414
1415 Entry(hndl_diag_scall64)
1416         CCALL1(diagCall64, %r15)        // Call diagnostics
1417         test    %eax, %eax              // What kind of return is this?
1418         je      1f                      // - branch if bad (zero)
1419         jmp     EXT(return_to_user)     // Normal return, do not check asts...
1420 1:
1421         sti
1422         CCALL3(i386_exception, $EXC_SYSCALL, $0x6000, $1)
1423         /* no return */
1424
1425 Entry(hndl_machine_check)
1426         CCALL1(panic_machine_check64, %r15)
1427         hlt
1428
1429 Entry(hndl_double_fault)
1430         CCALL1(panic_double_fault64, %r15)
1431         hlt