osfmk/i386/trap_native.c

   1 /*
   2  * Copyright (c) 2009 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*
  29 * @OSF_COPYRIGHT@
  30 */
  31 /*
  32 * Mach Operating System
  33 * Copyright (c) 1991,1990,1989,1988 Carnegie Mellon University
  34 * All Rights Reserved.
  35 *
  36 * Permission to use, copy, modify and distribute this software and its
  37 * documentation is hereby granted, provided that both the copyright
  38 * notice and this permission notice appear in all copies of the
  39 * software, derivative works or modified versions, and any portions
  40 * thereof, and that both notices appear in supporting documentation.
  41 *
  42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  43 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  45 *
  46 * Carnegie Mellon requests users of this software to return to
  47 *
  48 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  49 *  School of Computer Science
  50 *  Carnegie Mellon University
  51 *  Pittsburgh PA 15213-3890
  52 *
  53 * any improvements or extensions that they make and grant Carnegie Mellon
  54 * the rights to redistribute these changes.
  55 */
  56 /*
  57 */
  58
  59 /*
  60 * Hardware trap/fault handler.
  61  */
  62
  63 #include <types.h>
  64 #include <i386/eflags.h>
  65 #include <i386/trap.h>
  66 #include <i386/pmap.h>
  67 #include <i386/fpu.h>
  68 #include <i386/misc_protos.h> /* panic_io_port_read() */
  69
  70 #include <mach/exception.h>
  71 #include <mach/kern_return.h>
  72 #include <mach/vm_param.h>
  73 #include <mach/i386/thread_status.h>
  74
  75 #include <kern/kern_types.h>
  76 #include <kern/processor.h>
  77 #include <kern/thread.h>
  78 #include <kern/task.h>
  79 #include <kern/sched.h>
  80 #include <kern/sched_prim.h>
  81 #include <kern/exception.h>
  82 #include <kern/spl.h>
  83 #include <kern/misc_protos.h>
  84 #include <kern/debug.h>
  85
  86 #include <sys/kdebug.h>
  87
  88 #include <string.h>
  89
  90 #include <i386/postcode.h>
  91 #include <i386/mp_desc.h>
  92 #include <i386/proc_reg.h>
  93 #if CONFIG_MCA
  94 #include <i386/machine_check.h>
  95 #endif
  96 #include <mach/i386/syscall_sw.h>
  97
  98 #include <machine/pal_routines.h>
  99 #include <libkern/OSAtomic.h>
 100
 101 extern void kprintf_break_lock(void);
 102 extern void kprint_state(x86_saved_state64_t *saved_state);
 103 void panic_64(x86_saved_state_t *, int, const char *, boolean_t);
 104
 105 extern volatile int panic_double_fault_cpu;
 106
 107 #if defined(__x86_64__) && DEBUG
 108 /*
 109  * K64 debug - fatal handler for debug code in the trap vectors.
 110  */
 111 extern void
 112 panic_idt64(x86_saved_state_t *rsp);
 113 void
 114 panic_idt64(x86_saved_state_t *rsp)
 115 {
 116         kprint_state(saved_state64(rsp));
 117         panic("panic_idt64");
 118 }
 119 #endif
 120
 121 #ifdef __i386__
 122 static void
 123 panic_32(__unused int code, __unused int pc, __unused const char *msg, boolean_t do_mca_dump, boolean_t do_bt)
 124 {
 125         struct i386_tss *my_ktss = current_ktss();
 126
 127         /* Set postcode (DEBUG only) */
 128         postcode(pc);
 129
 130         /*
 131          * Issue an I/O port read if one has been requested - this is an
 132          * event logic analyzers can use as a trigger point.
 133          */
 134         panic_io_port_read();
 135
 136         /*
 137          * Break kprintf lock in case of recursion,
 138          * and record originally faulted instruction address.
 139          */
 140         kprintf_break_lock();
 141
 142         if (do_mca_dump) {
 143 #if CONFIG_MCA
 144                 /*
 145                  * Dump the contents of the machine check MSRs (if any).
 146                  */
 147                 mca_dump();
 148 #endif
 149         }
 150
 151 #if MACH_KDP
 152         /*
 153          * Print backtrace leading to first fault:
 154          */
 155         if (do_bt)
 156                 panic_i386_backtrace((void *) my_ktss->ebp, 10, NULL, FALSE, NULL);
 157 #endif
 158
 159         panic("%s at 0x%08x, code:0x%x, "
 160               "registers:\n"
 161               "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n"
 162               "EAX: 0x%08x, EBX: 0x%08x, ECX: 0x%08x, EDX: 0x%08x\n"
 163               "ESP: 0x%08x, EBP: 0x%08x, ESI: 0x%08x, EDI: 0x%08x\n"
 164               "EFL: 0x%08x, EIP: 0x%08x\n",
 165                   msg,
 166               my_ktss->eip, code,
 167               (uint32_t)get_cr0(), (uint32_t)get_cr2(), (uint32_t)get_cr3(), (uint32_t)get_cr4(),
 168               my_ktss->eax, my_ktss->ebx, my_ktss->ecx, my_ktss->edx,
 169               my_ktss->esp, my_ktss->ebp, my_ktss->esi, my_ktss->edi,
 170               my_ktss->eflags, my_ktss->eip);
 171 }
 172
 173 /*
 174  * Called from locore on a special reserved stack after a double-fault
 175  * is taken in kernel space.
 176  * Kernel stack overflow is one route here.
 177  */
 178 void
 179 panic_double_fault32(int code)
 180 {
 181         (void)OSCompareAndSwap((UInt32) -1, (UInt32) cpu_number(), (volatile UInt32 *)&panic_double_fault_cpu);
 182         panic_32(code, PANIC_DOUBLE_FAULT, "Double fault", FALSE, TRUE);
 183 }
 184
 185 /*
 186  * Called from locore on a special reserved stack after a machine-check
 187  */
 188 void
 189 panic_machine_check32(int code)
 190 {
 191         panic_32(code, PANIC_MACHINE_CHECK, "Machine-check", TRUE, FALSE);
 192 }
 193 #endif /* __i386__ */
 194
 195 void
 196 panic_64(x86_saved_state_t *sp, __unused int pc, __unused const char *msg, boolean_t do_mca_dump)
 197 {
 198         /* Set postcode (DEBUG only) */
 199         postcode(pc);
 200
 201         /*
 202          * Issue an I/O port read if one has been requested - this is an
 203          * event logic analyzers can use as a trigger point.
 204          */
 205         panic_io_port_read();
 206
 207
 208         /*
 209          * Break kprintf lock in case of recursion,
 210          * and record originally faulted instruction address.
 211          */
 212         kprintf_break_lock();
 213
 214         if (do_mca_dump) {
 215 #if CONFIG_MCA
 216                 /*
 217                  * Dump the contents of the machine check MSRs (if any).
 218                  */
 219                 mca_dump();
 220 #endif
 221         }
 222
 223 #ifdef __i386__
 224         /*
 225          * Dump the interrupt stack frame at last kernel entry.
 226          */
 227         if (is_saved_state64(sp)) {
 228                 x86_saved_state64_t     *ss64p = saved_state64(sp);
 229                 panic("%s trapno:0x%x, err:0x%qx, "
 230                       "registers:\n"
 231                       "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n"
 232                       "RAX: 0x%016qx, RBX: 0x%016qx, RCX: 0x%016qx, RDX: 0x%016qx\n"
 233                       "RSP: 0x%016qx, RBP: 0x%016qx, RSI: 0x%016qx, RDI: 0x%016qx\n"
 234                       "R8:  0x%016qx, R9:  0x%016qx, R10: 0x%016qx, R11: 0x%016qx\n"
 235                       "R12: 0x%016qx, R13: 0x%016qx, R14: 0x%016qx, R15: 0x%016qx\n"
 236                       "RFL: 0x%016qx, RIP: 0x%016qx, CR2: 0x%016qx\n",
 237                           msg,
 238                       ss64p->isf.trapno, ss64p->isf.err,
 239                       (uint32_t)get_cr0(), (uint32_t)get_cr2(), (uint32_t)get_cr3(), (uint32_t)get_cr4(),
 240                       ss64p->rax, ss64p->rbx, ss64p->rcx, ss64p->rdx,
 241                       ss64p->isf.rsp, ss64p->rbp, ss64p->rsi, ss64p->rdi,
 242                       ss64p->r8, ss64p->r9, ss64p->r10, ss64p->r11,
 243                       ss64p->r12, ss64p->r13, ss64p->r14, ss64p->r15,
 244                       ss64p->isf.rflags, ss64p->isf.rip, ss64p->cr2);
 245         } else {
 246                 x86_saved_state32_t     *ss32p = saved_state32(sp);
 247                 panic("%s at 0x%08x, trapno:0x%x, err:0x%x,"
 248                       "registers:\n"
 249                       "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n"
 250                       "EAX: 0x%08x, EBX: 0x%08x, ECX: 0x%08x, EDX: 0x%08x\n"
 251                       "ESP: 0x%08x, EBP: 0x%08x, ESI: 0x%08x, EDI: 0x%08x\n"
 252                       "EFL: 0x%08x, EIP: 0x%08x\n",
 253                       msg,
 254                           ss32p->eip, ss32p->trapno, ss32p->err,
 255                       (uint32_t)get_cr0(), (uint32_t)get_cr2(), (uint32_t)get_cr3(), (uint32_t)get_cr4(),
 256                       ss32p->eax, ss32p->ebx, ss32p->ecx, ss32p->edx,
 257                       ss32p->uesp, ss32p->ebp, ss32p->esi, ss32p->edi,
 258                       ss32p->efl, ss32p->eip);
 259         }
 260 #else
 261         x86_saved_state64_t *regs = saved_state64(sp);
 262         panic("%s at 0x%016llx, registers:\n"
 263               "CR0: 0x%016lx, CR2: 0x%016lx, CR3: 0x%016lx, CR4: 0x%016lx\n"
 264               "RAX: 0x%016llx, RBX: 0x%016llx, RCX: 0x%016llx, RDX: 0x%016llx\n"
 265               "RSP: 0x%016llx, RBP: 0x%016llx, RSI: 0x%016llx, RDI: 0x%016llx\n"
 266               "R8:  0x%016llx, R9:  0x%016llx, R10: 0x%016llx, R11: 0x%016llx\n"
 267               "R12: 0x%016llx, R13: 0x%016llx, R14: 0x%016llx, R15: 0x%016llx\n"
 268               "RFL: 0x%016llx, RIP: 0x%016llx, CS:  0x%016llx, SS:  0x%016llx\n"
 269               "Error code: 0x%016llx\n",
 270               msg,
 271                   regs->isf.rip,
 272               get_cr0(), get_cr2(), get_cr3_raw(), get_cr4(),
 273               regs->rax, regs->rbx, regs->rcx, regs->rdx,
 274               regs->isf.rsp, regs->rbp, regs->rsi, regs->rdi,
 275               regs->r8,  regs->r9,  regs->r10, regs->r11,
 276               regs->r12, regs->r13, regs->r14, regs->r15,
 277               regs->isf.rflags, regs->isf.rip, regs->isf.cs & 0xFFFF,  regs->isf.ss & 0xFFFF,
 278               regs->isf.err);
 279 #endif
 280 }
 281
 282 void
 283 panic_double_fault64(x86_saved_state_t *sp)
 284 {
 285         (void)OSCompareAndSwap((UInt32) -1, (UInt32) cpu_number(), (volatile UInt32 *)&panic_double_fault_cpu);
 286         panic_64(sp, PANIC_DOUBLE_FAULT, "Double fault", FALSE);
 287
 288 }
 289 void
 290
 291 panic_machine_check64(x86_saved_state_t *sp)
 292 {
 293         panic_64(sp, PANIC_MACHINE_CHECK, "Machine Check", TRUE);
 294
 295 }