osfmk/i386/pmap.h

   1 /*
   2  * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * @OSF_COPYRIGHT@
  24  */
  25 /*
  26  * Mach Operating System
  27  * Copyright (c) 1991,1990,1989,1988 Carnegie Mellon University
  28  * All Rights Reserved.
  29  *
  30  * Permission to use, copy, modify and distribute this software and its
  31  * documentation is hereby granted, provided that both the copyright
  32  * notice and this permission notice appear in all copies of the
  33  * software, derivative works or modified versions, and any portions
  34  * thereof, and that both notices appear in supporting documentation.
  35  *
  36  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  37  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  38  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  39  *
  40  * Carnegie Mellon requests users of this software to return to
  41  *
  42  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  43  *  School of Computer Science
  44  *  Carnegie Mellon University
  45  *  Pittsburgh PA 15213-3890
  46  *
  47  * any improvements or extensions that they make and grant Carnegie Mellon
  48  * the rights to redistribute these changes.
  49  */
  50 /*
  51  */
  52
  53 /*
  54  *      File:   pmap.h
  55  *
  56  *      Authors:  Avadis Tevanian, Jr., Michael Wayne Young
  57  *      Date:   1985
  58  *
  59  *      Machine-dependent structures for the physical map module.
  60  */
  61
  62 #ifndef _PMAP_MACHINE_
  63 #define _PMAP_MACHINE_  1
  64
  65 #ifndef ASSEMBLER
  66
  67 #include <platforms.h>
  68
  69 #include <mach/kern_return.h>
  70 #include <mach/machine/vm_types.h>
  71 #include <mach/vm_prot.h>
  72 #include <mach/vm_statistics.h>
  73 #include <mach/machine/vm_param.h>
  74 #include <kern/kern_types.h>
  75 #include <kern/thread.h>
  76 #include <kern/lock.h>
  77 #define PMAP_QUEUE 1
  78 #ifdef PMAP_QUEUE
  79 #include <kern/queue.h>
  80 #endif
  81
  82 /*
  83  *      Define the generic in terms of the specific
  84  */
  85
  86 #define INTEL_PGBYTES           I386_PGBYTES
  87 #define INTEL_PGSHIFT           I386_PGSHIFT
  88 #define intel_btop(x)           i386_btop(x)
  89 #define intel_ptob(x)           i386_ptob(x)
  90 #define intel_round_page(x)     i386_round_page(x)
  91 #define intel_trunc_page(x)     i386_trunc_page(x)
  92 #define trunc_intel_to_vm(x)    trunc_i386_to_vm(x)
  93 #define round_intel_to_vm(x)    round_i386_to_vm(x)
  94 #define vm_to_intel(x)          vm_to_i386(x)
  95
  96 /*
  97  *      i386/i486/i860 Page Table Entry
  98  */
  99
 100 #ifdef PAE
 101 typedef uint64_t        pdpt_entry_t;
 102 typedef uint64_t        pt_entry_t;
 103 typedef uint64_t        pd_entry_t;
 104 typedef uint64_t        pmap_paddr_t;
 105 #else
 106 typedef uint32_t        pt_entry_t;
 107 typedef uint32_t        pd_entry_t;
 108 typedef uint32_t        pmap_paddr_t;
 109 #endif
 110
 111 #define PT_ENTRY_NULL   ((pt_entry_t *) 0)
 112 #define PD_ENTRY_NULL   ((pt_entry_t *) 0)
 113
 114 #endif  /* ASSEMBLER */
 115
 116 #ifdef PAE
 117 #define NPGPTD          4
 118 #define PDESHIFT        21
 119 #define PTEMASK         0x1ff
 120 #define PTEINDX         3
 121 #else
 122 #define NPGPTD          1
 123 #define PDESHIFT        22
 124 #define PTEMASK         0x3ff
 125 #define PTEINDX         2
 126 #endif
 127 #define PTESHIFT        12
 128
 129 #define PDESIZE         sizeof(pd_entry_t) /* for assembly files */
 130 #define PTESIZE         sizeof(pt_entry_t) /* for assembly files */
 131
 132 #define INTEL_OFFMASK   (I386_PGBYTES - 1)
 133 #define PG_FRAME        (~((pmap_paddr_t)PAGE_MASK))
 134 #define NPTEPG          (PAGE_SIZE/(sizeof (pt_entry_t)))
 135
 136 #define NBPTD           (NPGPTD << PAGE_SHIFT)
 137 #define NPDEPTD         (NBPTD / (sizeof (pd_entry_t)))
 138 #define NPDEPG          (PAGE_SIZE/(sizeof (pd_entry_t)))
 139 #define NBPDE           (1 << PDESHIFT)
 140 #define PDEMASK         (NBPDE - 1)
 141
 142 #define VM_WIMG_COPYBACK        VM_MEM_COHERENT
 143 #define VM_WIMG_DEFAULT         VM_MEM_COHERENT
 144 /* ?? intel ?? */
 145 #define VM_WIMG_IO              (VM_MEM_COHERENT |      \
 146                                 VM_MEM_NOT_CACHEABLE | VM_MEM_GUARDED)
 147 #define VM_WIMG_WTHRU           (VM_MEM_WRITE_THROUGH | VM_MEM_COHERENT | VM_MEM_GUARDED)
 148 /* write combining mode, aka store gather */
 149 #define VM_WIMG_WCOMB           (VM_MEM_NOT_CACHEABLE | VM_MEM_COHERENT)
 150
 151 /*
 152  * Size of Kernel address space.  This is the number of page table pages
 153  * (4MB each) to use for the kernel.  256 pages == 1 Gigabyte.
 154  * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
 155  */
 156 #ifndef KVA_PAGES
 157 #define KVA_PAGES       256
 158 #endif
 159
 160 /*
 161  * Pte related macros
 162  */
 163 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDESHIFT)|((pti)<<PTESHIFT)))
 164
 165 #ifndef NKPT
 166 #ifdef PAE
 167 #define NKPT            500     /* actual number of kernel page tables */
 168 #else
 169 #define NKPT            32      /* initial number of kernel page tables */
 170 #endif
 171 #endif
 172 #ifndef NKPDE
 173 #define NKPDE   (KVA_PAGES - 1) /* addressable number of page tables/pde's */
 174 #endif
 175
 176 /*
 177  * The *PTDI values control the layout of virtual memory
 178  *
 179  */
 180 #ifdef PAE
 181 #define        KPTDI           (0x600)/* start of kernel virtual pde's */
 182 #define        PTDPTDI         (0x7F4) /* ptd entry that points to ptd! */
 183 #define        APTDPTDI        (0x7F8) /* alt ptd entry that points to APTD */
 184 #define        UMAXPTDI        (0x5FC) /* ptd entry for user space end */
 185 #define UMAXPTEOFF      (NPTEPG)        /* pte entry for user space end */
 186 #else
 187 #define        KPTDI           (0x300)/* start of kernel virtual pde's */
 188 #define        PTDPTDI         (0x3FD) /* ptd entry that points to ptd! */
 189 #define        APTDPTDI        (0x3FE) /* alt ptd entry that points to APTD */
 190 #define        UMAXPTDI        (0x2FF) /* ptd entry for user space end */
 191 #define UMAXPTEOFF      (NPTEPG)        /* pte entry for user space end */
 192 #endif
 193
 194 #define KERNBASE       VADDR(KPTDI,0)
 195
 196 /*
 197  *      Convert address offset to page descriptor index
 198  */
 199 #define pdenum(pmap, a) (((a) >> PDESHIFT) & PDEMASK)
 200
 201
 202 /*
 203  *      Convert page descriptor index to user virtual address
 204  */
 205 #define pdetova(a)      ((vm_offset_t)(a) << PDESHIFT)
 206
 207 /*
 208  *      Convert address offset to page table index
 209  */
 210 #define ptenum(a)       (((a) >> PTESHIFT) & PTEMASK)
 211
 212 /*
 213  *      Hardware pte bit definitions (to be used directly on the ptes
 214  *      without using the bit fields).
 215  */
 216
 217 #define INTEL_PTE_VALID         0x00000001
 218 #define INTEL_PTE_WRITE         0x00000002
 219 #define INTEL_PTE_RW            0x00000002
 220 #define INTEL_PTE_USER          0x00000004
 221 #define INTEL_PTE_WTHRU         0x00000008
 222 #define INTEL_PTE_NCACHE        0x00000010
 223 #define INTEL_PTE_REF           0x00000020
 224 #define INTEL_PTE_MOD           0x00000040
 225 #define INTEL_PTE_PS            0x00000080
 226 #define INTEL_PTE_GLOBAL        0x00000100
 227 #define INTEL_PTE_WIRED         0x00000200
 228 #define INTEL_PTE_PFN           /*0xFFFFF000*/ (~0xFFF)
 229 #define INTEL_PTE_PTA           0x00000080
 230
 231 #define pa_to_pte(a)            ((a) & INTEL_PTE_PFN) /* XXX */
 232 #define pte_to_pa(p)            ((p) & INTEL_PTE_PFN) /* XXX */
 233 #define pte_increment_pa(p)     ((p) += INTEL_OFFMASK+1)
 234
 235 #define PMAP_DEFAULT_CACHE      0
 236 #define PMAP_INHIBIT_CACHE      1
 237 #define PMAP_GUARDED_CACHE      2
 238 #define PMAP_ACTIVATE_CACHE     4
 239 #define PMAP_NO_GUARD_CACHE     8
 240
 241
 242 #ifndef ASSEMBLER
 243
 244 #include <sys/queue.h>
 245
 246 /*
 247  * Address of current and alternate address space page table maps
 248  * and directories.
 249  */
 250
 251 extern pt_entry_t PTmap[], APTmap[], Upte;
 252 extern pd_entry_t PTD[], APTD[], PTDpde[], APTDpde[], Upde;
 253
 254 extern pd_entry_t *IdlePTD;     /* physical address of "Idle" state directory */
 255 #ifdef PAE
 256 extern pdpt_entry_t *IdlePDPT;
 257 #endif
 258
 259 /*
 260  * virtual address to page table entry and
 261  * to physical address. Likewise for alternate address space.
 262  * Note: these work recursively, thus vtopte of a pte will give
 263  * the corresponding pde that in turn maps it.
 264  */
 265 #define vtopte(va)      (PTmap + i386_btop(va))
 266
 267
 268 typedef volatile long   cpu_set;        /* set of CPUs - must be <= 32 */
 269                                         /* changed by other processors */
 270 struct md_page {
 271   int pv_list_count;
 272   TAILQ_HEAD(,pv_entry)  pv_list;
 273 };
 274
 275 #include <vm/vm_page.h>
 276
 277 /*
 278  *      For each vm_page_t, there is a list of all currently
 279  *      valid virtual mappings of that page.  An entry is
 280  *      a pv_entry_t; the list is the pv_table.
 281  */
 282
 283 struct pmap {
 284 #ifdef PMAP_QUEUE
 285   queue_head_t     pmap_link;   /* unordered queue of in use pmaps */
 286 #endif
 287         pd_entry_t      *dirbase;       /* page directory pointer register */
 288         pd_entry_t      *pdirbase;      /* phys. address of dirbase */
 289         vm_object_t     pm_obj;         /* object to hold pte's */
 290         int             ref_count;      /* reference count */
 291         decl_simple_lock_data(,lock)    /* lock on map */
 292         struct pmap_statistics  stats;  /* map statistics */
 293         cpu_set         cpus_using;     /* bitmap of cpus using pmap */
 294 #ifdef PAE
 295         vm_offset_t     pm_hold;        /* true pdpt zalloc addr */
 296         pdpt_entry_t    *pm_pdpt;       /* KVA of pg dir ptr table */
 297         vm_offset_t     pm_ppdpt;       /* phy addr pdpt
 298                                            should really be 32/64 bit */
 299 #endif
 300 };
 301
 302 #define PMAP_NWINDOWS   4
 303 typedef struct {
 304         pt_entry_t      *prv_CMAP;
 305         caddr_t         prv_CADDR;
 306 } mapwindow_t;
 307
 308 typedef struct cpu_pmap {
 309         mapwindow_t             mapwindow[PMAP_NWINDOWS];
 310         struct pmap             *real_pmap;
 311         struct pmap_update_list *update_list;
 312         volatile boolean_t      update_needed;
 313 } cpu_pmap_t;
 314
 315 /*
 316  * Should be rewritten in asm anyway.
 317  */
 318 #define CM1 (current_cpu_datap()->cpu_pmap->mapwindow[0].prv_CMAP)
 319 #define CM2 (current_cpu_datap()->cpu_pmap->mapwindow[1].prv_CMAP)
 320 #define CM3 (current_cpu_datap()->cpu_pmap->mapwindow[2].prv_CMAP)
 321 #define CM4 (current_cpu_datap()->cpu_pmap->mapwindow[3].prv_CMAP)
 322 #define CA1 (current_cpu_datap()->cpu_pmap->mapwindow[0].prv_CADDR)
 323 #define CA2 (current_cpu_datap()->cpu_pmap->mapwindow[1].prv_CADDR)
 324 #define CA3 (current_cpu_datap()->cpu_pmap->mapwindow[2].prv_CADDR)
 325 #define CA4 (current_cpu_datap()->cpu_pmap->mapwindow[3].prv_CADDR)
 326
 327 typedef struct pmap_memory_regions {
 328   ppnum_t base;
 329   ppnum_t end;
 330   ppnum_t alloc;
 331   uint32_t type;
 332 } pmap_memory_region_t;
 333
 334 unsigned pmap_memory_region_count;
 335 unsigned pmap_memory_region_current;
 336
 337 #define PMAP_MEMORY_REGIONS_SIZE 32
 338
 339 extern pmap_memory_region_t pmap_memory_regions[];
 340
 341 /*
 342  * Optimization avoiding some TLB flushes when switching to
 343  * kernel-loaded threads.  This is effective only for i386:
 344  * Since user task, kernel task and kernel loaded tasks share the
 345  * same virtual space (with appropriate protections), any pmap
 346  * allows mapping kernel and kernel loaded tasks.
 347  *
 348  * The idea is to avoid switching to another pmap unnecessarily when
 349  * switching to a kernel-loaded task, or when switching to the kernel
 350  * itself.
 351  *
 352  * We store the pmap we are really using (from which we fetched the
 353  * dirbase value) in current_cpu_datap()->cpu_pmap.real_pmap.
 354  *
 355  * Invariant:
 356  * current_pmap() == current_cpu_datap()->cpu_pmap.real_pmap ||
 357  *                      current_pmap() == kernel_pmap.
 358  */
 359 #define PMAP_REAL(my_cpu)       (cpu_datap(my_cpu)->cpu_pmap->real_pmap)
 360
 361 #include <i386/proc_reg.h>
 362 /*
 363  * If switching to the kernel pmap, don't incur the TLB cost of switching
 364  * to its page tables, since all maps include the kernel map as a subset.
 365  * Simply record that this CPU is logically on the kernel pmap (see
 366  * pmap_destroy).
 367  *
 368  * Similarly, if switching to a pmap (other than kernel_pmap that is already
 369  * in use, don't do anything to the hardware, to avoid a TLB flush.
 370  */
 371
 372 #define PMAP_CPU_SET(pmap, my_cpu) i_bit_set(my_cpu, &((pmap)->cpus_using))
 373 #define PMAP_CPU_CLR(pmap, my_cpu) i_bit_clear(my_cpu, &((pmap)->cpus_using))
 374
 375 #ifdef PAE
 376 #define PDIRBASE pm_ppdpt
 377 #else
 378 #define PDIRBASE pdirbase
 379 #endif
 380 #define set_dirbase(mypmap, my_cpu) {                                   \
 381         struct pmap     **ppmap = &PMAP_REAL(my_cpu);                   \
 382         pmap_paddr_t    pdirbase = (pmap_paddr_t)((mypmap)->PDIRBASE);          \
 383                                                                         \
 384         if (*ppmap == (pmap_paddr_t)NULL) {                             \
 385                 *ppmap = (mypmap);                                      \
 386                 PMAP_CPU_SET((mypmap), my_cpu);                         \
 387                 set_cr3(pdirbase);                                      \
 388         } else if ((mypmap) != kernel_pmap && (mypmap) != *ppmap ) {    \
 389                 if (*ppmap != kernel_pmap)                              \
 390                         PMAP_CPU_CLR(*ppmap, my_cpu);                   \
 391                 *ppmap = (mypmap);                                      \
 392                 PMAP_CPU_SET((mypmap), my_cpu);                         \
 393                 set_cr3(pdirbase);                                      \
 394         }                                                               \
 395         assert((mypmap) == *ppmap || (mypmap) == kernel_pmap);          \
 396 }
 397
 398 /*
 399  *      List of cpus that are actively using mapped memory.  Any
 400  *      pmap update operation must wait for all cpus in this list.
 401  *      Update operations must still be queued to cpus not in this
 402  *      list.
 403  */
 404 extern cpu_set          cpus_active;
 405
 406 /*
 407  *      List of cpus that are idle, but still operating, and will want
 408  *      to see any kernel pmap updates when they become active.
 409  */
 410 extern cpu_set          cpus_idle;
 411
 412
 413 #define cpu_update_needed(cpu)  cpu_datap(cpu)->cpu_pmap->update_needed
 414 #define cpu_update_list(cpu)    cpu_datap(cpu)->cpu_pmap->update_list
 415
 416 /*
 417  *      External declarations for PMAP_ACTIVATE.
 418  */
 419
 420 extern void             process_pmap_updates(struct pmap *pmap);
 421 extern void             pmap_update_interrupt(void);
 422
 423 /*
 424  *      Machine dependent routines that are used only for i386/i486/i860.
 425  */
 426
 427 extern vm_offset_t      (kvtophys)(
 428                                 vm_offset_t     addr);
 429
 430 extern pt_entry_t       *pmap_pte(
 431                                 struct pmap     *pmap,
 432                                 vm_offset_t     addr);
 433
 434 extern vm_offset_t      pmap_map(
 435                                 vm_offset_t     virt,
 436                                 vm_offset_t     start,
 437                                 vm_offset_t     end,
 438                                 vm_prot_t       prot);
 439
 440 extern vm_offset_t      pmap_map_bd(
 441                                 vm_offset_t     virt,
 442                                 vm_offset_t     start,
 443                                 vm_offset_t     end,
 444                                 vm_prot_t       prot);
 445
 446 extern void             pmap_bootstrap(
 447                                 vm_offset_t     load_start);
 448
 449 extern boolean_t        pmap_valid_page(
 450                                 ppnum_t pn);
 451
 452 extern int              pmap_list_resident_pages(
 453                                 struct pmap     *pmap,
 454                                 vm_offset_t     *listp,
 455                                 int             space);
 456
 457 extern void             pmap_commpage_init(
 458                                            vm_offset_t kernel,
 459                                            vm_offset_t user,
 460                                            int count);
 461 extern struct cpu_pmap  *pmap_cpu_alloc(
 462                                 boolean_t       is_boot_cpu);
 463 extern void             pmap_cpu_free(
 464                                 struct cpu_pmap *cp);
 465
 466 extern void invalidate_icache(vm_offset_t addr, unsigned cnt, int phys);
 467 extern void flush_dcache(vm_offset_t addr, unsigned count, int phys);
 468 extern ppnum_t          pmap_find_phys(pmap_t map, addr64_t va);
 469 extern void pmap_sync_page_data_phys(ppnum_t pa);
 470 extern void pmap_sync_page_attributes_phys(ppnum_t pa);
 471
 472 /*
 473  *      Macros for speed.
 474  */
 475
 476
 477 #include <kern/spl.h>
 478
 479 #if defined(PMAP_ACTIVATE_KERNEL)
 480 #undef PMAP_ACTIVATE_KERNEL
 481 #undef PMAP_DEACTIVATE_KERNEL
 482 #undef PMAP_ACTIVATE_USER
 483 #undef PMAP_DEACTIVATE_USER
 484 #endif
 485
 486 /*
 487  *      For multiple CPUS, PMAP_ACTIVATE and PMAP_DEACTIVATE must manage
 488  *      fields to control TLB invalidation on other CPUS.
 489  */
 490
 491 #define PMAP_ACTIVATE_KERNEL(my_cpu)    {                               \
 492                                                                         \
 493         /*                                                              \
 494          *      Let pmap updates proceed while we wait for this pmap.   \
 495          */                                                             \
 496         i_bit_clear((my_cpu), &cpus_active);                            \
 497                                                                         \
 498         /*                                                              \
 499          *      Lock the pmap to put this cpu in its active set.        \
 500          *      Wait for updates here.                                  \
 501          */                                                             \
 502         simple_lock(&kernel_pmap->lock);                                \
 503                                                                         \
 504         /*                                                              \
 505          *      Process invalidate requests for the kernel pmap.        \
 506          */                                                             \
 507         if (cpu_update_needed(my_cpu))                                  \
 508             process_pmap_updates(kernel_pmap);                          \
 509                                                                         \
 510         /*                                                              \
 511          *      Mark that this cpu is using the pmap.                   \
 512          */                                                             \
 513         i_bit_set((my_cpu), &kernel_pmap->cpus_using);                  \
 514                                                                         \
 515         /*                                                              \
 516          *      Mark this cpu active - IPL will be lowered by           \
 517          *      load_context().                                         \
 518          */                                                             \
 519         i_bit_set((my_cpu), &cpus_active);                              \
 520                                                                         \
 521         simple_unlock(&kernel_pmap->lock);                              \
 522 }
 523
 524 #define PMAP_DEACTIVATE_KERNEL(my_cpu)  {                               \
 525         /*                                                              \
 526          *      Mark pmap no longer in use by this cpu even if          \
 527          *      pmap is locked against updates.                         \
 528          */                                                             \
 529         i_bit_clear((my_cpu), &kernel_pmap->cpus_using);                \
 530         i_bit_clear((my_cpu), &cpus_active);                            \
 531         PMAP_REAL(my_cpu) = NULL;                                       \
 532 }
 533
 534 #define PMAP_ACTIVATE_MAP(map, my_cpu)  {                               \
 535         register pmap_t         tpmap;                                  \
 536                                                                         \
 537         tpmap = vm_map_pmap(map);                                       \
 538         if (tpmap == kernel_pmap) {                                     \
 539             /*                                                          \
 540              *  If this is the kernel pmap, switch to its page tables.  \
 541              */                                                         \
 542             set_dirbase(kernel_pmap, my_cpu);                           \
 543         }                                                               \
 544         else {                                                          \
 545             /*                                                          \
 546              *  Let pmap updates proceed while we wait for this pmap.   \
 547              */                                                         \
 548             i_bit_clear((my_cpu), &cpus_active);                        \
 549                                                                         \
 550             /*                                                          \
 551              *  Lock the pmap to put this cpu in its active set.        \
 552              *  Wait for updates here.                                  \
 553              */                                                         \
 554             simple_lock(&tpmap->lock);                                  \
 555                                                                         \
 556             /*                                                          \
 557              *  No need to invalidate the TLB - the entire user pmap    \
 558              *  will be invalidated by reloading dirbase.               \
 559              */                                                         \
 560             set_dirbase(tpmap, my_cpu);                                 \
 561                                                                         \
 562             /*                                                          \
 563              *  Mark this cpu active - IPL will be lowered by           \
 564              *  load_context().                                         \
 565              */                                                         \
 566             i_bit_set((my_cpu), &cpus_active);                          \
 567                                                                         \
 568             simple_unlock(&tpmap->lock);                                \
 569         }                                                               \
 570 }
 571
 572 #define PMAP_DEACTIVATE_MAP(map, my_cpu)
 573
 574 #define PMAP_ACTIVATE_USER(th, my_cpu)  {                               \
 575         spl_t           spl;                                            \
 576                                                                         \
 577         spl = splhigh();                                                        \
 578         PMAP_ACTIVATE_MAP(th->map, my_cpu)                              \
 579         splx(spl);                                                      \
 580 }
 581
 582 #define PMAP_DEACTIVATE_USER(th, my_cpu)
 583
 584 #define PMAP_SWITCH_CONTEXT(old_th, new_th, my_cpu) {                   \
 585         spl_t           spl;                                            \
 586                                                                         \
 587         if (old_th->map != new_th->map) {                               \
 588                 spl = splhigh();                                                \
 589                 PMAP_DEACTIVATE_MAP(old_th->map, my_cpu);               \
 590                 PMAP_ACTIVATE_MAP(new_th->map, my_cpu);                 \
 591                 splx(spl);                                              \
 592         }                                                               \
 593 }
 594
 595 #define PMAP_SWITCH_USER(th, new_map, my_cpu) {                         \
 596         spl_t           spl;                                            \
 597                                                                         \
 598         spl = splhigh();                                                        \
 599         PMAP_DEACTIVATE_MAP(th->map, my_cpu);                           \
 600         th->map = new_map;                                              \
 601         PMAP_ACTIVATE_MAP(th->map, my_cpu);                             \
 602         splx(spl);                                                      \
 603 }
 604
 605 #define MARK_CPU_IDLE(my_cpu)   {                                       \
 606         /*                                                              \
 607          *      Mark this cpu idle, and remove it from the active set,  \
 608          *      since it is not actively using any pmap.  Signal_cpus   \
 609          *      will notice that it is idle, and avoid signaling it,    \
 610          *      but will queue the update request for when the cpu      \
 611          *      becomes active.                                         \
 612          */                                                             \
 613         int     s = splhigh();                                          \
 614         i_bit_set((my_cpu), &cpus_idle);                                \
 615         i_bit_clear((my_cpu), &cpus_active);                            \
 616         splx(s);                                                        \
 617         set_led(my_cpu);                                                \
 618 }
 619
 620 #define MARK_CPU_ACTIVE(my_cpu) {                                       \
 621                                                                         \
 622         int     s = splhigh();                                          \
 623         /*                                                              \
 624          *      If a kernel_pmap update was requested while this cpu    \
 625          *      was idle, process it as if we got the interrupt.        \
 626          *      Before doing so, remove this cpu from the idle set.     \
 627          *      Since we do not grab any pmap locks while we flush      \
 628          *      our TLB, another cpu may start an update operation      \
 629          *      before we finish.  Removing this cpu from the idle      \
 630          *      set assures that we will receive another update         \
 631          *      interrupt if this happens.                              \
 632          */                                                             \
 633         i_bit_clear((my_cpu), &cpus_idle);                              \
 634                                                                         \
 635         if (cpu_update_needed(my_cpu))                                  \
 636             pmap_update_interrupt();                                    \
 637                                                                         \
 638         /*                                                              \
 639          *      Mark that this cpu is now active.                       \
 640          */                                                             \
 641         i_bit_set((my_cpu), &cpus_active);                              \
 642         splx(s);                                                        \
 643         clear_led(my_cpu);                                              \
 644 }
 645
 646 #define PMAP_CONTEXT(pmap, thread)
 647
 648 #define pmap_kernel_va(VA)      \
 649         (((VA) >= VM_MIN_KERNEL_ADDRESS) && ((VA) <= VM_MAX_KERNEL_ADDRESS))
 650
 651 #define pmap_resident_count(pmap)       ((pmap)->stats.resident_count)
 652 #define pmap_copy(dst_pmap,src_pmap,dst_addr,len,src_addr)
 653 #define pmap_attribute(pmap,addr,size,attr,value) \
 654                                         (KERN_INVALID_ADDRESS)
 655 #define pmap_attribute_cache_sync(addr,size,attr,value) \
 656                                         (KERN_INVALID_ADDRESS)
 657
 658 #endif  /* ASSEMBLER */
 659
 660 #endif  /* _PMAP_MACHINE_ */