]> git.saurik.com Git - apple/xnu.git/blob - pexpert/i386/pe_serial.c
xnu-792.13.8.tar.gz
[apple/xnu.git] / pexpert / i386 / pe_serial.c
1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the
10 * License may not be used to create, or enable the creation or
11 * redistribution of, unlawful or unlicensed copies of an Apple operating
12 * system, or to circumvent, violate, or enable the circumvention or
13 * violation of, any terms of an Apple operating system software license
14 * agreement.
15 *
16 * Please obtain a copy of the License at
17 * http://www.opensource.apple.com/apsl/ and read it before using this
18 * file.
19 *
20 * The Original Code and all software distributed under the License are
21 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
22 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
23 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
25 * Please see the License for the specific language governing rights and
26 * limitations under the License.
27 *
28 * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
29 */
30
31 /*
32 * file: pe_serial.c
33 * Polled-mode 16x50 UART driver.
34 */
35
36 #include <pexpert/protos.h>
37 #include <pexpert/pexpert.h>
38
39 void serial_putc(char);
40 int serial_getc(void);
41 int serial_init(void);
42
43 /* standard port addresses */
44 enum {
45 COM1_PORT_ADDR = 0x3f8,
46 COM2_PORT_ADDR = 0x2f8
47 };
48
49 /* UART register offsets */
50 enum {
51 UART_RBR = 0, /* receive buffer Register (R) */
52 UART_THR = 0, /* transmit holding register (W) */
53 UART_DLL = 0, /* DLAB = 1, divisor latch (LSB) */
54 UART_IER = 1, /* interrupt enable register */
55 UART_DLM = 1, /* DLAB = 1, divisor latch (MSB) */
56 UART_IIR = 2, /* interrupt ident register (R) */
57 UART_FCR = 2, /* fifo control register (W) */
58 UART_LCR = 3, /* line control register */
59 UART_MCR = 4, /* modem control register */
60 UART_LSR = 5, /* line status register */
61 UART_MSR = 6 /* modem status register */
62 };
63
64 enum {
65 UART_LCR_8BITS = 0x03,
66 UART_LCR_DLAB = 0x80
67 };
68
69 enum {
70 UART_MCR_DTR = 0x01,
71 UART_MCR_RTS = 0x02,
72 UART_MCR_OUT1 = 0x04,
73 UART_MCR_OUT2 = 0x08,
74 UART_MCR_LOOP = 0x10
75 };
76
77 enum {
78 UART_LSR_DR = 0x01,
79 UART_LSR_OE = 0x02,
80 UART_LSR_PE = 0x04,
81 UART_LSR_FE = 0x08,
82 UART_LSR_THRE = 0x20
83 };
84
85 static unsigned uart_baud_rate = 115200;
86 #define UART_PORT_ADDR COM1_PORT_ADDR
87
88 #define UART_CLOCK 1843200 /* 1.8432 MHz clock */
89
90 #define WRITE(r, v) outb(UART_PORT_ADDR + UART_##r, v)
91 #define READ(r) inb(UART_PORT_ADDR + UART_##r)
92 #define DELAY(x) { volatile int _d_; for (_d_ = 0; _d_ < (10000*x); _d_++) ; }
93
94 static int uart_initted = 0; /* 1 if init'ed */
95
96 static int
97 uart_probe( void )
98 {
99 /* Verify that the Divisor Register is accessible */
100
101 WRITE( LCR, UART_LCR_DLAB );
102 WRITE( DLL, 0x5a );
103 if (READ(DLL) != 0x5a) return 0;
104 WRITE( DLL, 0xa5 );
105 if (READ(DLL) != 0xa5) return 0;
106 WRITE( LCR, 0x00 );
107 return 1;
108 }
109
110 static void
111 uart_set_baud_rate( unsigned long baud_rate )
112 {
113 const unsigned char lcr = READ( LCR );
114 unsigned long div;
115
116 if (baud_rate == 0) baud_rate = 9600;
117 div = UART_CLOCK / 16 / baud_rate;
118 WRITE( LCR, lcr | UART_LCR_DLAB );
119 WRITE( DLM, (unsigned char)(div >> 8) );
120 WRITE( DLL, (unsigned char) div );
121 WRITE( LCR, lcr & ~UART_LCR_DLAB);
122 }
123
124 static void
125 uart_putc( char c )
126 {
127 if (!uart_initted) return;
128
129 /* Wait for THR empty */
130 while ( !(READ(LSR) & UART_LSR_THRE) ) DELAY(1);
131
132 WRITE( THR, c );
133 }
134
135 static int
136 uart_getc( void )
137 {
138 /*
139 * This function returns:
140 * -1 : no data
141 * -2 : receiver error
142 * >0 : character received
143 */
144
145 unsigned char lsr;
146
147 if (!uart_initted) return -1;
148
149 lsr = READ( LSR );
150
151 if ( lsr & (UART_LSR_FE | UART_LSR_PE | UART_LSR_OE) )
152 {
153 READ( RBR ); /* discard */
154 return -2;
155 }
156
157 if ( lsr & UART_LSR_DR )
158 {
159 return READ( RBR );
160 }
161
162 return -1;
163 }
164
165 int serial_init( void )
166 {
167 unsigned serial_baud_rate = 0;
168
169 if ( /*uart_initted ||*/ uart_probe() == 0 ) return 0;
170
171 /* Disable hardware interrupts */
172
173 WRITE( MCR, 0 );
174 WRITE( IER, 0 );
175
176 /* Disable FIFO's for 16550 devices */
177
178 WRITE( FCR, 0 );
179
180 /* Set for 8-bit, no parity, DLAB bit cleared */
181
182 WRITE( LCR, UART_LCR_8BITS );
183
184 /* Set baud rate - use the supplied boot-arg if available */
185
186 if (PE_parse_boot_arg("serialbaud", &serial_baud_rate))
187 {
188 /* Valid divisor? */
189 if (!((UART_CLOCK / 16) % serial_baud_rate)) {
190 uart_baud_rate = serial_baud_rate;
191 }
192 }
193 uart_set_baud_rate( uart_baud_rate );
194
195 /* Assert DTR# and RTS# lines (OUT2?) */
196
197 WRITE( MCR, UART_MCR_DTR | UART_MCR_RTS );
198
199 /* Clear any garbage in the input buffer */
200
201 READ( RBR );
202
203 uart_initted = 1;
204
205 return 1;
206 }
207
208 void serial_putc( char c )
209 {
210 uart_putc(c);
211 if (c == '\n') uart_putc('\r');
212 }
213
214 int serial_getc( void )
215 {
216 return uart_getc();
217 }