osfmk/mach/ppc/processor_info.h

   1 /*
   2  * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License.  The rights granted to you under the
  10  * License may not be used to create, or enable the creation or
  11  * redistribution of, unlawful or unlicensed copies of an Apple operating
  12  * system, or to circumvent, violate, or enable the circumvention or
  13  * violation of, any terms of an Apple operating system software license
  14  * agreement.
  15  *
  16  * Please obtain a copy of the License at
  17  * http://www.opensource.apple.com/apsl/ and read it before using this
  18  * file.
  19  *
  20  * The Original Code and all software distributed under the License are
  21  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  22  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  23  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  25  * Please see the License for the specific language governing rights and
  26  * limitations under the License.
  27  *
  28  * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
  29  */
  30
  31 /*
  32  *      File:   mach/ppc/processor_info.h
  33  *
  34  *      Data structure definitions for ppc specific processor control
  35  */
  36
  37 #ifndef _MACH_PPC_PROCESSOR_INFO_H_
  38 #define _MACH_PPC_PROCESSOR_INFO_H_
  39
  40 #include <mach/machine.h>
  41 #include <mach/message.h>
  42
  43 #ifdef  PRIVATE
  44
  45 /* processor_control command operations */
  46 #define PROCESSOR_PM_SET_REGS     1     /* Set Performance Monitor Registers  */
  47 #define PROCESSOR_PM_SET_MMCR     2     /* Set Monitor Mode Controls Registers  */
  48 #define PROCESSOR_PM_CLR_PMC      3     /* Clear Performance Monitor Counter Registers */
  49
  50 /*
  51  * Performance Monitor Register structures
  52  *
  53  * XXX - These have not been updated for ppc64.
  54  */
  55
  56 typedef union {
  57         unsigned int word;
  58         struct {
  59                 unsigned int dis        : 1;
  60                 unsigned int dp         : 1;
  61                 unsigned int du         : 1;
  62                 unsigned int dms        : 1;
  63                 unsigned int dmr        : 1;
  64                 unsigned int reserved3  : 1;        /* enint         */
  65                 unsigned int reserved4  : 1;        /* discount      */
  66                 unsigned int reserved5  : 2;        /* rtcselect     */
  67                 unsigned int reserved6  : 1;        /* intonbittrans */
  68                 unsigned int threshold  : 6;
  69                 unsigned int reserved7  : 1;        /* pmc1intcontrol */
  70                 unsigned int reserved8  : 1;        /* pmcintcontrol  */
  71                 unsigned int reserved9  : 1;        /* pmctrigger     */
  72                 unsigned int pmc1select : 7;
  73                 unsigned int pmc2select : 6;
  74         }bits;
  75 }mmcr0_t;
  76
  77 typedef union {
  78         unsigned int word;
  79         struct {
  80                 unsigned int pmc3select : 5;
  81                 unsigned int pmc4select : 5;
  82                 unsigned int reserved   : 22;
  83         }bits;
  84 }mmcr1_t;
  85
  86 typedef union {
  87         unsigned int word;
  88         struct {
  89                 unsigned int threshmult  : 1;
  90                 unsigned int reserved    : 31;
  91         }bits;
  92 }mmcr2_t;
  93
  94 typedef union {
  95         unsigned int word;
  96         struct {
  97                 unsigned int ov : 1;        /* overflow value */
  98                 unsigned int cv : 31;       /* countervalue */
  99         }bits;
 100 }pmcn_t;
 101
 102
 103
 104 /* Processor Performance Monitor Registers definitions */
 105
 106 struct processor_pm_regs {
 107       union {
 108         mmcr0_t mmcr0;
 109         mmcr1_t mmcr1;
 110         mmcr2_t mmcr2;
 111       }u;
 112       pmcn_t pmc[2];
 113 };
 114
 115 typedef struct processor_pm_regs processor_pm_regs_data_t;
 116 typedef struct processor_pm_regs *processor_pm_regs_t;
 117 #define PROCESSOR_PM_REGS_COUNT ((mach_msg_type_number_t) \
 118         (sizeof(processor_pm_regs_data_t) / sizeof (unsigned int)))
 119
 120 #define PROCESSOR_PM_REGS_COUNT_POWERPC_750 \
 121             (PROCESSOR_PM_REGS_COUNT * 2 )
 122
 123 #define PROCESSOR_PM_REGS_COUNT_POWERPC_7400 \
 124             (PROCESSOR_PM_REGS_COUNT * 3 )
 125
 126 union processor_control_data {
 127         processor_pm_regs_data_t cmd_pm_regs[3];
 128 };
 129
 130 struct processor_control_cmd {
 131     integer_t      cmd_op;
 132     cpu_type_t     cmd_cpu_type;
 133     cpu_subtype_t  cmd_cpu_subtype;
 134     union processor_control_data u;
 135 };
 136
 137 typedef struct processor_control_cmd   processor_control_cmd_data_t;
 138 typedef struct processor_control_cmd   *processor_control_cmd_t;
 139 #define cmd_pm_regs u.cmd_pm_regs;
 140 #define cmd_pm_ctls u.cmd_pm_ctls;
 141
 142 #define PROCESSOR_CONTROL_CMD_COUNT ((mach_msg_type_number_t) \
 143     (((sizeof(processor_control_cmd_data_t)) - \
 144       (sizeof(union processor_control_data))) / sizeof (integer_t)))
 145
 146      /* x should be a processor_pm_regs_t */
 147 #define PERFMON_MMCR0(x)    ((x)[0].u.mmcr0.word)
 148 #define PERFMON_PMC1(x)     ((x)[0].pmc[0].word)
 149 #define PERFMON_PMC2(x)     ((x)[0].pmc[1].word)
 150 #define PERFMON_MMCR1(x)    ((x)[1].u.mmcr1.word)
 151 #define PERFMON_PMC3(x)     ((x)[1].pmc[0].word)
 152 #define PERFMON_PMC4(x)     ((x)[1].pmc[1].word)
 153 #define PERFMON_MMCR2(x)    ((x)[2].u.mmcr2.word)
 154
 155 #define PERFMON_DIS(x)           ((x)[0].u.mmcr0.bits.dis)
 156 #define PERFMON_DP(x)            ((x)[0].u.mmcr0.bits.dp)
 157 #define PERFMON_DU(x)            ((x)[0].u.mmcr0.bits.du)
 158 #define PERFMON_DMS(x)           ((x)[0].u.mmcr0.bits.dms)
 159 #define PERFMON_DMR(x)           ((x)[0].u.mmcr0.bits.dmr)
 160 #define PERFMON_THRESHOLD(x)     ((x)[0].u.mmcr0.bits.threshold)
 161 #define PERFMON_PMC1SELECT(x)    ((x)[0].u.mmcr0.bits.pmc1select)
 162 #define PERFMON_PMC2SELECT(x)    ((x)[0].u.mmcr0.bits.pmc2select)
 163 #define PERFMON_PMC3SELECT(x)    ((x)[1].u.mmcr1.bits.pmc3select)
 164 #define PERFMON_PMC4SELECT(x)    ((x)[1].u.mmcr1.bits.pmc4select)
 165 #define PERFMON_THRESHMULT(x)    ((x)[2].u.mmcr2.bits.threshmult)
 166 #define PERFMON_PMC1_CV(x)       ((x)[0].u.pmc[0].bits.cv)
 167 #define PERFMON_PMC2_CV(x)       ((x)[0].u.pmc[1].bits.cv)
 168 #define PERFMON_PMC3_CV(x)       ((x)[1].u.pmc[0].bits.cv)
 169 #define PERFMON_PMC4_CV(x)       ((x)[1].u.pmc[1].bits.cv)
 170
 171 typedef unsigned int processor_temperature_data_t;
 172 typedef unsigned int *processor_temperature_t;
 173
 174 #define PROCESSOR_TEMPERATURE_COUNT 1
 175
 176 #endif  /* PRIVATE */
 177
 178 #endif  /* _MACH_PPC_PROCESSOR_INFO_H_ */