osfmk/mach/i386/fp_reg.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License.  The rights granted to you under the
  10  * License may not be used to create, or enable the creation or
  11  * redistribution of, unlawful or unlicensed copies of an Apple operating
  12  * system, or to circumvent, violate, or enable the circumvention or
  13  * violation of, any terms of an Apple operating system software license
  14  * agreement.
  15  *
  16  * Please obtain a copy of the License at
  17  * http://www.opensource.apple.com/apsl/ and read it before using this
  18  * file.
  19  *
  20  * The Original Code and all software distributed under the License are
  21  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  22  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  23  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  25  * Please see the License for the specific language governing rights and
  26  * limitations under the License.
  27  *
  28  * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
  29  */
  30 /*
  31  * @OSF_COPYRIGHT@
  32  */
  33 /*
  34  * Mach Operating System
  35  * Copyright (c) 1992-1989 Carnegie Mellon University
  36  * All Rights Reserved.
  37  *
  38  * Permission to use, copy, modify and distribute this software and its
  39  * documentation is hereby granted, provided that both the copyright
  40  * notice and this permission notice appear in all copies of the
  41  * software, derivative works or modified versions, and any portions
  42  * thereof, and that both notices appear in supporting documentation.
  43  *
  44  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  45  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  46  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  47  *
  48  * Carnegie Mellon requests users of this software to return to
  49  *
  50  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  51  *  School of Computer Science
  52  *  Carnegie Mellon University
  53  *  Pittsburgh PA 15213-3890
  54  *
  55  * any improvements or extensions that they make and grant Carnegie Mellon
  56  * the rights to redistribute these changes.
  57  */
  58 /*
  59  */
  60
  61 #ifndef _I386_FP_SAVE_H_
  62 #define _I386_FP_SAVE_H_
  63
  64
  65 /* note when allocating this data structure, it must be 16 byte aligned. */
  66 struct x86_fx_save {
  67         unsigned short  fx_control;     /* control */
  68         unsigned short  fx_status;      /* status */
  69         unsigned char   fx_tag;         /* register tags */
  70         unsigned char   fx_bbz1;        /* better be zero when calling fxrtstor */
  71         unsigned short  fx_opcode;
  72         unsigned int    fx_eip;         /* eip  instruction */
  73         unsigned short  fx_cs;          /* cs instruction */
  74         unsigned short  fx_bbz2;        /* better be zero when calling fxrtstor */
  75         unsigned int    fx_dp;          /* data address */
  76         unsigned short  fx_ds;          /* data segment */
  77         unsigned short  fx_bbz3;        /* better be zero when calling fxrtstor */
  78         unsigned int    fx_MXCSR;
  79         unsigned int    fx_MXCSR_MASK;
  80         unsigned short  fx_reg_word[8][8];      /* STx/MMx registers */
  81         unsigned short  fx_XMM_reg[8][16];      /* XMM0-XMM15 on 64 bit processors */
  82                                                 /* XMM0-XMM7  on 32 bit processors... unused storage reserved */
  83         unsigned char   fx_reserved[16*6];      /* reserved by intel for future expansion */
  84 };
  85
  86
  87 /*
  88  * Control register
  89  */
  90 #define FPC_IE          0x0001          /* enable invalid operation
  91                                            exception */
  92 #define FPC_IM          FPC_IE
  93 #define FPC_DE          0x0002          /* enable denormalized operation
  94                                            exception */
  95 #define FPC_DM          FPC_DE
  96 #define FPC_ZE          0x0004          /* enable zero-divide exception */
  97 #define FPC_ZM          FPC_ZE
  98 #define FPC_OE          0x0008          /* enable overflow exception */
  99 #define FPC_OM          FPC_OE
 100 #define FPC_UE          0x0010          /* enable underflow exception */
 101 #define FPC_PE          0x0020          /* enable precision exception */
 102 #define FPC_PC          0x0300          /* precision control: */
 103 #define FPC_PC_24       0x0000                  /* 24 bits */
 104 #define FPC_PC_53       0x0200                  /* 53 bits */
 105 #define FPC_PC_64       0x0300                  /* 64 bits */
 106 #define FPC_RC          0x0c00          /* rounding control: */
 107 #define FPC_RC_RN       0x0000                  /* round to nearest or even */
 108 #define FPC_RC_RD       0x0400                  /* round down */
 109 #define FPC_RC_RU       0x0800                  /* round up */
 110 #define FPC_RC_CHOP     0x0c00                  /* chop */
 111 #define FPC_IC          0x1000          /* infinity control (obsolete) */
 112 #define FPC_IC_PROJ     0x0000                  /* projective infinity */
 113 #define FPC_IC_AFF      0x1000                  /* affine infinity (std) */
 114
 115 /*
 116  * Status register
 117  */
 118 #define FPS_IE          0x0001          /* invalid operation */
 119 #define FPS_DE          0x0002          /* denormalized operand */
 120 #define FPS_ZE          0x0004          /* divide by zero */
 121 #define FPS_OE          0x0008          /* overflow */
 122 #define FPS_UE          0x0010          /* underflow */
 123 #define FPS_PE          0x0020          /* precision */
 124 #define FPS_SF          0x0040          /* stack flag */
 125 #define FPS_ES          0x0080          /* error summary */
 126 #define FPS_C0          0x0100          /* condition code bit 0 */
 127 #define FPS_C1          0x0200          /* condition code bit 1 */
 128 #define FPS_C2          0x0400          /* condition code bit 2 */
 129 #define FPS_TOS         0x3800          /* top-of-stack pointer */
 130 #define FPS_TOS_SHIFT   11
 131 #define FPS_C3          0x4000          /* condition code bit 3 */
 132 #define FPS_BUSY        0x8000          /* FPU busy */
 133
 134 /*
 135  * Kind of floating-point support provided by kernel.
 136  */
 137 #define FP_NO           0               /* no floating point */
 138 #define FP_SOFT         1               /* software FP emulator */
 139 #define FP_287          2               /* 80287 */
 140 #define FP_387          3               /* 80387 or 80486 */
 141 #define FP_FXSR         4               /* Fast save/restore SIMD Extension */
 142
 143 #endif  /* _I386_FP_SAVE_H_ */