libsyscall/os/tsd.h

   1 /*
   2  * Copyright (c) 2012 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28
  29 #ifndef OS_TSD_H
  30 #define OS_TSD_H
  31
  32 #include <stdint.h>
  33
  34 /* The low nine slots of the TSD are reserved for libsyscall usage. */
  35 #define __TSD_RESERVED_BASE 0
  36 #define __TSD_RESERVED_MAX 9
  37
  38 #define __TSD_THREAD_SELF 0
  39 #define __TSD_ERRNO 1
  40 #define __TSD_MIG_REPLY 2
  41 #define __TSD_MACH_THREAD_SELF 3
  42 #define __TSD_THREAD_QOS_CLASS 4
  43 #define __TSD_RETURN_TO_KERNEL 5
  44 /* slot 6 is reserved for Windows/WINE compatibility reasons */
  45 #define __TSD_SEMAPHORE_CACHE 9
  46
  47 #ifdef __arm__
  48 #include <arm/arch.h>
  49 #endif
  50
  51 __attribute__((always_inline))
  52 static __inline__ unsigned int
  53 _os_cpu_number(void)
  54 {
  55 #if defined(__arm__) && defined(_ARM_ARCH_6)
  56         uintptr_t p;
  57         __asm__("mrc    p15, 0, %[p], c13, c0, 3" : [p] "=&r" (p));
  58         return (unsigned int)(p & 0x3ul);
  59 #elif defined(__arm64__)
  60         uint64_t p;
  61         __asm__("mrs    %[p], TPIDRRO_EL0" : [p] "=&r" (p));
  62         return (unsigned int)p & 0x7;
  63 #elif defined(__x86_64__) || defined(__i386__)
  64         struct { uintptr_t p1, p2; } p;
  65         __asm__("sidt %[p]" : [p] "=&m" (p));
  66         return (unsigned int)(p.p1 & 0xfff);
  67 #else
  68 #error _os_cpu_number not implemented on this architecture
  69 #endif
  70 }
  71
  72 #if defined(__i386__) || defined(__x86_64__)
  73
  74 #if defined(__has_attribute)
  75 #if __has_attribute(address_space)
  76 #define OS_GS_RELATIVE  __attribute__((address_space(256)))
  77 #endif
  78 #endif
  79
  80 #ifdef OS_GS_RELATIVE
  81 #define _os_tsd_get_base() ((void * OS_GS_RELATIVE *)0)
  82 #else
  83 __attribute__((always_inline))
  84 static __inline__ void*
  85 _os_tsd_get_direct(unsigned long slot)
  86 {
  87         void *ret;
  88         __asm__("mov %%gs:%1, %0" : "=r" (ret) : "m" (*(void **)(slot * sizeof(void *))));
  89         return ret;
  90 }
  91
  92 __attribute__((always_inline))
  93 static __inline__ int
  94 _os_tsd_set_direct(unsigned long slot, void *val)
  95 {
  96 #if defined(__i386__) && defined(__PIC__)
  97         __asm__("movl %1, %%gs:%0" : "=m" (*(void **)(slot * sizeof(void *))) : "rn" (val));
  98 #elif defined(__i386__) && !defined(__PIC__)
  99         __asm__("movl %1, %%gs:%0" : "=m" (*(void **)(slot * sizeof(void *))) : "ri" (val));
 100 #else
 101         __asm__("movq %1, %%gs:%0" : "=m" (*(void **)(slot * sizeof(void *))) : "rn" (val));
 102 #endif
 103         return 0;
 104 }
 105 #endif
 106
 107 #elif defined(__arm__) || defined(__arm64__)
 108
 109 __attribute__((always_inline, pure))
 110 static __inline__ void**
 111 _os_tsd_get_base(void)
 112 {
 113 #if defined(__arm__) && defined(_ARM_ARCH_6)
 114         uintptr_t tsd;
 115         __asm__("mrc p15, 0, %0, c13, c0, 3" : "=r" (tsd));
 116         tsd &= ~0x3ul; /* lower 2-bits contain CPU number */
 117 #elif defined(__arm__) && defined(_ARM_ARCH_5)
 118         register uintptr_t tsd asm ("r9");
 119 #elif defined(__arm64__)
 120         uint64_t tsd;
 121         __asm__("mrs %0, TPIDRRO_EL0" : "=r" (tsd));
 122         tsd &= ~0x7ull;
 123 #endif
 124
 125         return (void**)(uintptr_t)tsd;
 126 }
 127 #define _os_tsd_get_base()  _os_tsd_get_base()
 128
 129 #else
 130 #error _os_tsd_get_base not implemented on this architecture
 131 #endif
 132
 133 #ifdef _os_tsd_get_base
 134 __attribute__((always_inline))
 135 static __inline__ void*
 136 _os_tsd_get_direct(unsigned long slot)
 137 {
 138         return _os_tsd_get_base()[slot];
 139 }
 140
 141 __attribute__((always_inline))
 142 static __inline__ int
 143 _os_tsd_set_direct(unsigned long slot, void *val)
 144 {
 145         _os_tsd_get_base()[slot] = val;
 146         return 0;
 147 }
 148 #endif
 149
 150 extern void _thread_set_tsd_base(void *tsd_base);
 151
 152 #endif