osfmk/ppc/db_asm.s

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26  * @OSF_COPYRIGHT@
  27  */
  28
  29 #include <debug.h>
  30 #include <ppc/asm.h>
  31 #include <ppc/proc_reg.h>
  32 #include <mach/ppc/vm_param.h>
  33 #include <assym.s>
  34
  35
  36 /* void
  37  * db_phys_cmp(src_a, src_b, bytecount)
  38  *      vm_offset_t     src_a;
  39  *      vm_offset_t     src_b;
  40  *      int             bytecount
  41  *
  42  * This routine will compare bytecount bytes from physical address src_a and physical
  43  * address src_b.
  44  */
  45
  46 #warning THIS IS BROKEN FOR 64-BIT
  47
  48         /* Switch off data translations */
  49         lis             r7,hi16(MASK(MSR_VEC))
  50         ori             r7,r7,lo16(MASK(MSR_FP))
  51         mfmsr   r6
  52         andc    r6,r6,r7                        ; Force FP and vec off
  53         ori             r7,r7,lo16(MASK(MSR_DR))        ; Set the DR bit
  54         andc    r7,r6,r7                        ; Force DR off
  55         mtmsr   r7
  56         isync                   /* Ensure data translations are off */
  57
  58         subi    r3,     r3,     4
  59         subi    r4,     r4,     4
  60
  61         cmpwi   r5,     3
  62         ble-    .L_db_phys_cmp_bytes
  63 .L_db_phys_cmp_loop:
  64         lwz     r0,     4(r3)
  65         lwz     r7,     4(r4)
  66         addi    r3,     r3,     4
  67         addi    r4,     r4,     4
  68         subi    r5,     r5,     4
  69         cmpw    r0,     r7
  70         bne     .L_db_phys_cmp_false
  71         cmpwi   r5,     3
  72         bgt+    .L_db_phys_cmp_loop
  73
  74         /* If no leftover bytes, we're done now */
  75         cmpwi   r5,     0
  76         beq+    .L_db_phys_cmp_true
  77
  78 .L_db_phys_cmp_bytes:
  79         addi    r3,     r3,     3
  80         addi    r4,     r4,     3
  81 .L_db_phys_cmp_byte_loop:
  82         lbz     r0,     1(r3)
  83         lbz     r7,     1(r4)
  84         addi    r3,     r3,     1
  85         addi    r4,     r4,     1
  86         subi    r5,     r5,     1
  87         cmpw    r0,     r7
  88         bne     .L_db_phys_cmp_false
  89         cmpwi   r5,     0
  90         bne+    .L_db_phys_cmp_loop
  91
  92 .L_db_phys_cmp_true:
  93         li      r3,     1
  94         b       .L_db_phys_cmp_done
  95
  96 .L_db_phys_cmp_false:
  97         li      r3,     0
  98
  99 .L_db_phys_cmp_done:
 100         mtmsr   r6              /* Restore original translations */
 101         isync                   /* Ensure data translations are off */
 102
 103         blr
 104