osfmk/mach/i386/fp_reg.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26  * @OSF_COPYRIGHT@
  27  */
  28 /*
  29  * HISTORY
  30  *
  31  * Revision 1.1.1.1  1998/09/22 21:05:31  wsanchez
  32  * Import of Mac OS X kernel (~semeria)
  33  *
  34  * Revision 1.1.1.1  1998/03/07 02:25:47  wsanchez
  35  * Import of OSF Mach kernel (~mburg)
  36  *
  37  * Revision 1.2.6.1  1994/09/23  02:37:03  ezf
  38  *      change marker to not FREE
  39  *      [1994/09/22  21:39:57  ezf]
  40  *
  41  * Revision 1.2.2.2  1993/06/09  02:40:30  gm
  42  *      Added to OSF/1 R1.3 from NMK15.0.
  43  *      [1993/06/02  21:16:11  jeffc]
  44  *
  45  * Revision 1.2  1993/04/19  16:33:51  devrcs
  46  *      ansi C conformance changes
  47  *      [1993/02/02  18:56:01  david]
  48  *
  49  * Revision 1.1  1992/09/30  02:30:43  robert
  50  *      Initial revision
  51  *
  52  * $EndLog$
  53  */
  54 /* CMU_HIST */
  55 /*
  56  * Revision 2.1.1.1.2.1  92/03/03  16:21:23  jeffreyh
  57  *      Merged up to Trunk
  58  *      [92/02/26            jeffreyh]
  59  *
  60  * Revision 2.4  92/02/26  13:10:29  elf
  61  *      Added stupid alaises to make i386/fpu.c compile. RVB will fix.
  62  *
  63  *      [92/02/26            elf]
  64  *
  65  * Revision 2.3  92/02/26  12:47:46  elf
  66  *      Installed from i386 directory.
  67  *      [92/02/26            danner]
  68  *
  69  *
  70  * Revision 2.2  92/01/03  20:19:47  dbg
  71  *      Move this file to mach/i386.  Add FP_NO..FP_387 codes for
  72  *      floating-point processor status.  Error bits in control
  73  *      register are masks, not enables.
  74  *      [91/10/19            dbg]
  75  *
  76  */
  77 /* CMU_ENDHIST */
  78 /*
  79  * Mach Operating System
  80  * Copyright (c) 1992-1989 Carnegie Mellon University
  81  * All Rights Reserved.
  82  *
  83  * Permission to use, copy, modify and distribute this software and its
  84  * documentation is hereby granted, provided that both the copyright
  85  * notice and this permission notice appear in all copies of the
  86  * software, derivative works or modified versions, and any portions
  87  * thereof, and that both notices appear in supporting documentation.
  88  *
  89  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  90  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  91  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  92  *
  93  * Carnegie Mellon requests users of this software to return to
  94  *
  95  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  96  *  School of Computer Science
  97  *  Carnegie Mellon University
  98  *  Pittsburgh PA 15213-3890
  99  *
 100  * any improvements or extensions that they make and grant Carnegie Mellon
 101  * the rights to redistribute these changes.
 102  */
 103 /*
 104  */
 105
 106 #ifndef _I386_FP_SAVE_H_
 107 #define _I386_FP_SAVE_H_
 108 /*
 109  *      Floating point registers and status, as saved
 110  *      and restored by FP save/restore instructions.
 111  */
 112 struct i386_fp_save     {
 113         unsigned short  fp_control;     /* control */
 114         unsigned short  fp_unused_1;
 115         unsigned short  fp_status;      /* status */
 116         unsigned short  fp_unused_2;
 117         unsigned short  fp_tag;         /* register tags */
 118         unsigned short  fp_unused_3;
 119         unsigned int    fp_eip;         /* eip at failed instruction */
 120         unsigned short  fp_cs;          /* cs at failed instruction */
 121         unsigned short  fp_opcode;      /* opcode of failed instruction */
 122         unsigned int    fp_dp;          /* data address */
 123         unsigned short  fp_ds;          /* data segment */
 124         unsigned short  fp_unused_4;
 125 };
 126
 127 struct i386_fp_regs {
 128         unsigned short  fp_reg_word[5][8];
 129                                         /* space for 8 80-bit FP registers */
 130 };
 131
 132 /* note when allocating this data structure, it must be 16 byte aligned. */
 133 struct i386_fx_save {
 134         unsigned short  fx_control;     /* control */
 135         unsigned short  fx_status;      /* status */
 136         unsigned char   fx_tag;         /* register tags */
 137         unsigned char   fx_bbz1;        /* better be zero when calling fxrtstor */
 138         unsigned short  fx_opcode;
 139         unsigned int    fx_eip;         /* eip  instruction */
 140         unsigned short  fx_cs;          /* cs instruction */
 141         unsigned short  fx_bbz2;        /* better be zero when calling fxrtstor */
 142         unsigned int    fx_dp;          /* data address */
 143         unsigned short  fx_ds;          /* data segment */
 144         unsigned short  fx_bbz3;        /* better be zero when calling fxrtstor */
 145         unsigned int    fx_MXCSR;
 146         unsigned int    fx_MXCSR_MASK;
 147         unsigned short  fx_reg_word[8][8];      /* STx/MMx registers */
 148         unsigned short  fx_XMM_reg[8][8];       /* XMM0-XMM7 */
 149         unsigned char   fx_reserved[16*14];     /* reserved by intel for future expansion */
 150 };
 151
 152
 153 /*
 154  * Control register
 155  */
 156 #define FPC_IE          0x0001          /* enable invalid operation
 157                                            exception */
 158 #define FPC_IM          FPC_IE
 159 #define FPC_DE          0x0002          /* enable denormalized operation
 160                                            exception */
 161 #define FPC_DM          FPC_DE
 162 #define FPC_ZE          0x0004          /* enable zero-divide exception */
 163 #define FPC_ZM          FPC_ZE
 164 #define FPC_OE          0x0008          /* enable overflow exception */
 165 #define FPC_OM          FPC_OE
 166 #define FPC_UE          0x0010          /* enable underflow exception */
 167 #define FPC_PE          0x0020          /* enable precision exception */
 168 #define FPC_PC          0x0300          /* precision control: */
 169 #define FPC_PC_24       0x0000                  /* 24 bits */
 170 #define FPC_PC_53       0x0200                  /* 53 bits */
 171 #define FPC_PC_64       0x0300                  /* 64 bits */
 172 #define FPC_RC          0x0c00          /* rounding control: */
 173 #define FPC_RC_RN       0x0000                  /* round to nearest or even */
 174 #define FPC_RC_RD       0x0400                  /* round down */
 175 #define FPC_RC_RU       0x0800                  /* round up */
 176 #define FPC_RC_CHOP     0x0c00                  /* chop */
 177 #define FPC_IC          0x1000          /* infinity control (obsolete) */
 178 #define FPC_IC_PROJ     0x0000                  /* projective infinity */
 179 #define FPC_IC_AFF      0x1000                  /* affine infinity (std) */
 180
 181 /*
 182  * Status register
 183  */
 184 #define FPS_IE          0x0001          /* invalid operation */
 185 #define FPS_DE          0x0002          /* denormalized operand */
 186 #define FPS_ZE          0x0004          /* divide by zero */
 187 #define FPS_OE          0x0008          /* overflow */
 188 #define FPS_UE          0x0010          /* underflow */
 189 #define FPS_PE          0x0020          /* precision */
 190 #define FPS_SF          0x0040          /* stack flag */
 191 #define FPS_ES          0x0080          /* error summary */
 192 #define FPS_C0          0x0100          /* condition code bit 0 */
 193 #define FPS_C1          0x0200          /* condition code bit 1 */
 194 #define FPS_C2          0x0400          /* condition code bit 2 */
 195 #define FPS_TOS         0x3800          /* top-of-stack pointer */
 196 #define FPS_TOS_SHIFT   11
 197 #define FPS_C3          0x4000          /* condition code bit 3 */
 198 #define FPS_BUSY        0x8000          /* FPU busy */
 199
 200 /*
 201  * Kind of floating-point support provided by kernel.
 202  */
 203 #define FP_NO           0               /* no floating point */
 204 #define FP_SOFT         1               /* software FP emulator */
 205 #define FP_287          2               /* 80287 */
 206 #define FP_387          3               /* 80387 or 80486 */
 207 #define FP_FXSR         4               /* Fast save/restore SIMD Extension */
 208
 209 #endif  /* _I386_FP_SAVE_H_ */