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34 #include <kdp/kdp_internal.h>
35 #include <mach_ldebug.h>
38 #include <mach/mach_types.h>
39 #include <mach/kern_return.h>
41 #include <kern/kern_types.h>
42 #include <kern/startup.h>
43 #include <kern/timer_queue.h>
44 #include <kern/processor.h>
45 #include <kern/cpu_number.h>
46 #include <kern/cpu_data.h>
47 #include <kern/assert.h>
48 #include <kern/machine.h>
50 #include <kern/misc_protos.h>
51 #include <kern/timer_call.h>
52 #include <kern/kalloc.h>
53 #include <kern/queue.h>
54 #include <prng/random.h>
56 #include <vm/vm_map.h>
57 #include <vm/vm_kern.h>
59 #include <profiling/profile-mk.h>
61 #include <i386/bit_routines.h>
62 #include <i386/proc_reg.h>
63 #include <i386/cpu_threads.h>
64 #include <i386/mp_desc.h>
65 #include <i386/misc_protos.h>
66 #include <i386/trap.h>
67 #include <i386/postcode.h>
68 #include <i386/machine_routines.h>
70 #include <i386/mp_events.h>
71 #include <i386/lapic.h>
72 #include <i386/cpuid.h>
74 #include <i386/machine_cpu.h>
75 #include <i386/pmCPU.h>
77 #include <i386/machine_check.h>
79 #include <i386/acpi.h>
81 #include <chud/chud_xnu.h>
82 #include <chud/chud_xnu_private.h>
84 #include <sys/kdebug.h>
86 #include <console/serial_protos.h>
89 #define PAUSE delay(1000000)
90 #define DBG(x...) kprintf(x)
96 /* Debugging/test trace events: */
97 #define TRACE_MP_TLB_FLUSH MACHDBG_CODE(DBG_MACH_MP, 0)
98 #define TRACE_MP_CPUS_CALL MACHDBG_CODE(DBG_MACH_MP, 1)
99 #define TRACE_MP_CPUS_CALL_LOCAL MACHDBG_CODE(DBG_MACH_MP, 2)
100 #define TRACE_MP_CPUS_CALL_ACTION MACHDBG_CODE(DBG_MACH_MP, 3)
101 #define TRACE_MP_CPUS_CALL_NOBUF MACHDBG_CODE(DBG_MACH_MP, 4)
102 #define TRACE_MP_CPU_FAST_START MACHDBG_CODE(DBG_MACH_MP, 5)
103 #define TRACE_MP_CPU_START MACHDBG_CODE(DBG_MACH_MP, 6)
104 #define TRACE_MP_CPU_DEACTIVATE MACHDBG_CODE(DBG_MACH_MP, 7)
106 #define ABS(v) (((v) > 0)?(v):-(v))
108 void slave_boot_init(void);
109 void i386_cpu_IPI(int cpu
);
112 static void mp_kdp_wait(boolean_t flush
, boolean_t isNMI
);
113 #endif /* MACH_KDP */
115 static boolean_t
mp_safe_spin_lock(usimple_lock_t lock
);
117 static boolean_t
cpu_signal_pending(int cpu
, mp_event_t event
);
118 #endif /* MACH_KDP */
119 static int NMIInterruptHandler(x86_saved_state_t
*regs
);
121 boolean_t smp_initialized
= FALSE
;
122 uint32_t TSC_sync_margin
= 0xFFF;
123 volatile boolean_t force_immediate_debugger_NMI
= FALSE
;
124 volatile boolean_t pmap_tlb_flush_timeout
= FALSE
;
125 decl_simple_lock_data(,mp_kdp_lock
);
127 decl_simple_lock_data(,debugger_callback_lock
);
128 struct debugger_callback
*debugger_callback
= NULL
;
130 decl_lck_mtx_data(static, mp_cpu_boot_lock
);
131 lck_mtx_ext_t mp_cpu_boot_lock_ext
;
133 /* Variables needed for MP rendezvous. */
134 decl_simple_lock_data(,mp_rv_lock
);
135 static void (*mp_rv_setup_func
)(void *arg
);
136 static void (*mp_rv_action_func
)(void *arg
);
137 static void (*mp_rv_teardown_func
)(void *arg
);
138 static void *mp_rv_func_arg
;
139 static volatile int mp_rv_ncpus
;
140 /* Cache-aligned barriers: */
141 static volatile long mp_rv_entry
__attribute__((aligned(64)));
142 static volatile long mp_rv_exit
__attribute__((aligned(64)));
143 static volatile long mp_rv_complete
__attribute__((aligned(64)));
145 volatile uint64_t debugger_entry_time
;
146 volatile uint64_t debugger_exit_time
;
149 extern int kdp_snapshot
;
150 static struct _kdp_xcpu_call_func
{
151 kdp_x86_xcpu_func_t func
;
154 volatile uint16_t cpu
;
155 } kdp_xcpu_call_func
= {
161 /* Variables needed for MP broadcast. */
162 static void (*mp_bc_action_func
)(void *arg
);
163 static void *mp_bc_func_arg
;
164 static int mp_bc_ncpus
;
165 static volatile long mp_bc_count
;
166 decl_lck_mtx_data(static, mp_bc_lock
);
167 lck_mtx_ext_t mp_bc_lock_ext
;
168 static volatile int debugger_cpu
= -1;
169 volatile long NMIPI_acks
= 0;
170 volatile long NMI_count
= 0;
172 extern void NMI_cpus(void);
174 static void mp_cpus_call_init(void);
175 static void mp_cpus_call_action(void);
176 static void mp_call_PM(void);
178 static boolean_t mp_cpus_call_wait_timeout
= FALSE
;
180 char mp_slave_stack
[PAGE_SIZE
] __attribute__((aligned(PAGE_SIZE
))); // Temp stack for slave init
182 /* PAL-related routines */
183 boolean_t
i386_smp_init(int nmi_vector
, i386_intr_func_t nmi_handler
,
184 int ipi_vector
, i386_intr_func_t ipi_handler
);
185 void i386_start_cpu(int lapic_id
, int cpu_num
);
186 void i386_send_NMI(int cpu
);
190 * Initialize dummy structs for profiling. These aren't used but
191 * allows hertz_tick() to be built with GPROF defined.
193 struct profile_vars _profile_vars
;
194 struct profile_vars
*_profile_vars_cpus
[MAX_CPUS
] = { &_profile_vars
};
195 #define GPROF_INIT() \
199 /* Hack to initialize pointers to unused profiling structs */ \
200 for (i = 1; i < MAX_CPUS; i++) \
201 _profile_vars_cpus[i] = &_profile_vars; \
207 static lck_grp_t smp_lck_grp
;
208 static lck_grp_attr_t smp_lck_grp_attr
;
210 #define NUM_CPU_WARM_CALLS 20
211 struct timer_call cpu_warm_call_arr
[NUM_CPU_WARM_CALLS
];
212 queue_head_t cpu_warm_call_list
;
213 decl_simple_lock_data(static, cpu_warm_lock
);
215 typedef struct cpu_warm_data
{
216 timer_call_t cwd_call
;
217 uint64_t cwd_deadline
;
221 static void cpu_prewarm_init(void);
222 static void cpu_warm_timer_call_func(call_entry_param_t p0
, call_entry_param_t p1
);
223 static void _cpu_warm_setup(void *arg
);
224 static timer_call_t
grab_warm_timer_call(void);
225 static void free_warm_timer_call(timer_call_t call
);
230 simple_lock_init(&mp_kdp_lock
, 0);
231 simple_lock_init(&mp_rv_lock
, 0);
232 simple_lock_init(&debugger_callback_lock
, 0);
233 lck_grp_attr_setdefault(&smp_lck_grp_attr
);
234 lck_grp_init(&smp_lck_grp
, "i386_smp", &smp_lck_grp_attr
);
235 lck_mtx_init_ext(&mp_cpu_boot_lock
, &mp_cpu_boot_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
236 lck_mtx_init_ext(&mp_bc_lock
, &mp_bc_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
239 if(!i386_smp_init(LAPIC_NMI_INTERRUPT
, NMIInterruptHandler
,
240 LAPIC_VECTOR(INTERPROCESSOR
), cpu_signal_handler
))
246 DBGLOG_CPU_INIT(master_cpu
);
249 mp_cpus_call_cpu_init(master_cpu
);
251 if (PE_parse_boot_argn("TSC_sync_margin",
252 &TSC_sync_margin
, sizeof(TSC_sync_margin
))) {
253 kprintf("TSC sync Margin 0x%x\n", TSC_sync_margin
);
254 } else if (cpuid_vmm_present()) {
255 kprintf("TSC sync margin disabled\n");
258 smp_initialized
= TRUE
;
269 } processor_start_info_t
;
270 static processor_start_info_t start_info
__attribute__((aligned(64)));
273 * Cache-alignment is to avoid cross-cpu false-sharing interference.
275 static volatile long tsc_entry_barrier
__attribute__((aligned(64)));
276 static volatile long tsc_exit_barrier
__attribute__((aligned(64)));
277 static volatile uint64_t tsc_target
__attribute__((aligned(64)));
280 * Poll a CPU to see when it has marked itself as running.
283 mp_wait_for_cpu_up(int slot_num
, unsigned int iters
, unsigned int usecdelay
)
285 while (iters
-- > 0) {
286 if (cpu_datap(slot_num
)->cpu_running
)
293 * Quickly bring a CPU back online which has been halted.
296 intel_startCPU_fast(int slot_num
)
301 * Try to perform a fast restart
303 rc
= pmCPUExitHalt(slot_num
);
304 if (rc
!= KERN_SUCCESS
)
306 * The CPU was not eligible for a fast restart.
310 KERNEL_DEBUG_CONSTANT(
311 TRACE_MP_CPU_FAST_START
| DBG_FUNC_START
,
312 slot_num
, 0, 0, 0, 0);
315 * Wait until the CPU is back online.
317 mp_disable_preemption();
320 * We use short pauses (1us) for low latency. 30,000 iterations is
321 * longer than a full restart would require so it should be more
325 mp_wait_for_cpu_up(slot_num
, 30000, 1);
326 mp_enable_preemption();
328 KERNEL_DEBUG_CONSTANT(
329 TRACE_MP_CPU_FAST_START
| DBG_FUNC_END
,
330 slot_num
, cpu_datap(slot_num
)->cpu_running
, 0, 0, 0);
333 * Check to make sure that the CPU is really running. If not,
334 * go through the slow path.
336 if (cpu_datap(slot_num
)->cpu_running
)
337 return(KERN_SUCCESS
);
339 return(KERN_FAILURE
);
345 /* Here on the started cpu with cpu_running set TRUE */
347 if (TSC_sync_margin
&&
348 start_info
.target_cpu
== cpu_number()) {
350 * I've just started-up, synchronize again with the starter cpu
351 * and then snap my TSC.
354 atomic_decl(&tsc_entry_barrier
, 1);
355 while (tsc_entry_barrier
!= 0)
356 ; /* spin for starter and target at barrier */
357 tsc_target
= rdtsc64();
358 atomic_decl(&tsc_exit_barrier
, 1);
366 processor_start_info_t
*psip
= (processor_start_info_t
*) arg
;
368 /* Ignore this if the current processor is not the starter */
369 if (cpu_number() != psip
->starter_cpu
)
372 DBG("start_cpu(%p) about to start cpu %d, lapic %d\n",
373 arg
, psip
->target_cpu
, psip
->target_lapic
);
375 KERNEL_DEBUG_CONSTANT(
376 TRACE_MP_CPU_START
| DBG_FUNC_START
,
378 psip
->target_lapic
, 0, 0, 0);
380 i386_start_cpu(psip
->target_lapic
, psip
->target_cpu
);
382 #ifdef POSTCODE_DELAY
383 /* Wait much longer if postcodes are displayed for a delay period. */
386 DBG("start_cpu(%p) about to wait for cpu %d\n",
387 arg
, psip
->target_cpu
);
389 mp_wait_for_cpu_up(psip
->target_cpu
, i
*100, 100);
391 KERNEL_DEBUG_CONSTANT(
392 TRACE_MP_CPU_START
| DBG_FUNC_END
,
394 cpu_datap(psip
->target_cpu
)->cpu_running
, 0, 0, 0);
396 if (TSC_sync_margin
&&
397 cpu_datap(psip
->target_cpu
)->cpu_running
) {
399 * Compare the TSC from the started processor with ours.
400 * Report and log/panic if it diverges by more than
401 * TSC_sync_margin (TSC_SYNC_MARGIN) ticks. This margin
402 * can be overriden by boot-arg (with 0 meaning no checking).
404 uint64_t tsc_starter
;
406 atomic_decl(&tsc_entry_barrier
, 1);
407 while (tsc_entry_barrier
!= 0)
408 ; /* spin for both processors at barrier */
409 tsc_starter
= rdtsc64();
410 atomic_decl(&tsc_exit_barrier
, 1);
411 while (tsc_exit_barrier
!= 0)
412 ; /* spin for target to store its TSC */
413 tsc_delta
= tsc_target
- tsc_starter
;
414 kprintf("TSC sync for cpu %d: 0x%016llx delta 0x%llx (%lld)\n",
415 psip
->target_cpu
, tsc_target
, tsc_delta
, tsc_delta
);
416 if (ABS(tsc_delta
) > (int64_t) TSC_sync_margin
) {
422 "Unsynchronized TSC for cpu %d: "
423 "0x%016llx, delta 0x%llx\n",
424 psip
->target_cpu
, tsc_target
, tsc_delta
);
433 int lapic
= cpu_to_lapic
[slot_num
];
438 DBGLOG_CPU_INIT(slot_num
);
440 DBG("intel_startCPU(%d) lapic_id=%d\n", slot_num
, lapic
);
441 DBG("IdlePTD(%p): 0x%x\n", &IdlePTD
, (int) (uintptr_t)IdlePTD
);
444 * Initialize (or re-initialize) the descriptor tables for this cpu.
445 * Propagate processor mode to slave.
447 cpu_desc_init64(cpu_datap(slot_num
));
449 /* Serialize use of the slave boot stack, etc. */
450 lck_mtx_lock(&mp_cpu_boot_lock
);
452 istate
= ml_set_interrupts_enabled(FALSE
);
453 if (slot_num
== get_cpu_number()) {
454 ml_set_interrupts_enabled(istate
);
455 lck_mtx_unlock(&mp_cpu_boot_lock
);
459 start_info
.starter_cpu
= cpu_number();
460 start_info
.target_cpu
= slot_num
;
461 start_info
.target_lapic
= lapic
;
462 tsc_entry_barrier
= 2;
463 tsc_exit_barrier
= 2;
466 * Perform the processor startup sequence with all running
467 * processors rendezvous'ed. This is required during periods when
468 * the cache-disable bit is set for MTRR/PAT initialization.
470 mp_rendezvous_no_intrs(start_cpu
, (void *) &start_info
);
472 start_info
.target_cpu
= 0;
474 ml_set_interrupts_enabled(istate
);
475 lck_mtx_unlock(&mp_cpu_boot_lock
);
477 if (!cpu_datap(slot_num
)->cpu_running
) {
478 kprintf("Failed to start CPU %02d\n", slot_num
);
479 printf("Failed to start CPU %02d, rebooting...\n", slot_num
);
484 kprintf("Started cpu %d (lapic id %08x)\n", slot_num
, lapic
);
490 cpu_signal_event_log_t
*cpu_signal
[MAX_CPUS
];
491 cpu_signal_event_log_t
*cpu_handle
[MAX_CPUS
];
493 MP_EVENT_NAME_DECL();
495 #endif /* MP_DEBUG */
498 * Note: called with NULL state when polling for TLB flush and cross-calls.
501 cpu_signal_handler(x86_saved_state_t
*regs
)
504 #pragma unused (regs)
505 #endif /* !MACH_KDP */
507 volatile int *my_word
;
509 SCHED_STATS_IPI(current_processor());
511 my_cpu
= cpu_number();
512 my_word
= &cpu_data_ptr
[my_cpu
]->cpu_signals
;
513 /* Store the initial set of signals for diagnostics. New
514 * signals could arrive while these are being processed
515 * so it's no more than a hint.
518 cpu_data_ptr
[my_cpu
]->cpu_prior_signals
= *my_word
;
522 if (i_bit(MP_KDP
, my_word
)) {
523 DBGLOG(cpu_handle
,my_cpu
,MP_KDP
);
524 i_bit_clear(MP_KDP
, my_word
);
525 /* Ensure that the i386_kernel_state at the base of the
526 * current thread's stack (if any) is synchronized with the
527 * context at the moment of the interrupt, to facilitate
528 * access through the debugger.
530 sync_iss_to_iks(regs
);
531 if (pmsafe_debug
&& !kdp_snapshot
)
532 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
533 mp_kdp_wait(TRUE
, FALSE
);
534 if (pmsafe_debug
&& !kdp_snapshot
)
535 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
537 #endif /* MACH_KDP */
538 if (i_bit(MP_TLB_FLUSH
, my_word
)) {
539 DBGLOG(cpu_handle
,my_cpu
,MP_TLB_FLUSH
);
540 i_bit_clear(MP_TLB_FLUSH
, my_word
);
541 pmap_update_interrupt();
542 } else if (i_bit(MP_CHUD
, my_word
)) {
543 DBGLOG(cpu_handle
,my_cpu
,MP_CHUD
);
544 i_bit_clear(MP_CHUD
, my_word
);
545 chudxnu_cpu_signal_handler();
546 } else if (i_bit(MP_CALL
, my_word
)) {
547 DBGLOG(cpu_handle
,my_cpu
,MP_CALL
);
548 i_bit_clear(MP_CALL
, my_word
);
549 mp_cpus_call_action();
550 } else if (i_bit(MP_CALL_PM
, my_word
)) {
551 DBGLOG(cpu_handle
,my_cpu
,MP_CALL_PM
);
552 i_bit_clear(MP_CALL_PM
, my_word
);
556 /* Called to poll only for cross-calls and TLB flush */
558 } else if (i_bit(MP_AST
, my_word
)) {
559 DBGLOG(cpu_handle
,my_cpu
,MP_AST
);
560 i_bit_clear(MP_AST
, my_word
);
561 ast_check(cpu_to_processor(my_cpu
));
568 extern void kprintf_break_lock(void);
570 NMIInterruptHandler(x86_saved_state_t
*regs
)
574 if (panic_active() && !panicDebugging
) {
576 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
581 atomic_incl(&NMIPI_acks
, 1);
582 atomic_incl(&NMI_count
, 1);
583 sync_iss_to_iks_unconditionally(regs
);
584 __asm__
volatile("movq %%rbp, %0" : "=m" (stackptr
));
586 if (cpu_number() == debugger_cpu
)
589 if (spinlock_timed_out
) {
591 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): NMIPI for spinlock acquisition timeout, spinlock: %p, spinlock owner: %p, current_thread: %p, spinlock_owner_cpu: 0x%x\n", cpu_number(), spinlock_timed_out
, (void *) spinlock_timed_out
->interlock
.lock_data
, current_thread(), spinlock_owner_cpu
);
592 panic_i386_backtrace(stackptr
, 64, &pstr
[0], TRUE
, regs
);
593 } else if (mp_cpus_call_wait_timeout
) {
595 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): Unresponsive processor, this CPU timed-out during cross-call\n", cpu_number());
596 panic_i386_backtrace(stackptr
, 64, &pstr
[0], TRUE
, regs
);
597 } else if (pmap_tlb_flush_timeout
== TRUE
) {
599 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): Unresponsive processor (this CPU did not acknowledge interrupts) TLB state:0x%x\n", cpu_number(), current_cpu_datap()->cpu_tlb_invalid
);
600 panic_i386_backtrace(stackptr
, 48, &pstr
[0], TRUE
, regs
);
604 if (pmsafe_debug
&& !kdp_snapshot
)
605 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
606 current_cpu_datap()->cpu_NMI_acknowledged
= TRUE
;
607 i_bit_clear(MP_KDP
, ¤t_cpu_datap()->cpu_signals
);
608 if (pmap_tlb_flush_timeout
||
609 spinlock_timed_out
||
610 mp_cpus_call_wait_timeout
||
612 mp_kdp_wait(FALSE
, TRUE
);
613 } else if (!mp_kdp_trap
&&
615 virtualized
&& (debug_boot_arg
& DB_NMI
)) {
617 * Under a VMM with the debug boot-arg set, drop into kdp.
618 * Since an NMI is involved, there's a risk of contending with
619 * a panic. And side-effects of NMIs may result in entry into,
620 * and continuing from, the debugger being unreliable.
622 if (__sync_bool_compare_and_swap(&mp_kdp_is_NMI
, FALSE
, TRUE
)) {
623 kprintf_break_lock();
624 kprintf("Debugger entry requested by NMI\n");
625 kdp_i386_trap(T_DEBUG
, saved_state64(regs
), 0, 0);
626 printf("Debugger entry requested by NMI\n");
627 mp_kdp_is_NMI
= FALSE
;
629 mp_kdp_wait(FALSE
, FALSE
);
632 mp_kdp_wait(FALSE
, FALSE
);
634 if (pmsafe_debug
&& !kdp_snapshot
)
635 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
643 * cpu_interrupt is really just to be used by the scheduler to
644 * get a CPU's attention it may not always issue an IPI. If an
645 * IPI is always needed then use i386_cpu_IPI.
648 cpu_interrupt(int cpu
)
650 boolean_t did_IPI
= FALSE
;
653 && pmCPUExitIdle(cpu_datap(cpu
))) {
658 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, did_IPI
, 0, 0, 0);
662 * Send a true NMI via the local APIC to the specified CPU.
665 cpu_NMI_interrupt(int cpu
)
667 if (smp_initialized
) {
676 boolean_t intrs_enabled
;
677 uint64_t tsc_timeout
;
679 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
681 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
682 if (!cpu_datap(cpu
)->cpu_running
)
684 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
685 cpu_NMI_interrupt(cpu
);
686 tsc_timeout
= !machine_timeout_suspended() ?
687 rdtsc64() + (1000 * 1000 * 1000 * 10ULL) :
689 while (!cpu_datap(cpu
)->cpu_NMI_acknowledged
) {
690 handle_pending_TLB_flushes();
692 if (rdtsc64() > tsc_timeout
)
693 panic("NMI_cpus() timeout cpu %d", cpu
);
695 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
698 ml_set_interrupts_enabled(intrs_enabled
);
701 static void (* volatile mp_PM_func
)(void) = NULL
;
706 assert(!ml_get_interrupts_enabled());
708 if (mp_PM_func
!= NULL
)
713 cpu_PM_interrupt(int cpu
)
715 assert(!ml_get_interrupts_enabled());
717 if (mp_PM_func
!= NULL
) {
718 if (cpu
== cpu_number())
721 i386_signal_cpu(cpu
, MP_CALL_PM
, ASYNC
);
726 PM_interrupt_register(void (*fn
)(void))
732 i386_signal_cpu(int cpu
, mp_event_t event
, mp_sync_t mode
)
734 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
735 uint64_t tsc_timeout
;
738 if (!cpu_datap(cpu
)->cpu_running
)
741 if (event
== MP_TLB_FLUSH
)
742 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_START
, cpu
, 0, 0, 0, 0);
744 DBGLOG(cpu_signal
, cpu
, event
);
746 i_bit_set(event
, signals
);
750 tsc_timeout
= !machine_timeout_suspended() ?
751 rdtsc64() + (1000*1000*1000) :
753 while (i_bit(event
, signals
) && rdtsc64() < tsc_timeout
) {
756 if (i_bit(event
, signals
)) {
757 DBG("i386_signal_cpu(%d, 0x%x, SYNC) timed out\n",
762 if (event
== MP_TLB_FLUSH
)
763 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_END
, cpu
, 0, 0, 0, 0);
767 * Helper function called when busy-waiting: panic if too long
768 * a TSC-based time has elapsed since the start of the spin.
771 mp_spin_timeout(uint64_t tsc_start
)
773 uint64_t tsc_timeout
;
776 if (machine_timeout_suspended())
780 * The timeout is 4 * the spinlock timeout period
781 * unless we have serial console printing (kprintf) enabled
782 * in which case we allow an even greater margin.
784 tsc_timeout
= disable_serial_output
? LockTimeOutTSC
<< 2
785 : LockTimeOutTSC
<< 4;
786 return (rdtsc64() > tsc_start
+ tsc_timeout
);
790 * Helper function to take a spinlock while ensuring that incoming IPIs
791 * are still serviced if interrupts are masked while we spin.
792 * Returns current interrupt state.
795 mp_safe_spin_lock(usimple_lock_t lock
)
797 if (ml_get_interrupts_enabled()) {
801 uint64_t tsc_spin_start
= rdtsc64();
802 while (!simple_lock_try(lock
)) {
803 cpu_signal_handler(NULL
);
804 if (mp_spin_timeout(tsc_spin_start
)) {
806 uintptr_t lowner
= (uintptr_t)
807 lock
->interlock
.lock_data
;
808 spinlock_timed_out
= lock
;
809 lock_cpu
= spinlock_timeout_NMI(lowner
);
810 panic("mp_safe_spin_lock() timed out,"
811 " lock: %p, owner thread: 0x%lx,"
812 " current_thread: %p, owner on CPU 0x%x",
814 current_thread(), lock_cpu
);
822 * All-CPU rendezvous:
823 * - CPUs are signalled,
824 * - all execute the setup function (if specified),
825 * - rendezvous (i.e. all cpus reach a barrier),
826 * - all execute the action function (if specified),
827 * - rendezvous again,
828 * - execute the teardown function (if specified), and then
831 * Note that the supplied external functions _must_ be reentrant and aware
832 * that they are running in parallel and in an unknown lock context.
836 mp_rendezvous_action(__unused
void *null
)
838 boolean_t intrs_enabled
;
839 uint64_t tsc_spin_start
;
842 if (mp_rv_setup_func
!= NULL
)
843 mp_rv_setup_func(mp_rv_func_arg
);
845 intrs_enabled
= ml_get_interrupts_enabled();
847 /* spin on entry rendezvous */
848 atomic_incl(&mp_rv_entry
, 1);
849 tsc_spin_start
= rdtsc64();
851 while (mp_rv_entry
< mp_rv_ncpus
) {
852 /* poll for pesky tlb flushes if interrupts disabled */
854 handle_pending_TLB_flushes();
855 if (mp_spin_timeout(tsc_spin_start
)) {
856 panic("mp_rv_action() entry: %ld of %d responses, start: 0x%llx, cur: 0x%llx", mp_rv_entry
, mp_rv_ncpus
, tsc_spin_start
, rdtsc64());
860 /* action function */
861 if (mp_rv_action_func
!= NULL
)
862 mp_rv_action_func(mp_rv_func_arg
);
864 /* spin on exit rendezvous */
865 atomic_incl(&mp_rv_exit
, 1);
866 tsc_spin_start
= rdtsc64();
867 while (mp_rv_exit
< mp_rv_ncpus
) {
869 handle_pending_TLB_flushes();
870 if (mp_spin_timeout(tsc_spin_start
))
871 panic("mp_rv_action() exit: %ld of %d responses, start: 0x%llx, cur: 0x%llx", mp_rv_exit
, mp_rv_ncpus
, tsc_spin_start
, rdtsc64());
874 /* teardown function */
875 if (mp_rv_teardown_func
!= NULL
)
876 mp_rv_teardown_func(mp_rv_func_arg
);
878 /* Bump completion count */
879 atomic_incl(&mp_rv_complete
, 1);
883 mp_rendezvous(void (*setup_func
)(void *),
884 void (*action_func
)(void *),
885 void (*teardown_func
)(void *),
888 uint64_t tsc_spin_start
;
890 if (!smp_initialized
) {
891 if (setup_func
!= NULL
)
893 if (action_func
!= NULL
)
895 if (teardown_func
!= NULL
)
900 /* obtain rendezvous lock */
901 (void) mp_safe_spin_lock(&mp_rv_lock
);
903 /* set static function pointers */
904 mp_rv_setup_func
= setup_func
;
905 mp_rv_action_func
= action_func
;
906 mp_rv_teardown_func
= teardown_func
;
907 mp_rv_func_arg
= arg
;
914 * signal other processors, which will call mp_rendezvous_action()
915 * with interrupts disabled
917 mp_rv_ncpus
= mp_cpus_call(CPUMASK_OTHERS
, NOSYNC
, &mp_rendezvous_action
, NULL
) + 1;
919 /* call executor function on this cpu */
920 mp_rendezvous_action(NULL
);
923 * Spin for everyone to complete.
924 * This is necessary to ensure that all processors have proceeded
925 * from the exit barrier before we release the rendezvous structure.
927 tsc_spin_start
= rdtsc64();
928 while (mp_rv_complete
< mp_rv_ncpus
) {
929 if (mp_spin_timeout(tsc_spin_start
))
930 panic("mp_rendezvous() timeout: %ld of %d responses, start: 0x%llx, cur: 0x%llx", mp_rv_complete
, mp_rv_ncpus
, tsc_spin_start
, rdtsc64());
934 mp_rv_setup_func
= NULL
;
935 mp_rv_action_func
= NULL
;
936 mp_rv_teardown_func
= NULL
;
937 mp_rv_func_arg
= NULL
;
940 simple_unlock(&mp_rv_lock
);
944 mp_rendezvous_break_lock(void)
946 simple_lock_init(&mp_rv_lock
, 0);
950 setup_disable_intrs(__unused
void * param_not_used
)
952 /* disable interrupts before the first barrier */
953 boolean_t intr
= ml_set_interrupts_enabled(FALSE
);
955 current_cpu_datap()->cpu_iflag
= intr
;
956 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
960 teardown_restore_intrs(__unused
void * param_not_used
)
962 /* restore interrupt flag following MTRR changes */
963 ml_set_interrupts_enabled(current_cpu_datap()->cpu_iflag
);
964 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
968 * A wrapper to mp_rendezvous() to call action_func() with interrupts disabled.
969 * This is exported for use by kexts.
972 mp_rendezvous_no_intrs(
973 void (*action_func
)(void *),
976 mp_rendezvous(setup_disable_intrs
,
978 teardown_restore_intrs
,
984 queue_chain_t link
; /* queue linkage */
985 void (*func
)(void *,void *); /* routine to call */
986 void *arg0
; /* routine's 1st arg */
987 void *arg1
; /* routine's 2nd arg */
988 cpumask_t
*maskp
; /* completion response mask */
994 decl_simple_lock_data(, lock
);
996 #define MP_CPUS_CALL_BUFS_PER_CPU MAX_CPUS
997 static mp_call_queue_t mp_cpus_call_freelist
;
998 static mp_call_queue_t mp_cpus_call_head
[MAX_CPUS
];
1000 static inline boolean_t
1001 mp_call_head_lock(mp_call_queue_t
*cqp
)
1003 boolean_t intrs_enabled
;
1005 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1006 simple_lock(&cqp
->lock
);
1008 return intrs_enabled
;
1012 mp_cpus_NMIPI(cpumask_t cpu_mask
) {
1013 unsigned int cpu
, cpu_bit
;
1016 for (cpu
= 0, cpu_bit
= 1; cpu
< real_ncpus
; cpu
++, cpu_bit
<<= 1) {
1017 if (cpu_mask
& cpu_bit
)
1018 cpu_NMI_interrupt(cpu
);
1020 deadline
= mach_absolute_time() + (LockTimeOut
);
1021 while (mach_absolute_time() < deadline
)
1026 static inline boolean_t
1027 mp_call_head_is_locked(mp_call_queue_t
*cqp
)
1029 return !ml_get_interrupts_enabled() &&
1030 hw_lock_held((hw_lock_t
)&cqp
->lock
);
1035 mp_call_head_unlock(mp_call_queue_t
*cqp
, boolean_t intrs_enabled
)
1037 simple_unlock(&cqp
->lock
);
1038 ml_set_interrupts_enabled(intrs_enabled
);
1041 static inline mp_call_t
*
1044 mp_call_t
*callp
= NULL
;
1045 boolean_t intrs_enabled
;
1046 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1048 intrs_enabled
= mp_call_head_lock(cqp
);
1049 if (!queue_empty(&cqp
->queue
))
1050 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1051 mp_call_head_unlock(cqp
, intrs_enabled
);
1057 mp_call_free(mp_call_t
*callp
)
1059 boolean_t intrs_enabled
;
1060 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1062 intrs_enabled
= mp_call_head_lock(cqp
);
1063 queue_enter_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1064 mp_call_head_unlock(cqp
, intrs_enabled
);
1067 static inline mp_call_t
*
1068 mp_call_dequeue_locked(mp_call_queue_t
*cqp
)
1070 mp_call_t
*callp
= NULL
;
1072 assert(mp_call_head_is_locked(cqp
));
1073 if (!queue_empty(&cqp
->queue
))
1074 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1079 mp_call_enqueue_locked(
1080 mp_call_queue_t
*cqp
,
1083 queue_enter(&cqp
->queue
, callp
, typeof(callp
), link
);
1086 /* Called on the boot processor to initialize global structures */
1088 mp_cpus_call_init(void)
1090 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1092 DBG("mp_cpus_call_init()\n");
1093 simple_lock_init(&cqp
->lock
, 0);
1094 queue_init(&cqp
->queue
);
1098 * Called at processor registration to add call buffers to the free list
1099 * and to initialize the per-cpu call queue.
1102 mp_cpus_call_cpu_init(int cpu
)
1105 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu
];
1108 simple_lock_init(&cqp
->lock
, 0);
1109 queue_init(&cqp
->queue
);
1110 for (i
= 0; i
< MP_CPUS_CALL_BUFS_PER_CPU
; i
++) {
1111 callp
= (mp_call_t
*) kalloc(sizeof(mp_call_t
));
1112 mp_call_free(callp
);
1115 DBG("mp_cpus_call_init(%d) done\n", cpu
);
1119 * This is called from cpu_signal_handler() to process an MP_CALL signal.
1120 * And also from i386_deactivate_cpu() when a cpu is being taken offline.
1123 mp_cpus_call_action(void)
1125 mp_call_queue_t
*cqp
;
1126 boolean_t intrs_enabled
;
1130 assert(!ml_get_interrupts_enabled());
1131 cqp
= &mp_cpus_call_head
[cpu_number()];
1132 intrs_enabled
= mp_call_head_lock(cqp
);
1133 while ((callp
= mp_call_dequeue_locked(cqp
)) != NULL
) {
1134 /* Copy call request to the stack to free buffer */
1136 mp_call_free(callp
);
1137 if (call
.func
!= NULL
) {
1138 mp_call_head_unlock(cqp
, intrs_enabled
);
1139 KERNEL_DEBUG_CONSTANT(
1140 TRACE_MP_CPUS_CALL_ACTION
,
1141 VM_KERNEL_UNSLIDE(call
.func
), VM_KERNEL_UNSLIDE_OR_PERM(call
.arg0
),
1142 VM_KERNEL_UNSLIDE_OR_PERM(call
.arg1
), VM_KERNEL_ADDRPERM(call
.maskp
), 0);
1143 call
.func(call
.arg0
, call
.arg1
);
1144 (void) mp_call_head_lock(cqp
);
1146 if (call
.maskp
!= NULL
)
1147 i_bit_set(cpu_number(), call
.maskp
);
1149 mp_call_head_unlock(cqp
, intrs_enabled
);
1153 * mp_cpus_call() runs a given function on cpus specified in a given cpu mask.
1154 * Possible modes are:
1155 * SYNC: function is called serially on target cpus in logical cpu order
1156 * waiting for each call to be acknowledged before proceeding
1157 * ASYNC: function call is queued to the specified cpus
1158 * waiting for all calls to complete in parallel before returning
1159 * NOSYNC: function calls are queued
1160 * but we return before confirmation of calls completing.
1161 * The action function may be NULL.
1162 * The cpu mask may include the local cpu. Offline cpus are ignored.
1163 * The return value is the number of cpus on which the call was made or queued.
1169 void (*action_func
)(void *),
1172 return mp_cpus_call1(
1175 (void (*)(void *,void *))action_func
,
1182 mp_cpus_call_wait(boolean_t intrs_enabled
,
1183 cpumask_t cpus_called
,
1184 cpumask_t
*cpus_responded
)
1186 mp_call_queue_t
*cqp
;
1187 uint64_t tsc_spin_start
;
1189 assert(ml_get_interrupts_enabled() == 0 || get_preemption_level() != 0);
1190 cqp
= &mp_cpus_call_head
[cpu_number()];
1192 tsc_spin_start
= rdtsc64();
1193 while (*cpus_responded
!= cpus_called
) {
1194 if (!intrs_enabled
) {
1195 /* Sniffing w/o locking */
1196 if (!queue_empty(&cqp
->queue
))
1197 mp_cpus_call_action();
1198 cpu_signal_handler(NULL
);
1200 if (mp_spin_timeout(tsc_spin_start
)) {
1201 cpumask_t cpus_unresponsive
;
1203 mp_cpus_call_wait_timeout
= TRUE
;
1204 cpus_unresponsive
= cpus_called
& ~(*cpus_responded
);
1205 mp_cpus_NMIPI(cpus_unresponsive
);
1206 panic("mp_cpus_call_wait() timeout, cpus: 0x%llx",
1216 void (*action_func
)(void *, void *),
1219 cpumask_t
*cpus_calledp
)
1222 boolean_t intrs_enabled
= FALSE
;
1223 boolean_t call_self
= FALSE
;
1224 cpumask_t cpus_called
= 0;
1225 cpumask_t cpus_responded
= 0;
1226 long cpus_call_count
= 0;
1227 uint64_t tsc_spin_start
;
1228 boolean_t topo_lock
;
1230 KERNEL_DEBUG_CONSTANT(
1231 TRACE_MP_CPUS_CALL
| DBG_FUNC_START
,
1232 cpus
, mode
, VM_KERNEL_UNSLIDE(action_func
), VM_KERNEL_UNSLIDE_OR_PERM(arg0
), VM_KERNEL_UNSLIDE_OR_PERM(arg1
));
1234 if (!smp_initialized
) {
1235 if ((cpus
& CPUMASK_SELF
) == 0)
1237 if (action_func
!= NULL
) {
1238 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1239 action_func(arg0
, arg1
);
1240 ml_set_interrupts_enabled(intrs_enabled
);
1247 * Queue the call for each non-local requested cpu.
1248 * This is performed under the topo lock to prevent changes to
1249 * cpus online state and to prevent concurrent rendezvouses --
1250 * although an exception is made if we're calling only the master
1251 * processor since that always remains active. Note: this exception
1252 * is expected for longterm timer nosync cross-calls to the master cpu.
1254 mp_disable_preemption();
1255 intrs_enabled
= ml_get_interrupts_enabled();
1256 topo_lock
= (cpus
!= cpu_to_cpumask(master_cpu
));
1258 ml_set_interrupts_enabled(FALSE
);
1259 (void) mp_safe_spin_lock(&x86_topo_lock
);
1261 for (cpu
= 0; cpu
< (cpu_t
) real_ncpus
; cpu
++) {
1262 if (((cpu_to_cpumask(cpu
) & cpus
) == 0) ||
1263 !cpu_datap(cpu
)->cpu_running
)
1265 tsc_spin_start
= rdtsc64();
1266 if (cpu
== (cpu_t
) cpu_number()) {
1268 * We don't IPI ourself and if calling asynchronously,
1269 * we defer our call until we have signalled all others.
1272 if (mode
== SYNC
&& action_func
!= NULL
) {
1273 KERNEL_DEBUG_CONSTANT(
1274 TRACE_MP_CPUS_CALL_LOCAL
,
1275 VM_KERNEL_UNSLIDE(action_func
),
1276 VM_KERNEL_UNSLIDE_OR_PERM(arg0
), VM_KERNEL_UNSLIDE_OR_PERM(arg1
), 0, 0);
1277 action_func(arg0
, arg1
);
1281 * Here to queue a call to cpu and IPI.
1283 mp_call_t
*callp
= NULL
;
1284 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu
];
1285 boolean_t intrs_inner
;
1289 callp
= mp_call_alloc();
1290 intrs_inner
= mp_call_head_lock(cqp
);
1291 if (callp
== NULL
) {
1292 mp_call_head_unlock(cqp
, intrs_inner
);
1293 KERNEL_DEBUG_CONSTANT(
1294 TRACE_MP_CPUS_CALL_NOBUF
,
1297 /* Sniffing w/o locking */
1298 if (!queue_empty(&cqp
->queue
))
1299 mp_cpus_call_action();
1300 handle_pending_TLB_flushes();
1302 if (mp_spin_timeout(tsc_spin_start
))
1303 panic("mp_cpus_call1() timeout start: 0x%llx, cur: 0x%llx",
1304 tsc_spin_start
, rdtsc64());
1307 callp
->maskp
= (mode
== NOSYNC
) ? NULL
: &cpus_responded
;
1308 callp
->func
= action_func
;
1311 mp_call_enqueue_locked(cqp
, callp
);
1313 cpus_called
|= cpu_to_cpumask(cpu
);
1314 i386_signal_cpu(cpu
, MP_CALL
, ASYNC
);
1315 mp_call_head_unlock(cqp
, intrs_inner
);
1317 mp_cpus_call_wait(intrs_inner
, cpus_called
, &cpus_responded
);
1322 simple_unlock(&x86_topo_lock
);
1323 ml_set_interrupts_enabled(intrs_enabled
);
1326 /* Call locally if mode not SYNC */
1327 if (mode
!= SYNC
&& call_self
) {
1328 KERNEL_DEBUG_CONSTANT(
1329 TRACE_MP_CPUS_CALL_LOCAL
,
1330 VM_KERNEL_UNSLIDE(action_func
), VM_KERNEL_UNSLIDE_OR_PERM(arg0
), VM_KERNEL_UNSLIDE_OR_PERM(arg1
), 0, 0);
1331 if (action_func
!= NULL
) {
1332 ml_set_interrupts_enabled(FALSE
);
1333 action_func(arg0
, arg1
);
1334 ml_set_interrupts_enabled(intrs_enabled
);
1338 /* For ASYNC, now wait for all signaled cpus to complete their calls */
1340 mp_cpus_call_wait(intrs_enabled
, cpus_called
, &cpus_responded
);
1342 /* Safe to allow pre-emption now */
1343 mp_enable_preemption();
1347 cpus_called
|= cpu_to_cpumask(cpu
);
1352 *cpus_calledp
= cpus_called
;
1354 KERNEL_DEBUG_CONSTANT(
1355 TRACE_MP_CPUS_CALL
| DBG_FUNC_END
,
1356 cpus_call_count
, cpus_called
, 0, 0, 0);
1358 return (cpu_t
) cpus_call_count
;
1363 mp_broadcast_action(__unused
void *null
)
1365 /* call action function */
1366 if (mp_bc_action_func
!= NULL
)
1367 mp_bc_action_func(mp_bc_func_arg
);
1369 /* if we're the last one through, wake up the instigator */
1370 if (atomic_decl_and_test(&mp_bc_count
, 1))
1371 thread_wakeup(((event_t
)(uintptr_t) &mp_bc_count
));
1375 * mp_broadcast() runs a given function on all active cpus.
1376 * The caller blocks until the functions has run on all cpus.
1377 * The caller will also block if there is another pending braodcast.
1381 void (*action_func
)(void *),
1384 if (!smp_initialized
) {
1385 if (action_func
!= NULL
)
1390 /* obtain broadcast lock */
1391 lck_mtx_lock(&mp_bc_lock
);
1393 /* set static function pointers */
1394 mp_bc_action_func
= action_func
;
1395 mp_bc_func_arg
= arg
;
1397 assert_wait((event_t
)(uintptr_t)&mp_bc_count
, THREAD_UNINT
);
1400 * signal other processors, which will call mp_broadcast_action()
1402 mp_bc_count
= real_ncpus
; /* assume max possible active */
1403 mp_bc_ncpus
= mp_cpus_call(CPUMASK_OTHERS
, NOSYNC
, *mp_broadcast_action
, NULL
) + 1;
1404 atomic_decl(&mp_bc_count
, real_ncpus
- mp_bc_ncpus
); /* subtract inactive */
1406 /* call executor function on this cpu */
1407 mp_broadcast_action(NULL
);
1409 /* block for other cpus to have run action_func */
1410 if (mp_bc_ncpus
> 1)
1411 thread_block(THREAD_CONTINUE_NULL
);
1413 clear_wait(current_thread(), THREAD_AWAKENED
);
1416 lck_mtx_unlock(&mp_bc_lock
);
1420 mp_cpus_kick(cpumask_t cpus
)
1423 boolean_t intrs_enabled
= FALSE
;
1425 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1426 mp_safe_spin_lock(&x86_topo_lock
);
1428 for (cpu
= 0; cpu
< (cpu_t
) real_ncpus
; cpu
++) {
1429 if ((cpu
== (cpu_t
) cpu_number())
1430 || ((cpu_to_cpumask(cpu
) & cpus
) == 0)
1431 || (!cpu_datap(cpu
)->cpu_running
))
1436 lapic_send_ipi(cpu
, LAPIC_VECTOR(KICK
));
1439 simple_unlock(&x86_topo_lock
);
1440 ml_set_interrupts_enabled(intrs_enabled
);
1444 i386_activate_cpu(void)
1446 cpu_data_t
*cdp
= current_cpu_datap();
1448 assert(!ml_get_interrupts_enabled());
1450 if (!smp_initialized
) {
1451 cdp
->cpu_running
= TRUE
;
1455 simple_lock(&x86_topo_lock
);
1456 cdp
->cpu_running
= TRUE
;
1458 simple_unlock(&x86_topo_lock
);
1463 i386_deactivate_cpu(void)
1465 cpu_data_t
*cdp
= current_cpu_datap();
1467 assert(!ml_get_interrupts_enabled());
1469 KERNEL_DEBUG_CONSTANT(
1470 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_START
,
1473 simple_lock(&x86_topo_lock
);
1474 cdp
->cpu_running
= FALSE
;
1475 simple_unlock(&x86_topo_lock
);
1478 * Move all of this cpu's timers to the master/boot cpu,
1479 * and poke it in case there's a sooner deadline for it to schedule.
1481 timer_queue_shutdown(&cdp
->rtclock_timer
.queue
);
1482 mp_cpus_call(cpu_to_cpumask(master_cpu
), ASYNC
, timer_queue_expire_local
, NULL
);
1485 * Open an interrupt window
1486 * and ensure any pending IPI or timer is serviced
1488 mp_disable_preemption();
1489 ml_set_interrupts_enabled(TRUE
);
1491 while (cdp
->cpu_signals
&& x86_lcpu()->rtcDeadline
!= EndOfAllTime
)
1494 * Ensure there's no remaining timer deadline set
1495 * - AICPM may have left one active.
1499 ml_set_interrupts_enabled(FALSE
);
1500 mp_enable_preemption();
1502 KERNEL_DEBUG_CONSTANT(
1503 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_END
,
1507 int pmsafe_debug
= 1;
1510 volatile boolean_t mp_kdp_trap
= FALSE
;
1511 volatile boolean_t mp_kdp_is_NMI
= FALSE
;
1512 volatile unsigned long mp_kdp_ncpus
;
1513 boolean_t mp_kdp_state
;
1520 unsigned int ncpus
= 0;
1521 unsigned int my_cpu
;
1522 uint64_t tsc_timeout
;
1524 DBG("mp_kdp_enter()\n");
1527 if (!smp_initialized
)
1528 simple_lock_init(&mp_kdp_lock
, 0);
1532 * Here to enter the debugger.
1533 * In case of races, only one cpu is allowed to enter kdp after
1536 mp_kdp_state
= ml_set_interrupts_enabled(FALSE
);
1537 my_cpu
= cpu_number();
1539 if (my_cpu
== (unsigned) debugger_cpu
) {
1540 kprintf("\n\nRECURSIVE DEBUGGER ENTRY DETECTED\n\n");
1545 cpu_datap(my_cpu
)->debugger_entry_time
= mach_absolute_time();
1546 simple_lock(&mp_kdp_lock
);
1548 if (pmsafe_debug
&& !kdp_snapshot
)
1549 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
1551 while (mp_kdp_trap
) {
1552 simple_unlock(&mp_kdp_lock
);
1553 DBG("mp_kdp_enter() race lost\n");
1555 mp_kdp_wait(TRUE
, FALSE
);
1557 simple_lock(&mp_kdp_lock
);
1559 debugger_cpu
= my_cpu
;
1561 mp_kdp_ncpus
= 1; /* self */
1563 debugger_entry_time
= cpu_datap(my_cpu
)->debugger_entry_time
;
1564 simple_unlock(&mp_kdp_lock
);
1567 * Deliver a nudge to other cpus, counting how many
1569 DBG("mp_kdp_enter() signaling other processors\n");
1570 if (force_immediate_debugger_NMI
== FALSE
) {
1571 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1572 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1575 i386_signal_cpu(cpu
, MP_KDP
, ASYNC
);
1578 * Wait other processors to synchronize
1580 DBG("mp_kdp_enter() waiting for (%d) processors to suspend\n", ncpus
);
1583 * This timeout is rather arbitrary; we don't want to NMI
1584 * processors that are executing at potentially
1585 * "unsafe-to-interrupt" points such as the trampolines,
1586 * but neither do we want to lose state by waiting too long.
1588 tsc_timeout
= rdtsc64() + (LockTimeOutTSC
);
1590 while (mp_kdp_ncpus
!= ncpus
&& rdtsc64() < tsc_timeout
) {
1592 * A TLB shootdown request may be pending--this would
1593 * result in the requesting processor waiting in
1594 * PMAP_UPDATE_TLBS() until this processor deals with it.
1595 * Process it, so it can now enter mp_kdp_wait()
1597 handle_pending_TLB_flushes();
1600 /* If we've timed out, and some processor(s) are still unresponsive,
1601 * interrupt them with an NMI via the local APIC.
1603 if (mp_kdp_ncpus
!= ncpus
) {
1604 DBG("mp_kdp_enter() timed-out on cpu %d, NMI-ing\n", my_cpu
);
1605 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1606 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1608 if (cpu_signal_pending(cpu
, MP_KDP
))
1609 cpu_NMI_interrupt(cpu
);
1611 /* Wait again for the same timeout */
1612 tsc_timeout
= rdtsc64() + (LockTimeOutTSC
);
1613 while (mp_kdp_ncpus
!= ncpus
&& rdtsc64() < tsc_timeout
) {
1614 handle_pending_TLB_flushes();
1617 if (mp_kdp_ncpus
!= ncpus
) {
1618 panic("mp_kdp_enter() timed-out waiting after NMI");
1623 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1624 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1626 cpu_NMI_interrupt(cpu
);
1629 DBG("mp_kdp_enter() %d processors done %s\n",
1630 (int)mp_kdp_ncpus
, (mp_kdp_ncpus
== ncpus
) ? "OK" : "timed out");
1632 postcode(MP_KDP_ENTER
);
1636 cpu_signal_pending(int cpu
, mp_event_t event
)
1638 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
1639 boolean_t retval
= FALSE
;
1641 if (i_bit(event
, signals
))
1646 long kdp_x86_xcpu_invoke(const uint16_t lcpu
, kdp_x86_xcpu_func_t func
,
1647 void *arg0
, void *arg1
)
1649 if (lcpu
> (real_ncpus
- 1))
1655 kdp_xcpu_call_func
.func
= func
;
1656 kdp_xcpu_call_func
.ret
= -1;
1657 kdp_xcpu_call_func
.arg0
= arg0
;
1658 kdp_xcpu_call_func
.arg1
= arg1
;
1659 kdp_xcpu_call_func
.cpu
= lcpu
;
1660 DBG("Invoking function %p on CPU %d\n", func
, (int32_t)lcpu
);
1661 while (kdp_xcpu_call_func
.cpu
!= KDP_XCPU_NONE
)
1663 return kdp_xcpu_call_func
.ret
;
1667 kdp_x86_xcpu_poll(void)
1669 if ((uint16_t)cpu_number() == kdp_xcpu_call_func
.cpu
) {
1670 kdp_xcpu_call_func
.ret
=
1671 kdp_xcpu_call_func
.func(kdp_xcpu_call_func
.arg0
,
1672 kdp_xcpu_call_func
.arg1
,
1674 kdp_xcpu_call_func
.cpu
= KDP_XCPU_NONE
;
1679 mp_kdp_wait(boolean_t flush
, boolean_t isNMI
)
1681 DBG("mp_kdp_wait()\n");
1683 current_cpu_datap()->debugger_ipi_time
= mach_absolute_time();
1685 /* If we've trapped due to a machine-check, save MCA registers */
1689 atomic_incl((volatile long *)&mp_kdp_ncpus
, 1);
1690 while (mp_kdp_trap
|| (isNMI
== TRUE
)) {
1692 * A TLB shootdown request may be pending--this would result
1693 * in the requesting processor waiting in PMAP_UPDATE_TLBS()
1694 * until this processor handles it.
1695 * Process it, so it can now enter mp_kdp_wait()
1698 handle_pending_TLB_flushes();
1700 kdp_x86_xcpu_poll();
1704 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1705 DBG("mp_kdp_wait() done\n");
1711 DBG("mp_kdp_exit()\n");
1713 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1715 debugger_exit_time
= mach_absolute_time();
1717 mp_kdp_trap
= FALSE
;
1720 /* Wait other processors to stop spinning. XXX needs timeout */
1721 DBG("mp_kdp_exit() waiting for processors to resume\n");
1722 while (mp_kdp_ncpus
> 0) {
1724 * a TLB shootdown request may be pending... this would result in the requesting
1725 * processor waiting in PMAP_UPDATE_TLBS() until this processor deals with it.
1726 * Process it, so it can now enter mp_kdp_wait()
1728 handle_pending_TLB_flushes();
1733 if (pmsafe_debug
&& !kdp_snapshot
)
1734 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
1736 debugger_exit_time
= mach_absolute_time();
1738 DBG("mp_kdp_exit() done\n");
1739 (void) ml_set_interrupts_enabled(mp_kdp_state
);
1743 #define TRAP_DEBUGGER __asm__ volatile("int3")
1746 DebuggerWithCallback(kern_return_t (*callback
) (void*),
1747 void *callback_context
,
1748 boolean_t proceed_on_sync_failure
)
1750 simple_lock(&debugger_callback_lock
);
1752 struct debugger_callback callback_buf
= {
1753 .callback
= callback
,
1754 .callback_context
= callback_context
,
1755 .proceed_on_sync_failure
= proceed_on_sync_failure
,
1756 .error
= KERN_FAILURE
1759 assert(debugger_callback
== NULL
);
1760 debugger_callback
= &callback_buf
;
1764 debugger_callback
= NULL
;
1766 simple_unlock(&debugger_callback_lock
);
1768 return callback_buf
.error
;
1771 #endif /* MACH_KDP */
1774 mp_recent_debugger_activity(void) {
1775 uint64_t abstime
= mach_absolute_time();
1776 return (((abstime
- debugger_entry_time
) < LastDebuggerEntryAllowance
) ||
1777 ((abstime
- debugger_exit_time
) < LastDebuggerEntryAllowance
));
1783 __unused processor_t processor
)
1789 processor_t processor
)
1791 int cpu
= processor
->cpu_id
;
1793 if (cpu
!= cpu_number()) {
1794 i386_signal_cpu(cpu
, MP_AST
, ASYNC
);
1795 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, 1, 0, 0, 0);
1800 slave_machine_init(void *param
)
1803 * Here in process context, but with interrupts disabled.
1805 DBG("slave_machine_init() CPU%d\n", get_cpu_number());
1807 if (param
== FULL_SLAVE_INIT
) {
1813 cpu_machine_init(); /* Interrupts enabled hereafter */
1817 int cpu_number(void)
1819 return get_cpu_number();
1827 simple_lock_init(&cpu_warm_lock
, 0);
1828 queue_init(&cpu_warm_call_list
);
1829 for (i
= 0; i
< NUM_CPU_WARM_CALLS
; i
++) {
1830 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)&cpu_warm_call_arr
[i
]);
1835 grab_warm_timer_call()
1838 timer_call_t call
= NULL
;
1841 simple_lock(&cpu_warm_lock
);
1842 if (!queue_empty(&cpu_warm_call_list
)) {
1843 call
= (timer_call_t
) dequeue_head(&cpu_warm_call_list
);
1845 simple_unlock(&cpu_warm_lock
);
1852 free_warm_timer_call(timer_call_t call
)
1857 simple_lock(&cpu_warm_lock
);
1858 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)call
);
1859 simple_unlock(&cpu_warm_lock
);
1864 * Runs in timer call context (interrupts disabled).
1867 cpu_warm_timer_call_func(
1868 call_entry_param_t p0
,
1869 __unused call_entry_param_t p1
)
1871 free_warm_timer_call((timer_call_t
)p0
);
1876 * Runs with interrupts disabled on the CPU we wish to warm (i.e. CPU 0).
1882 cpu_warm_data_t cwdp
= (cpu_warm_data_t
)arg
;
1884 timer_call_enter(cwdp
->cwd_call
, cwdp
->cwd_deadline
, TIMER_CALL_SYS_CRITICAL
| TIMER_CALL_LOCAL
);
1885 cwdp
->cwd_result
= 0;
1891 * Not safe to call with interrupts disabled.
1894 ml_interrupt_prewarm(
1897 struct cpu_warm_data cwd
;
1901 if (ml_get_interrupts_enabled() == FALSE
) {
1902 panic("%s: Interrupts disabled?\n", __FUNCTION__
);
1906 * If the platform doesn't need our help, say that we succeeded.
1908 if (!ml_get_interrupt_prewake_applicable()) {
1909 return KERN_SUCCESS
;
1913 * Grab a timer call to use.
1915 call
= grab_warm_timer_call();
1917 return KERN_RESOURCE_SHORTAGE
;
1920 timer_call_setup(call
, cpu_warm_timer_call_func
, call
);
1921 cwd
.cwd_call
= call
;
1922 cwd
.cwd_deadline
= deadline
;
1926 * For now, non-local interrupts happen on the master processor.
1928 ct
= mp_cpus_call(cpu_to_cpumask(master_cpu
), SYNC
, _cpu_warm_setup
, &cwd
);
1930 free_warm_timer_call(call
);
1931 return KERN_FAILURE
;
1933 return cwd
.cwd_result
;
1937 #if DEBUG || DEVELOPMENT
1939 kernel_spin(uint64_t spin_ns
)
1945 kprintf("kernel_spin(%llu) spinning uninterruptibly\n", spin_ns
);
1946 istate
= ml_set_interrupts_enabled(FALSE
);
1947 nanoseconds_to_absolutetime(spin_ns
, &spin_abs
);
1948 deadline
= mach_absolute_time() + spin_ns
;
1949 while (mach_absolute_time() < deadline
)
1951 ml_set_interrupts_enabled(istate
);
1952 kprintf("kernel_spin() continuing\n");