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1 /*
2 * Copyright (c) 2005-2006 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29 #include <string.h>
30 #include <mach/vm_param.h>
31 #include <mach/vm_prot.h>
32 #include <mach/machine.h>
33 #include <mach/time_value.h>
34 #include <kern/spl.h>
35 #include <kern/assert.h>
36 #include <kern/debug.h>
37 #include <kern/misc_protos.h>
38 #include <kern/startup.h>
39 #include <kern/clock.h>
40 #include <kern/cpu_data.h>
41 #include <kern/processor.h>
42 #include <vm/vm_page.h>
43 #include <vm/pmap.h>
44 #include <vm/vm_kern.h>
45 #include <i386/pmap.h>
46 #include <i386/misc_protos.h>
47 #include <i386/cpuid.h>
48 #include <i386/mp.h>
49 #include <i386/machine_cpu.h>
50 #include <i386/machine_routines.h>
51 #include <i386/io_map_entries.h>
52 #include <architecture/i386/pio.h>
53 #include <i386/cpuid.h>
54 #include <i386/apic.h>
55 #include <i386/tsc.h>
56 #include <i386/hpet.h>
57 #include <i386/pmCPU.h>
58 #include <i386/cpu_topology.h>
59 #include <i386/cpu_threads.h>
60 #include <pexpert/device_tree.h>
61 #if MACH_KDB
62 #include <i386/db_machdep.h>
63 #endif
64 #if MACH_KDB
65 #include <ddb/db_aout.h>
66 #include <ddb/db_access.h>
67 #include <ddb/db_sym.h>
68 #include <ddb/db_variables.h>
69 #include <ddb/db_command.h>
70 #include <ddb/db_output.h>
71 #include <ddb/db_expr.h>
72 #endif /* MACH_KDB */
73 #include <ddb/tr.h>
74
75 /* Decimal powers: */
76 #define kilo (1000ULL)
77 #define Mega (kilo * kilo)
78 #define Giga (kilo * Mega)
79 #define Tera (kilo * Giga)
80 #define Peta (kilo * Tera)
81
82 uint32_t hpetArea = 0;
83 uint32_t hpetAreap = 0;
84 uint64_t hpetFemto = 0;
85 uint64_t hpetFreq = 0;
86 uint64_t hpetCvt = 0; /* (TAKE OUT LATER) */
87 uint64_t hpetCvtt2n = 0;
88 uint64_t hpetCvtn2t = 0;
89 uint64_t tsc2hpet = 0;
90 uint64_t hpet2tsc = 0;
91 uint64_t bus2hpet = 0;
92 uint64_t hpet2bus = 0;
93
94 uint32_t rcbaArea = 0;
95 uint32_t rcbaAreap = 0;
96
97 static int (*hpet_req)(uint32_t apicid, void *arg, hpetRequest_t *hpet) = NULL;
98 static void *hpet_arg = NULL;
99
100 #if DEBUG
101 #define DBG(x...) kprintf("DBG: " x)
102 #else
103 #define DBG(x...)
104 #endif
105
106 int
107 hpet_register_callback(int (*hpet_reqst)(uint32_t apicid,
108 void *arg,
109 hpetRequest_t *hpet),
110 void *arg)
111 {
112 hpet_req = hpet_reqst;
113 hpet_arg = arg;
114 return(0);
115 }
116
117 /*
118 * This routine is called to obtain an HPET and have it assigned
119 * to a CPU. It returns 0 if successful and non-zero if one could
120 * not be assigned.
121 */
122 int
123 hpet_request(uint32_t cpu)
124 {
125 hpetRequest_t hpetReq;
126 int rc;
127 x86_lcpu_t *lcpu;
128 x86_core_t *core;
129 x86_pkg_t *pkg;
130 boolean_t enabled;
131
132 if (hpet_req == NULL) {
133 return(-1);
134 }
135
136 rc = (*hpet_req)(ml_get_apicid(cpu), hpet_arg, &hpetReq);
137 if (rc != 0) {
138 return(rc);
139 }
140
141 enabled = ml_set_interrupts_enabled(FALSE);
142 lcpu = cpu_to_lcpu(cpu);
143 core = lcpu->core;
144 pkg = core->package;
145
146 /*
147 * Compute the address of the HPET.
148 */
149 core->Hpet = (hpetTimer_t *)((uint8_t *)hpetArea + hpetReq.hpetOffset);
150 core->HpetVec = hpetReq.hpetVector;
151
152 /*
153 * Enable interrupts
154 */
155 core->Hpet->Config |= Tn_INT_ENB_CNF;
156
157 /*
158 * Save the configuration
159 */
160 core->HpetCfg = core->Hpet->Config;
161 core->HpetCmp = 0;
162
163 /*
164 * If the CPU is the "primary" for the package, then
165 * add the HPET to the package too.
166 */
167 if (lcpu->primary) {
168 pkg->Hpet = core->Hpet;
169 pkg->HpetCfg = core->HpetCfg;
170 pkg->HpetCmp = core->HpetCmp;
171 pkg->flags |= X86PKG_FL_HAS_HPET;
172 }
173
174 ml_set_interrupts_enabled(enabled);
175
176 return(0);
177 }
178
179 /*
180 * Map the RCBA area.
181 */
182 static void
183 map_rcbaArea(void)
184 {
185 /*
186 * Get RCBA area physical address and map it
187 */
188 outl(cfgAdr, lpcCfg | (0xF0 & 0xFC));
189 rcbaAreap = inl(cfgDat | (0xF0 & 0x03));
190 rcbaArea = io_map_spec(rcbaAreap & -4096, PAGE_SIZE * 4, VM_WIMG_IO);
191 kprintf("RCBA: vaddr = %08X, paddr = %08X\n", rcbaArea, rcbaAreap);
192 }
193
194 /*
195 * Initialize the HPET
196 */
197 void
198 hpet_init(void)
199 {
200 unsigned int *xmod;
201
202 map_rcbaArea();
203
204 /*
205 * Is the HPET memory already enabled?
206 * If not, set address and enable.
207 */
208 xmod = (uint32_t *)(rcbaArea + 0x3404); /* Point to the HPTC */
209 uint32_t hptc = *xmod; /* Get HPET config */
210 DBG(" current RCBA.HPTC: %08X\n", *xmod);
211 if(!(hptc & hptcAE)) {
212 DBG("HPET memory is not enabled, "
213 "enabling and assigning to 0xFED00000 (hope that's ok)\n");
214 *xmod = (hptc & ~3) | hptcAE;
215 }
216
217 /*
218 * Get physical address of HPET and map it.
219 */
220 hpetAreap = hpetAddr | ((hptc & 3) << 12);
221 hpetArea = io_map_spec(hpetAreap & -4096, PAGE_SIZE * 4, VM_WIMG_IO);
222 kprintf("HPET: vaddr = %08X, paddr = %08X\n", hpetArea, hpetAreap);
223
224 /*
225 * Extract the HPET tick rate.
226 * The period of the HPET is reported in femtoseconds (10**-15s)
227 * and convert to frequency in hertz.
228 */
229 hpetFemto = (uint32_t)(((hpetReg_t *)hpetArea)->GCAP_ID >> 32);
230 hpetFreq = (1 * Peta) / hpetFemto;
231
232 /*
233 * The conversion factor is the number of nanoseconds per HPET tick
234 * with about 32 bits of fraction. The value is converted to a
235 * base-2 fixed point number. To convert from HPET to nanoseconds,
236 * multiply the value by the conversion factor using 96-bit arithmetic,
237 * then shift right 32 bits. If the value is known to be small,
238 * 64-bit arithmetic will work.
239 */
240
241 /*
242 * Begin conversion of base 10 femtoseconds to base 2, calculate:
243 * - HPET ticks to nanoseconds conversion in base 2 fraction (* 2**32)
244 * - nanoseconds to HPET ticks conversion
245 */
246 hpetCvtt2n = (uint64_t)hpetFemto << 32;
247 hpetCvtt2n = hpetCvtt2n / 1000000ULL;
248 hpetCvtn2t = 0xFFFFFFFFFFFFFFFFULL / hpetCvtt2n;
249 kprintf("HPET: Frequency = %6d.%04dMHz, "
250 "cvtt2n = %08X.%08X, cvtn2t = %08X.%08X\n",
251 (uint32_t)(hpetFreq / Mega), (uint32_t)(hpetFreq % Mega),
252 (uint32_t)(hpetCvtt2n >> 32), (uint32_t)hpetCvtt2n,
253 (uint32_t)(hpetCvtn2t >> 32), (uint32_t)hpetCvtn2t);
254
255
256 /* (TAKE OUT LATER)
257 * Begin conversion of base 10 femtoseconds to base 2
258 * HPET ticks to nanoseconds in base 2 fraction (times 1048576)
259 */
260 hpetCvt = (uint64_t)hpetFemto << 20;
261 hpetCvt = hpetCvt / 1000000ULL;
262
263 /* Calculate conversion from TSC to HPET */
264 tsc2hpet = tmrCvt(tscFCvtt2n, hpetCvtn2t);
265 DBG(" CVT: TSC to HPET = %08X.%08X\n",
266 (uint32_t)(tsc2hpet >> 32), (uint32_t)tsc2hpet);
267
268 /* Calculate conversion from HPET to TSC */
269 hpet2tsc = tmrCvt(hpetCvtt2n, tscFCvtn2t);
270 DBG(" CVT: HPET to TSC = %08X.%08X\n",
271 (uint32_t)(hpet2tsc >> 32), (uint32_t)hpet2tsc);
272
273 /* Calculate conversion from BUS to HPET */
274 bus2hpet = tmrCvt(busFCvtt2n, hpetCvtn2t);
275 DBG(" CVT: BUS to HPET = %08X.%08X\n",
276 (uint32_t)(bus2hpet >> 32), (uint32_t)bus2hpet);
277
278 /* Calculate conversion from HPET to BUS */
279 hpet2bus = tmrCvt(hpetCvtt2n, busFCvtn2t);
280 DBG(" CVT: HPET to BUS = %08X.%08X\n",
281 (uint32_t)(hpet2bus >> 32), (uint32_t)hpet2bus);
282
283 #if MACH_KDB
284 db_display_hpet((hpetReg_t *)hpetArea); /* (BRINGUP) */
285 #endif
286 }
287
288 /*
289 * This routine is used to get various information about the HPET
290 * without having to export gobs of globals. It fills in a data
291 * structure with the info.
292 */
293 void
294 hpet_get_info(hpetInfo_t *info)
295 {
296 info->hpetCvtt2n = hpetCvtt2n;
297 info->hpetCvtn2t = hpetCvtn2t;
298 info->tsc2hpet = tsc2hpet;
299 info->hpet2tsc = hpet2tsc;
300 info->bus2hpet = bus2hpet;
301 info->hpet2bus = hpet2bus;
302 /*
303 * XXX
304 * We're repurposing the rcbaArea so we can use the HPET.
305 * Eventually we'll rename this correctly.
306 */
307 info->rcbaArea = hpetArea;
308 info->rcbaAreap = hpetAreap;
309 }
310
311
312 /*
313 * This routine is called by the HPET driver
314 * when it assigns an HPET timer to a processor.
315 *
316 * XXX with the new callback into the HPET driver,
317 * this routine will be deprecated.
318 */
319 void
320 ml_hpet_cfg(uint32_t cpu, uint32_t hpetVect)
321 {
322 uint64_t *hpetVaddr;
323 hpetTimer_t *hpet;
324 x86_lcpu_t *lcpu;
325 x86_core_t *core;
326 x86_pkg_t *pkg;
327 boolean_t enabled;
328
329 if(cpu > 1) {
330 panic("ml_hpet_cfg: invalid cpu = %d\n", cpu);
331 }
332
333 lcpu = cpu_to_lcpu(cpu);
334 core = lcpu->core;
335 pkg = core->package;
336
337 /*
338 * Only deal with the primary CPU for the package.
339 */
340 if (!lcpu->primary)
341 return;
342
343 enabled = ml_set_interrupts_enabled(FALSE);
344
345 /* Calculate address of the HPET for this processor */
346 hpetVaddr = (uint64_t *)(((uint32_t)&(((hpetReg_t *)hpetArea)->TIM1_CONF)) + (cpu << 5));
347 hpet = (hpetTimer_t *)hpetVaddr;
348
349 DBG("ml_hpet_cfg: HPET for cpu %d at %p, vector = %d\n",
350 cpu, hpetVaddr, hpetVect);
351
352 /* Save the address and vector of the HPET for this processor */
353 core->Hpet = hpet;
354 core->HpetVec = hpetVect;
355
356 /*
357 * Enable interrupts
358 */
359 core->Hpet->Config |= Tn_INT_ENB_CNF;
360
361 /* Save the configuration */
362 core->HpetCfg = core->Hpet->Config;
363 core->HpetCmp = 0;
364
365 /*
366 * We're only doing this for the primary CPU, so go
367 * ahead and add the HPET to the package too.
368 */
369 pkg->Hpet = core->Hpet;
370 pkg->HpetVec = core->HpetVec;
371 pkg->HpetCfg = core->HpetCfg;
372 pkg->HpetCmp = core->HpetCmp;
373 pkg->flags |= X86PKG_FL_HAS_HPET;
374
375 ml_set_interrupts_enabled(enabled);
376 }
377
378 /*
379 * This is the HPET interrupt handler.
380 *
381 * It just hands off to the power management code so that the
382 * appropriate things get done there.
383 */
384 int
385 HPETInterrupt(void)
386 {
387
388 /* All we do here is to bump the count */
389 x86_package()->HpetInt++;
390
391 /*
392 * Let power management do it's thing.
393 */
394 pmHPETInterrupt();
395
396 /* Return and show that the 'rupt has been handled... */
397 return 1;
398 }
399
400
401 static hpetReg_t saved_hpet;
402
403 void
404 hpet_save(void)
405 {
406 hpetReg_t *from = (hpetReg_t *) hpetArea;
407 hpetReg_t *to = &saved_hpet;
408
409 to->GEN_CONF = from->GEN_CONF;
410 to->TIM0_CONF = from->TIM0_CONF;
411 to->TIM0_COMP = from->TIM0_COMP;
412 to->TIM1_CONF = from->TIM1_CONF;
413 to->TIM1_COMP = from->TIM1_COMP;
414 to->TIM2_CONF = from->TIM2_CONF;
415 to->TIM2_COMP = from->TIM2_COMP;
416 to->MAIN_CNT = from->MAIN_CNT;
417 }
418
419 void
420 hpet_restore(void)
421 {
422 hpetReg_t *from = &saved_hpet;
423 hpetReg_t *to = (hpetReg_t *) hpetArea;
424
425 /*
426 * Is the HPET memory already enabled?
427 * If not, set address and enable.
428 */
429 uint32_t *hptcp = (uint32_t *)(rcbaArea + 0x3404);
430 uint32_t hptc = *hptcp;
431 if(!(hptc & hptcAE)) {
432 DBG("HPET memory is not enabled, "
433 "enabling and assigning to 0xFED00000 (hope that's ok)\n");
434 *hptcp = (hptc & ~3) | hptcAE;
435 }
436
437 to->GEN_CONF = from->GEN_CONF & ~1;
438
439 to->TIM0_CONF = from->TIM0_CONF;
440 to->TIM0_COMP = from->TIM0_COMP;
441 to->TIM1_CONF = from->TIM1_CONF;
442 to->TIM1_COMP = from->TIM1_COMP;
443 to->TIM2_CONF = from->TIM2_CONF;
444 to->TIM2_COMP = from->TIM2_COMP;
445 to->GINTR_STA = -1ULL;
446 to->MAIN_CNT = from->MAIN_CNT;
447
448 to->GEN_CONF = from->GEN_CONF;
449 }
450
451 /*
452 * Read the HPET timer
453 *
454 */
455 uint64_t
456 rdHPET(void)
457 {
458 hpetReg_t *hpetp = (hpetReg_t *) hpetArea;
459 volatile uint32_t *regp = (uint32_t *) &hpetp->MAIN_CNT;
460 uint32_t high;
461 uint32_t low;
462
463 do {
464 high = *(regp + 1);
465 low = *regp;
466 } while (high != *(regp + 1));
467
468 return (((uint64_t) high) << 32) | low;
469 }
470
471 #if MACH_KDB
472
473 #define HI32(x) ((uint32_t)(((x) >> 32) & 0xFFFFFFFF))
474 #define LO32(x) ((uint32_t)((x) & 0xFFFFFFFF))
475
476 /*
477 * Displays HPET memory mapped area
478 * hp
479 */
480 void
481 db_hpet(__unused db_expr_t addr, __unused int have_addr, __unused db_expr_t count, __unused char *modif)
482 {
483
484 db_display_hpet((hpetReg_t *) hpetArea); /* Dump out the HPET
485 * stuff */
486 return;
487 }
488
489 void
490 db_display_hpet(hpetReg_t *hpt)
491 {
492 uint64_t cmain;
493
494 cmain = hpt->MAIN_CNT; /* Get the main timer */
495
496 /* General capabilities */
497 db_printf(" GCAP_ID = %08X.%08X\n",
498 HI32(hpt->GCAP_ID), LO32(hpt->GCAP_ID));
499 /* General configuration */
500 db_printf(" GEN_CONF = %08X.%08X\n",
501 HI32(hpt->GEN_CONF), LO32(hpt->GEN_CONF));
502 /* General Interrupt status */
503 db_printf("GINTR_STA = %08X.%08X\n",
504 HI32(hpt->GINTR_STA), LO32(hpt->GINTR_STA));
505 /* Main counter */
506 db_printf(" MAIN_CNT = %08X.%08X\n",
507 HI32(cmain), LO32(cmain));
508 /* Timer 0 config and cap */
509 db_printf("TIM0_CONF = %08X.%08X\n",
510 HI32(hpt->TIM0_CONF), LO32(hpt->TIM0_CONF));
511 /* Timer 0 comparator */
512 db_printf("TIM0_COMP = %08X.%08X\n",
513 HI32(hpt->TIM0_COMP), LO32(hpt->TIM0_COMP));
514 /* Timer 1 config and cap */
515 db_printf("TIM0_CONF = %08X.%08X\n",
516 HI32(hpt->TIM1_CONF), LO32(hpt->TIM1_CONF));
517 /* Timer 1 comparator */
518 db_printf("TIM1_COMP = %08X.%08X\n",
519 HI32(hpt->TIM1_COMP), LO32(hpt->TIM1_COMP));
520 /* Timer 2 config and cap */
521 db_printf("TIM2_CONF = %08X.%08X\n",
522 HI32(hpt->TIM2_CONF), LO32(hpt->TIM2_CONF));
523 /* Timer 2 comparator */
524 db_printf("TIM2_COMP = %08X.%08X\n",
525 HI32(hpt->TIM2_COMP), LO32(hpt->TIM2_COMP));
526
527 db_printf("\nHPET Frequency = %d.%05dMHz\n",
528 (uint32_t) (hpetFreq / 1000000), (uint32_t) (hpetFreq % 1000000));
529 }
530 #endif