pexpert/ppc/pe_clock_speed_asm.s

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26  *  clock_speed_asm.s - Uses the Via timer, decrementer, and counter
  27  *                      to determine the clock and bus rates.
  28  *
  29  *  (c) Apple Computer, Inc. 1998-9
  30  *
  31  *  Writen by:   Josh de Cesare
  32  *
  33  */
  34
  35 #include <ppc/asm.h>
  36
  37 // constants for the via
  38 #define CountLow  0x800
  39 #define CountHigh 0xa00
  40 #define LatchLow  0xc00
  41 #define LatchHigh 0xe00
  42
  43
  44 // void pe_run_clock_test(clock_test_data *data)
  45 //
  46 // data points to the base address of the via and two longs
  47 // for storing the via and dec results.
  48 //
  49 // The basic idea is this...
  50 // Use the counter register to execute a loop that will take
  51 // 10,000,000 processor clocks.  Time it using both the via counter
  52 // and the time base.  Return the number of ticks for both so the
  53 // raw values for processor and bus speed can be calculated.
  54 ENTRY(pe_run_clock_test, TAG_NO_FRAME_USED)
  55
  56         li      r4,     1               ; flag for cache load
  57         li      r5,     1               ; Only once through this time
  58         lwz     r9,     0(r3)           ; r9 is the via addr
  59
  60 L_again:
  61         mtctr   r5                      ; set the count
  62         li      r5,     0xff            ; Start the counter at 0xffff
  63         stb     r5,     CountLow(r9)    ; clear the via counter
  64         eieio
  65         stb     r5,     CountHigh(r9)
  66         eieio
  67         mftb    r10                     ; save starting value of the time base
  68         isync
  69
  70 L_loop:
  71         addi    r5,     r5,     1       ; 8 adds for 8 cycles
  72         addi    r5,     r5,     2       ; the bdnz should be 0 cycles
  73         addi    r5,     r5,     3
  74         addi    r5,     r5,     4
  75         addi    r5,     r5,     5
  76         addi    r5,     r5,     6
  77         addi    r5,     r5,     7
  78         addi    r5,     r5,     8
  79         bdnz    L_loop
  80
  81         sync
  82         mftb    r5                      ; save the raw time base value
  83         lbz     r6,     CountHigh(r9)   ; get the via counter values
  84         eieio
  85         lbz     r7,     CountLow(r9)
  86         eieio
  87         lbz     r8,     CountHigh(r9)
  88         eieio
  89
  90         cmpi    cr0,    r4,     1       ; see if the was the cache run
  91         bne     L_finish_up             ; nope, we are done.
  92
  93         li      r4,     0               ; set flag for the real test
  94         li      r5,     0x12d0          ; set the initial count to 1.25e+6
  95         oris    r5,     r5,     0x13
  96         b       L_again
  97
  98 L_finish_up:
  99         cmpi    cr0,    r7,     0       ; if L1 is zero then H1 is good.
 100         beq     L_use_H1                ; else H2 will be good.
 101
 102         mr      r6,     r8              ; use H2 instead.
 103
 104 L_use_H1:
 105         rlwimi  r7,     r6,     8, 16, 23
 106         not     r6,     r7              ; neg - 1 is not
 107         andi.   r6,     r6,     0xffff
 108         stw     r6,     4(r3)           ; save via ticks
 109
 110         sub     r5,     r5,     r10     ; r5 is the number of time base ticks
 111         stw     r5,     8(r3)           ; save time base ticks
 112
 113         blr