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30 * Interfaces for non-kernel managed devices to inform the kernel of their
31 * energy and performance relevant activity and resource utilisation, typically
32 * on a per-thread or task basis.
35 #ifndef _KERN_ENERGY_PERF_H_
36 #define _KERN_ENERGY_PERF_H_
45 uint32_t gpu_max_domains
;
48 typedef gpu_descriptor
*gpu_descriptor_t
;
49 /* The GPU is expected to describe itself with this interface prior to reporting
52 void gpu_describe(gpu_descriptor_t
);
54 #define GPU_SCOPE_CURRENT_THREAD (0x1)
55 #define GPU_SCOPE_MISC (0x2)
57 /* GPU utilisation update for the current thread. */
58 uint64_t gpu_accumulate_time(uint32_t scope
, uint32_t gpu_id
, uint32_t gpu_domain
, uint64_t gpu_accumulated_ns
, uint64_t gpu_tstamp_ns
);
60 /* Interfaces for the block storage driver to advise the perf. controller of
64 /* Target medium for this set of IOs. Updates can occur in parallel if
65 * multiple devices exist, hence consumers must synchronize internally, ideally
66 * in a low-overhead fashion such as per-CPU counters, as this may be invoked
70 #define IO_MEDIUM_ROTATING (0x0ULL)
71 #define IO_MEDIUM_SOLID_STATE (0x1ULL)
73 /* As there are several priority bands whose nature is evolving, we rely on the
74 * block storage driver to classify non-performance-critical IOs as "low"
75 * priority. Separate updates are expected for low/high priority IOs.
78 #define IO_PRIORITY_LOW (0x1ULL << 8)
80 /* Reserved for estimates of bursts of future IOs; could possibly benefit from
81 * a time horizon, but it's unclear if it will be specifiable by any layer with
84 #define IO_PRIORITY_PREDICTIVE (0x1ULL << 16)
86 uint64_t io_rate_update(
87 uint64_t io_rate_flags
, /* Rotating/NAND, IO priority level */
88 uint64_t read_ops_delta
,
89 uint64_t write_ops_delta
,
90 uint64_t read_bytes_delta
,
91 uint64_t write_bytes_delta
);
93 typedef uint64_t (*io_rate_update_callback_t
) (uint64_t, uint64_t, uint64_t, uint64_t, uint64_t);
95 void io_rate_update_register(io_rate_update_callback_t
);
97 /* Interfaces for integrated GPUs to supply command submission telemetry.
100 #define GPU_NCMDS_VALID (0x1)
101 #define GPU_NOUTSTANDING_VALID (0x2)
102 #define GPU_BUSY_VALID (0x4)
103 #define GPU_CYCLE_COUNT_VALID (0x8)
104 #define GPU_MISC_VALID (0x10)
106 void gpu_submission_telemetry(
107 uint64_t gpu_ncmds_total
,
108 uint64_t gpu_noutstanding
,
109 uint64_t gpu_busy_ns_total
,
111 uint64_t gpu_telemetry_valid_flags
,
112 uint64_t gpu_telemetry_misc
);
114 typedef uint64_t (*gpu_set_fceiling_t
) (uint32_t gpu_fceiling_ratio
, uint64_t gpu_fceiling_param
);
116 void gpu_fceiling_cb_register(gpu_set_fceiling_t
);
121 #endif /* _KERN_ENERGY_PERF_H_ */