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1 /*
2 * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25
26 /* Miscellaneous constants and structures used by the exception
27 * handlers
28 */
29
30 #ifndef _PPC_EXCEPTION_H_
31 #define _PPC_EXCEPTION_H_
32
33 #include <ppc/savearea.h>
34
35 #ifndef ASSEMBLER
36
37 #include <mach_kdb.h>
38 #include <mach_kdp.h>
39
40 #include <mach/machine/vm_types.h>
41 #include <mach/boolean.h>
42 #include <kern/ast.h>
43 #include <kern/cpu_data.h>
44 #include <pexpert/pexpert.h>
45 #include <IOKit/IOInterrupts.h>
46 #include <ppc/machine_routines.h>
47 #include <ppc/pms.h>
48 #include <ppc/rtclock.h>
49
50 /* Per processor CPU features */
51 #pragma pack(4) /* Make sure the structure stays as we defined it */
52 struct procFeatures {
53 unsigned int Available; /* 0x000 */
54 #define pfFloat 0x80000000
55 #define pfFloatb 0
56 #define pfAltivec 0x40000000
57 #define pfAltivecb 1
58 #define pfAvJava 0x20000000
59 #define pfAvJavab 2
60 #define pfSMPcap 0x10000000
61 #define pfSMPcapb 3
62 #define pfCanSleep 0x08000000
63 #define pfCanSleepb 4
64 #define pfCanNap 0x04000000
65 #define pfCanNapb 5
66 #define pfCanDoze 0x02000000
67 #define pfCanDozeb 6
68 #define pfSlowNap 0x00400000
69 #define pfSlowNapb 9
70 #define pfNoMuMMCK 0x00200000
71 #define pfNoMuMMCKb 10
72 #define pfNoL2PFNap 0x00100000
73 #define pfNoL2PFNapb 11
74 #define pfSCOMFixUp 0x00080000
75 #define pfSCOMFixUpb 12
76 #define pfHasDcba 0x00040000
77 #define pfHasDcbab 13
78 #define pfL1fa 0x00010000
79 #define pfL1fab 15
80 #define pfL2 0x00008000
81 #define pfL2b 16
82 #define pfL2fa 0x00004000
83 #define pfL2fab 17
84 #define pfL2i 0x00002000
85 #define pfL2ib 18
86 #define pfLClck 0x00001000
87 #define pfLClckb 19
88 #define pfWillNap 0x00000800
89 #define pfWillNapb 20
90 #define pfNoMSRir 0x00000400
91 #define pfNoMSRirb 21
92 #define pfL3pdet 0x00000200
93 #define pfL3pdetb 22
94 #define pf128Byte 0x00000080
95 #define pf128Byteb 24
96 #define pf32Byte 0x00000020
97 #define pf32Byteb 26
98 #define pf64Bit 0x00000010
99 #define pf64Bitb 27
100 #define pfL3 0x00000004
101 #define pfL3b 29
102 #define pfL3fa 0x00000002
103 #define pfL3fab 30
104 #define pfValid 0x00000001
105 #define pfValidb 31
106 unsigned short rptdProc; /* 0x004 */
107 unsigned short lineSize; /* 0x006 */
108 unsigned int l1iSize; /* 0x008 */
109 unsigned int l1dSize; /* 0x00C */
110 unsigned int l2cr; /* 0x010 */
111 unsigned int l2Size; /* 0x014 */
112 unsigned int l3cr; /* 0x018 */
113 unsigned int l3Size; /* 0x01C */
114 unsigned int pfMSSCR0; /* 0x020 */
115 unsigned int pfMSSCR1; /* 0x024 */
116 unsigned int pfICTRL; /* 0x028 */
117 unsigned int pfLDSTCR; /* 0x02C */
118 unsigned int pfLDSTDB; /* 0x030 */
119 unsigned int pfMaxVAddr; /* 0x034 */
120 unsigned int pfMaxPAddr; /* 0x038 */
121 unsigned int pfPTEG; /* 0x03C */
122 uint64_t pfHID0; /* 0x040 */
123 uint64_t pfHID1; /* 0x048 */
124 uint64_t pfHID2; /* 0x050 */
125 uint64_t pfHID3; /* 0x058 */
126 uint64_t pfHID4; /* 0x060 */
127 uint64_t pfHID5; /* 0x068 */
128 unsigned int l2crOriginal; /* 0x070 */
129 unsigned int l3crOriginal; /* 0x074 */
130 unsigned int pfBootConfig; /* 0x078 */
131 unsigned int pfPowerModes; /* 0x07C */
132 #define pmDPLLVmin 0x00010000
133 #define pmDPLLVminb 15
134 #define pmType 0x000000FF
135 #define pmPowerTune 0x00000003
136 #define pmDFS 0x00000002
137 #define pmDualPLL 0x00000001
138 unsigned int pfPowerTune0; /* 0x080 */
139 unsigned int pfPowerTune1; /* 0x084 */
140 unsigned int rsrvd88[6]; /* 0x088 */
141 };
142 #pragma pack()
143
144 typedef struct procFeatures procFeatures;
145
146
147 /*
148 *
149 * Various performance counters
150 */
151 #pragma pack(4) /* Make sure the structure stays as we defined it */
152 struct hwCtrs {
153
154 unsigned int hwInVains; /* In vain */
155 unsigned int hwResets; /* Reset */
156 unsigned int hwMachineChecks; /* Machine check */
157 unsigned int hwDSIs; /* DSIs */
158 unsigned int hwISIs; /* ISIs */
159 unsigned int hwExternals; /* Externals */
160 unsigned int hwAlignments; /* Alignment */
161 unsigned int hwPrograms; /* Program */
162 unsigned int hwFloatPointUnavailable; /* Floating point */
163 unsigned int hwDecrementers; /* Decrementer */
164 unsigned int hwIOErrors; /* I/O error */
165 unsigned int hwrsvd0; /* Reserved */
166 unsigned int hwSystemCalls; /* System call */
167 unsigned int hwTraces; /* Trace */
168 unsigned int hwFloatingPointAssists; /* Floating point assist */
169 unsigned int hwPerformanceMonitors; /* Performance monitor */
170 unsigned int hwAltivecs; /* VMX */
171 unsigned int hwrsvd1; /* Reserved */
172 unsigned int hwrsvd2; /* Reserved */
173 unsigned int hwrsvd3; /* Reserved */
174 unsigned int hwInstBreakpoints; /* Instruction breakpoint */
175 unsigned int hwSystemManagements; /* System management */
176 unsigned int hwAltivecAssists; /* Altivec Assist */
177 unsigned int hwThermal; /* Thermals */
178 unsigned int hwrsvd5; /* Reserved */
179 unsigned int hwrsvd6; /* Reserved */
180 unsigned int hwrsvd7; /* Reserved */
181 unsigned int hwrsvd8; /* Reserved */
182 unsigned int hwrsvd9; /* Reserved */
183 unsigned int hwrsvd10; /* Reserved */
184 unsigned int hwrsvd11; /* Reserved */
185 unsigned int hwrsvd12; /* Reserved */
186 unsigned int hwrsvd13; /* Reserved */
187 unsigned int hwTrace601; /* Trace */
188 unsigned int hwSIGPs; /* SIGP */
189 unsigned int hwPreemptions; /* Preemption */
190 unsigned int hwContextSwitchs; /* Context switch */
191 unsigned int hwShutdowns; /* Shutdowns */
192 unsigned int hwChokes; /* System ABENDs */
193 unsigned int hwDataSegments; /* Data Segment Interruptions */
194 unsigned int hwInstructionSegments; /* Instruction Segment Interruptions */
195 unsigned int hwSoftPatches; /* Soft Patch interruptions */
196 unsigned int hwMaintenances; /* Maintenance interruptions */
197 unsigned int hwInstrumentations; /* Instrumentation interruptions */
198 unsigned int hwrsvd14; /* Reserved */
199 unsigned int hwhdec; /* 0B4 Hypervisor decrementer */
200
201 unsigned int hwspare0[11]; /* 0B8 Reserved */
202 unsigned int hwspare0a; /* 0E4 Reserved */
203 unsigned int hwspare0b; /* 0E8 Reserved */
204 unsigned int hwspare0c; /* 0EC Reserved */
205 unsigned int hwspare0d; /* 0F0 Reserved */
206 unsigned int hwIgnored; /* 0F4 Interruptions ignored */
207 unsigned int hwRedrives; /* 0F8 Number of redriven interrupts */
208 unsigned int hwSteals; /* 0FC Steals */
209 /* 100 */
210
211 unsigned int hwMckHang; /* ? */
212 unsigned int hwMckSLBPE; /* ? */
213 unsigned int hwMckTLBPE; /* ? */
214 unsigned int hwMckERCPE; /* ? */
215 unsigned int hwMckL1DPE; /* ? */
216 unsigned int hwMckL1TPE; /* ? */
217 unsigned int hwMckUE; /* ? */
218 unsigned int hwMckIUE; /* ? */
219 unsigned int hwMckIUEr; /* ? */
220 unsigned int hwMckDUE; /* ? */
221 unsigned int hwMckDTW; /* ? */
222 unsigned int hwMckUnk; /* ? */
223 unsigned int hwMckExt; /* ? */
224 unsigned int hwMckICachePE; /* ? */
225 unsigned int hwMckITagPE; /* ? */
226 unsigned int hwMckIEratPE; /* ? */
227 unsigned int hwMckDEratPE; /* ? */
228 unsigned int hwspare2[15]; /* Pad to next 128 bndry */
229 /* 0x180 */
230
231 unsigned int napStamp[2]; /* Time base when we napped */
232 unsigned int napTotal[2]; /* Total nap time in ticks */
233 unsigned int numSIGPast; /* Number of SIGP asts recieved */
234 unsigned int numSIGPcpureq; /* Number of SIGP cpu requests recieved */
235 unsigned int numSIGPdebug; /* Number of SIGP debugs recieved */
236 unsigned int numSIGPwake; /* Number of SIGP wakes recieved */
237 unsigned int numSIGPtimo; /* Number of SIGP send timeouts */
238 unsigned int numSIGPmast; /* Number of SIGPast messages merged */
239 unsigned int numSIGPmwake; /* Number of SIGPwake messages merged */
240
241 unsigned int hwWalkPhys; /* Number of entries to hw_walk_phys */
242 unsigned int hwWalkFull; /* Full purge of connected PTE's */
243 unsigned int hwWalkMerge; /* RC merge of connected PTE's */
244 unsigned int hwWalkQuick; /* Quick scan of connected PTE's */
245 unsigned int numSIGPcall; /* Number of SIGPcall messages received */
246
247 unsigned int hwspare3[16]; /* Pad to 512 */
248
249 };
250 #pragma pack()
251
252 typedef struct hwCtrs hwCtrs;
253
254 struct patch_entry {
255 unsigned int *addr;
256 unsigned int data;
257 unsigned int type;
258 unsigned int value;
259 };
260
261 typedef struct patch_entry patch_entry_t;
262
263 #define PATCH_INVALID 0
264 #define PATCH_PROCESSOR 1
265 #define PATCH_FEATURE 2
266 #define PATCH_END_OF_TABLE 3
267
268 #define PatchExt32 0x80000000
269 #define PatchExt32b 0
270 #define PatchLwsync 0x40000000
271 #define PatchLwsyncb 1
272
273 /* When an exception is taken, this info is accessed via sprg0 */
274 /* We should always have this one on a cache line boundary */
275
276 #pragma pack(4) /* Make sure the structure stays as we defined it */
277 struct per_proc_info {
278 unsigned short cpu_number;
279 unsigned short cpu_flags; /* Various low-level flags */
280 vm_offset_t istackptr;
281 vm_offset_t intstack_top_ss;
282
283 vm_offset_t debstackptr;
284 vm_offset_t debstack_top_ss;
285
286 unsigned int spcFlags; /* Special thread flags */
287 unsigned int old_thread;
288 ast_t pending_ast; /* mask of pending ast(s) */
289
290 /* PPC cache line boundary here - 020 */
291
292 int cpu_type;
293 int cpu_subtype;
294 int cpu_threadtype;
295 /*
296 * Note: the following two pairs of words need to stay in order and each pair must
297 * be in the same reservation (line) granule
298 */
299 struct facility_context *FPU_owner; /* Owner of the FPU on this cpu */
300 unsigned int liveVRSave; /* VRSave assiciated with live vector registers */
301 struct facility_context *VMX_owner; /* Owner of the VMX on this cpu */
302 unsigned int spcTRc; /* Special trace count */
303 unsigned int spcTRp; /* Special trace buffer pointer */
304
305 /* PPC cache line boundary here - 040 */
306 addr64_t quickfret; /* List of saveareas to release */
307 addr64_t lclfree; /* Pointer to local savearea list */
308 unsigned int lclfreecnt; /* Entries in local savearea list */
309 unsigned int holdQFret; /* Hold off releasing quickfret list */
310 uint64_t rtcPop; /* Real Time Clock pop */
311
312 /* PPC cache line boundary here - 060 */
313 boolean_t interrupts_enabled;
314 IOInterruptHandler interrupt_handler;
315 void * interrupt_nub;
316 unsigned int interrupt_source;
317 void * interrupt_target;
318 void * interrupt_refCon;
319 uint64_t next_savearea; /* pointer to the next savearea */
320
321 /* PPC cache line boundary here - 080 */
322 unsigned int MPsigpStat; /* Signal Processor status (interlocked update for this one) */
323 #define MPsigpMsgp 0xC0000000 /* Message pending (busy + pass ) */
324 #define MPsigpBusy 0x80000000 /* Processor area busy, i.e., locked */
325 #define MPsigpPass 0x40000000 /* Busy lock passed to receiving processor */
326 #define MPsigpAck 0x20000000 /* Ack Busy lock passed to receiving processor */
327 #define MPsigpSrc 0x000000FF /* Processor that owns busy, i.e., the ID of */
328 /* whomever set busy. When a busy is passed, */
329 /* this is the requestor of the function. */
330 #define MPsigpFunc 0x0000FF00 /* Current function */
331 #define MPsigpIdle 0x00 /* No function pending */
332 #define MPsigpSigp 0x04 /* Signal a processor */
333 unsigned int MPsigpParm0; /* SIGP parm 0 */
334 unsigned int MPsigpParm1; /* SIGP parm 1 */
335 unsigned int MPsigpParm2; /* SIGP parm 2 */
336 cpu_id_t cpu_id;
337 vm_offset_t start_paddr;
338 unsigned int ruptStamp[2]; /* Timebase at last interruption */
339
340 /* PPC cache line boundary here - 0A0 */
341 procFeatures pf; /* Processor features */
342
343 /* PPC cache line boundary here - 140 */
344 void * pp_cbfr;
345 void * pp_chud;
346 uint64_t rtclock_tick_deadline;
347 rtclock_timer_t rtclock_timer;
348 unsigned int ppbbTaskEnv; /* BlueBox Task Environment */
349
350 /* PPC cache line boundary here - 160 */
351 struct savearea * db_saved_state;
352 time_base_enable_t time_base_enable;
353 int ppXFlags;
354 int running;
355 int debugger_is_slave;
356 int debugger_active;
357 int debugger_pending;
358 int debugger_holdoff;
359
360 /* PPC cache line boundary here - 180 */
361 uint64_t Uassist; /* User Assist DoubleWord */
362 uint64_t validSegs; /* Valid SR/STB slots */
363 addr64_t ppUserPmap; /* Current user state pmap (physical address) */
364 unsigned int ppUserPmapVirt; /* Current user state pmap (virtual address) */
365 unsigned int ppMapFlags; /* Mapping flags */
366
367 /* PPC cache line boundary here - 1A0 */
368 unsigned short ppInvSeg; /* Forces complete invalidate of SRs/SLB (this must stay with ppInvSeg) */
369 unsigned short ppCurSeg; /* Set to 1 if user segments, 0 if kernel (this must stay with ppInvSeg) */
370 unsigned int ppSegSteal; /* Count of segment slot steals */
371 ppnum_t VMMareaPhys; /* vmm state page physical addr */
372 unsigned int VMMXAFlgs; /* vmm extended flags */
373 unsigned int FAMintercept; /* vmm FAM Exceptions to intercept */
374 unsigned int hibernate; /* wake from hibernate */
375 uint32_t save_tbl;
376 uint32_t save_tbu;
377
378 /* PPC cache line boundary here - 1C0 */
379 unsigned int ppUMWmp[16]; /* Linkage mapping for user memory window - 64 bytes */
380
381 /* PPC cache line boundary here - 200 */
382 uint64_t tempr0; /* temporary savearea */
383 uint64_t tempr1;
384 uint64_t tempr2;
385 uint64_t tempr3;
386
387 uint64_t tempr4;
388 uint64_t tempr5;
389 uint64_t tempr6;
390 uint64_t tempr7;
391
392 uint64_t tempr8;
393 uint64_t tempr9;
394 uint64_t tempr10;
395 uint64_t tempr11;
396
397 uint64_t tempr12;
398 uint64_t tempr13;
399 uint64_t tempr14;
400 uint64_t tempr15;
401
402 uint64_t tempr16;
403 uint64_t tempr17;
404 uint64_t tempr18;
405 uint64_t tempr19;
406
407 uint64_t tempr20;
408 uint64_t tempr21;
409 uint64_t tempr22;
410 uint64_t tempr23;
411
412 uint64_t tempr24;
413 uint64_t tempr25;
414 uint64_t tempr26;
415 uint64_t tempr27;
416
417 uint64_t tempr28;
418 uint64_t tempr29;
419 uint64_t tempr30;
420 uint64_t tempr31;
421
422
423 /* PPC cache line boundary here - 300 */
424 double emfp0; /* Copies of floating point registers */
425 double emfp1; /* Used for emulation purposes */
426 double emfp2;
427 double emfp3;
428
429 double emfp4;
430 double emfp5;
431 double emfp6;
432 double emfp7;
433
434 double emfp8;
435 double emfp9;
436 double emfp10;
437 double emfp11;
438
439 double emfp12;
440 double emfp13;
441 double emfp14;
442 double emfp15;
443
444 double emfp16;
445 double emfp17;
446 double emfp18;
447 double emfp19;
448
449 double emfp20;
450 double emfp21;
451 double emfp22;
452 double emfp23;
453
454 double emfp24;
455 double emfp25;
456 double emfp26;
457 double emfp27;
458
459 double emfp28;
460 double emfp29;
461 double emfp30;
462 double emfp31;
463
464 /* - 400 */
465 unsigned int emfpscr_pad;
466 unsigned int emfpscr;
467 unsigned int empadfp[6];
468
469 /* - 420 */
470 unsigned int emvr0[4]; /* Copies of vector registers used both */
471 unsigned int emvr1[4]; /* for full vector emulation or */
472 unsigned int emvr2[4]; /* as saveareas while assisting denorms */
473 unsigned int emvr3[4];
474 unsigned int emvr4[4];
475 unsigned int emvr5[4];
476 unsigned int emvr6[4];
477 unsigned int emvr7[4];
478 unsigned int emvr8[4];
479 unsigned int emvr9[4];
480 unsigned int emvr10[4];
481 unsigned int emvr11[4];
482 unsigned int emvr12[4];
483 unsigned int emvr13[4];
484 unsigned int emvr14[4];
485 unsigned int emvr15[4];
486 unsigned int emvr16[4];
487 unsigned int emvr17[4];
488 unsigned int emvr18[4];
489 unsigned int emvr19[4];
490 unsigned int emvr20[4];
491 unsigned int emvr21[4];
492 unsigned int emvr22[4];
493 unsigned int emvr23[4];
494 unsigned int emvr24[4];
495 unsigned int emvr25[4];
496 unsigned int emvr26[4];
497 unsigned int emvr27[4];
498 unsigned int emvr28[4];
499 unsigned int emvr29[4];
500 unsigned int emvr30[4];
501 unsigned int emvr31[4];
502 unsigned int emvscr[4];
503 unsigned int empadvr[4];
504 /* - 640 */
505 /* note implicit dependence on kSkipListMaxLists, which must be <= 28 */
506 addr64_t skipListPrev[28]; /* prev ptrs saved as side effect of calling mapSearchFull() */
507
508 /* - 720 */
509
510 unsigned int patcharea[56];
511 /* - 800 */
512
513 hwCtrs hwCtr; /* Hardware exception counters */
514 /* - A00 */
515 addr64_t pp2ndPage; /* Physical address of the second page of the per_proc */
516 uint32_t pprsvd0A08[6];
517 /* - A20 */
518 pmsd pms; /* Power Management Stepper control */
519 unsigned int pprsvd0A40[368]; /* Reserved out to next page boundary */
520 /* - 1000 */
521
522 /*
523 * This is the start of the second page of the per_proc block. Because we do not
524 * allocate physically contiguous memory, it may be physically discontiguous from the
525 * first page. Currently there isn't anything here that is accessed translation off,
526 * but if we need it, pp2ndPage contains the physical address.
527 *
528 * Note that the boot processor's per_proc is statically allocated, so it will be a
529 * V=R contiguous area. That allows access during early boot before we turn translation on
530 * for the first time.
531 */
532
533 unsigned int processor[384]; /* processor structure */
534
535 unsigned int pprsvd1[640]; /* Reserved out to next page boundary */
536 /* - 2000 */
537
538 };
539
540 #pragma pack()
541
542
543 /*
544 * Macro to convert a processor_t processor to its attached per_proc_info_t per_proc
545 */
546 #define PROCESSOR_TO_PER_PROC(x) \
547 ((struct per_proc_info*)((unsigned int)(x) \
548 - (unsigned int)(((struct per_proc_info *)0)->processor)))
549
550 extern struct per_proc_info BootProcInfo;
551
552 #define MAX_CPUS 256
553
554 struct per_proc_entry {
555 addr64_t ppe_paddr; /* Physical address of the first page of per_proc, 2nd is in pp2ndPage. */
556 unsigned int ppe_pad4[1];
557 struct per_proc_info *ppe_vaddr; /* Virtual address of the per_proc */
558 };
559
560 extern struct per_proc_entry PerProcTable[MAX_CPUS-1];
561
562
563 extern char *trap_type[];
564
565 #endif /* ndef ASSEMBLER */ /* with this savearea should be redriven */
566
567 /* cpu_flags defs */
568 #define SIGPactive 0x8000
569 #define needSRload 0x4000
570 #define turnEEon 0x2000
571 #define traceBE 0x1000 /* user mode BE tracing in enabled */
572 #define traceBEb 3 /* bit number for traceBE */
573 #define SleepState 0x0800
574 #define SleepStateb 4
575 #define mcountOff 0x0400
576 #define SignalReady 0x0200
577 #define BootDone 0x0100
578 #define loadMSR 0x7FF4
579
580 /* ppXFlags defs */
581 #define SignalReadyWait 0x00000001
582
583 #define T_VECTOR_SIZE 4 /* function pointer size */
584
585 /* Hardware exceptions */
586
587 #define T_IN_VAIN (0x00 * T_VECTOR_SIZE)
588 #define T_RESET (0x01 * T_VECTOR_SIZE)
589 #define T_MACHINE_CHECK (0x02 * T_VECTOR_SIZE)
590 #define T_DATA_ACCESS (0x03 * T_VECTOR_SIZE)
591 #define T_INSTRUCTION_ACCESS (0x04 * T_VECTOR_SIZE)
592 #define T_INTERRUPT (0x05 * T_VECTOR_SIZE)
593 #define T_ALIGNMENT (0x06 * T_VECTOR_SIZE)
594 #define T_PROGRAM (0x07 * T_VECTOR_SIZE)
595 #define T_FP_UNAVAILABLE (0x08 * T_VECTOR_SIZE)
596 #define T_DECREMENTER (0x09 * T_VECTOR_SIZE)
597 #define T_IO_ERROR (0x0a * T_VECTOR_SIZE)
598 #define T_RESERVED (0x0b * T_VECTOR_SIZE)
599 #define T_SYSTEM_CALL (0x0c * T_VECTOR_SIZE)
600 #define T_TRACE (0x0d * T_VECTOR_SIZE)
601 #define T_FP_ASSIST (0x0e * T_VECTOR_SIZE)
602 #define T_PERF_MON (0x0f * T_VECTOR_SIZE)
603 #define T_VMX (0x10 * T_VECTOR_SIZE)
604 #define T_INVALID_EXCP0 (0x11 * T_VECTOR_SIZE)
605 #define T_INVALID_EXCP1 (0x12 * T_VECTOR_SIZE)
606 #define T_INVALID_EXCP2 (0x13 * T_VECTOR_SIZE)
607 #define T_INSTRUCTION_BKPT (0x14 * T_VECTOR_SIZE)
608 #define T_SYSTEM_MANAGEMENT (0x15 * T_VECTOR_SIZE)
609 #define T_ALTIVEC_ASSIST (0x16 * T_VECTOR_SIZE)
610 #define T_THERMAL (0x17 * T_VECTOR_SIZE)
611 #define T_INVALID_EXCP5 (0x18 * T_VECTOR_SIZE)
612 #define T_INVALID_EXCP6 (0x19 * T_VECTOR_SIZE)
613 #define T_INVALID_EXCP7 (0x1A * T_VECTOR_SIZE)
614 #define T_INVALID_EXCP8 (0x1B * T_VECTOR_SIZE)
615 #define T_INVALID_EXCP9 (0x1C * T_VECTOR_SIZE)
616 #define T_INVALID_EXCP10 (0x1D * T_VECTOR_SIZE)
617 #define T_INVALID_EXCP11 (0x1E * T_VECTOR_SIZE)
618 #define T_INVALID_EXCP12 (0x1F * T_VECTOR_SIZE)
619 #define T_EMULATE (0x20 * T_VECTOR_SIZE)
620
621 #define T_RUNMODE_TRACE (0x21 * T_VECTOR_SIZE) /* 601 only */
622
623 #define T_SIGP (0x22 * T_VECTOR_SIZE)
624 #define T_PREEMPT (0x23 * T_VECTOR_SIZE)
625 #define T_CSWITCH (0x24 * T_VECTOR_SIZE)
626 #define T_SHUTDOWN (0x25 * T_VECTOR_SIZE)
627 #define T_CHOKE (0x26 * T_VECTOR_SIZE)
628
629 #define T_DATA_SEGMENT (0x27 * T_VECTOR_SIZE)
630 #define T_INSTRUCTION_SEGMENT (0x28 * T_VECTOR_SIZE)
631
632 #define T_SOFT_PATCH (0x29 * T_VECTOR_SIZE)
633 #define T_MAINTENANCE (0x2A * T_VECTOR_SIZE)
634 #define T_INSTRUMENTATION (0x2B * T_VECTOR_SIZE)
635 #define T_ARCHDEP0 (0x2C * T_VECTOR_SIZE)
636 #define T_HDEC (0x2D * T_VECTOR_SIZE)
637
638 #define T_AST (0x100 * T_VECTOR_SIZE)
639 #define T_MAX T_CHOKE /* Maximum exception no */
640
641 #define T_FAM 0x00004000
642
643 #define EXCEPTION_VECTOR(exception) (exception * 0x100 / T_VECTOR_SIZE )
644
645 /*
646 * System choke (failure) codes
647 */
648
649 #define failDebug 0
650 #define failStack 1
651 #define failMapping 2
652 #define failContext 3
653 #define failNoSavearea 4
654 #define failSaveareaCorr 5
655 #define failBadLiveContext 6
656 #define failSkipLists 7
657 #define failUnalignedStk 8
658 #define failPmap 9
659 #define failTimeout 10
660
661 /* Always must be last - update failNames table in model_dep.c as well */
662 #define failUnknown 11
663
664 #ifndef ASSEMBLER
665
666 #pragma pack(4) /* Make sure the structure stays as we defined it */
667 typedef struct resethandler {
668 unsigned int type;
669 vm_offset_t call_paddr;
670 vm_offset_t arg__paddr;
671 } resethandler_t;
672 #pragma pack()
673
674 extern resethandler_t ResetHandler;
675
676 #endif
677
678 #define RESET_HANDLER_NULL 0x0
679 #define RESET_HANDLER_START 0x1
680 #define RESET_HANDLER_BUPOR 0x2
681 #define RESET_HANDLER_IGNORE 0x3
682
683 #endif /* _PPC_EXCEPTION_H_ */
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