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29 #define _ARM_PMAP_H_ 1
31 #include <mach_assert.h>
33 #include <arm/proc_reg.h>
34 #if defined(__arm64__)
35 #include <arm64/proc_reg.h>
39 * Machine-dependent structures for the physical map module.
44 #include <stdatomic.h>
46 #include <libkern/section_keywords.h>
47 #include <mach/kern_return.h>
48 #include <mach/machine/vm_types.h>
49 #include <arm/pmap_public.h>
50 #include <mach/arm/thread_status.h>
51 #if defined(__arm64__)
52 #include <arm64/tlb.h>
58 #define ASID_SHIFT (11) /* Shift for 2048 max virtual ASIDs (2048 pmaps) */
59 #define MAX_ASIDS (1 << ASID_SHIFT) /* Max supported ASIDs (can be virtual) */
60 #ifndef ARM_ASID_SHIFT
61 #define ARM_ASID_SHIFT (8) /* Shift for the maximum ARM ASID value (256) */
63 #define ARM_MAX_ASIDS (1 << ARM_ASID_SHIFT) /* Max ASIDs supported by the hardware */
66 #if __ARM_KERNEL_PROTECT__
67 #define MAX_HW_ASIDS ((ARM_MAX_ASIDS >> 1) - 1)
69 #define MAX_HW_ASIDS (ARM_MAX_ASIDS - 1)
72 #ifndef ARM_VMID_SHIFT
73 #define ARM_VMID_SHIFT (8)
75 #define ARM_MAX_VMIDS (1 << ARM_VMID_SHIFT)
77 /* XPRR virtual register map */
79 #define CPUWINDOWS_MAX 4
81 #if defined(__arm64__)
83 #if defined(ARM_LARGE_MEMORY)
85 * 2 L1 tables (Linear KVA and V=P), plus 2*16 L2 tables map up to (16*64GB) 1TB of DRAM
86 * Upper limit on how many pages can be consumed by bootstrap page tables
88 #define BOOTSTRAP_TABLE_SIZE (ARM_PGBYTES * 34)
89 #else // ARM_LARGE_MEMORY
90 #define BOOTSTRAP_TABLE_SIZE (ARM_PGBYTES * 8)
93 typedef uint64_t tt_entry_t
; /* translation table entry type */
94 #define TT_ENTRY_NULL ((tt_entry_t *) 0)
96 typedef uint64_t pt_entry_t
; /* page table entry type */
97 #define PT_ENTRY_NULL ((pt_entry_t *) 0)
99 #elif defined(__arm__)
101 typedef uint32_t tt_entry_t
; /* translation table entry type */
102 #define PT_ENTRY_NULL ((pt_entry_t *) 0)
104 typedef uint32_t pt_entry_t
; /* page table entry type */
105 #define TT_ENTRY_NULL ((tt_entry_t *) 0)
111 /* Forward declaration of the structure that controls page table
112 * geometry and TTE/PTE format. */
113 struct page_table_attr
;
116 * pv_entry_t - structure to track the active mappings for a given page
118 typedef struct pv_entry
{
119 struct pv_entry
*pve_next
; /* next alias */
120 pt_entry_t
*pve_ptep
; /* page table entry */
122 #if __arm__ && (__BIGGEST_ALIGNMENT__ > 4)
123 /* For the newer ARMv7k ABI where 64-bit types are 64-bit aligned, but pointers
125 * Since pt_desc is 64-bit aligned and we cast often from pv_entry to
128 __attribute__ ((aligned(8))) pv_entry_t
;
138 struct pmap_cpu_data
{
140 void * ppl_kern_saved_sp
;
142 arm_context_t
* save_area
;
143 unsigned int ppl_state
;
145 #if defined(__arm64__)
146 pmap_t cpu_nested_pmap
;
147 const struct page_table_attr
*cpu_nested_pmap_attr
;
148 vm_map_address_t cpu_nested_region_addr
;
149 vm_map_offset_t cpu_nested_region_size
;
151 pmap_t cpu_user_pmap
;
152 unsigned int cpu_user_pmap_stamp
;
154 unsigned int cpu_number
;
155 bool copywindow_strong_sync
[CPUWINDOWS_MAX
];
156 pv_free_list_t pv_free
;
157 pv_entry_t
*pv_free_tail
;
160 * This supports overloading of ARM ASIDs by the pmap. The field needs
161 * to be wide enough to cover all the virtual bits in a virtual ASID.
162 * With 256 physical ASIDs, 8-bit fields let us support up to 65536
163 * Virtual ASIDs, minus all that would map on to 0 (as 0 is a global
166 * If we were to use bitfield shenanigans here, we could save a bit of
167 * memory by only having enough bits to support MAX_ASIDS. However, such
168 * an implementation would be more error prone.
170 uint8_t cpu_sw_asids
[MAX_HW_ASIDS
];
172 typedef struct pmap_cpu_data pmap_cpu_data_t
;
174 #include <mach/vm_prot.h>
175 #include <mach/vm_statistics.h>
176 #include <mach/machine/vm_param.h>
177 #include <kern/kern_types.h>
178 #include <kern/thread.h>
179 #include <kern/queue.h>
182 #include <sys/cdefs.h>
184 /* Base address for low globals. */
185 #if defined(ARM_LARGE_MEMORY)
186 #define LOW_GLOBAL_BASE_ADDRESS 0xfffffe0000000000ULL
188 #define LOW_GLOBAL_BASE_ADDRESS 0xfffffff000000000ULL
192 * This indicates (roughly) where there is free space for the VM
193 * to use for the heap; this does not need to be precise.
195 #if defined(KERNEL_INTEGRITY_KTRR) || defined(KERNEL_INTEGRITY_CTRR)
196 #if defined(ARM_LARGE_MEMORY)
197 #define KERNEL_PMAP_HEAP_RANGE_START (VM_MIN_KERNEL_AND_KEXT_ADDRESS+ARM_TT_L1_SIZE)
198 #else // ARM_LARGE_MEMORY
199 #define KERNEL_PMAP_HEAP_RANGE_START VM_MIN_KERNEL_AND_KEXT_ADDRESS
200 #endif // ARM_LARGE_MEMORY
202 #define KERNEL_PMAP_HEAP_RANGE_START LOW_GLOBAL_BASE_ADDRESS
205 struct page_table_level_info
{
207 const uint64_t offmask
;
208 const uint64_t shift
;
209 const uint64_t index_mask
;
210 const uint64_t valid_mask
;
211 const uint64_t type_mask
;
212 const uint64_t type_block
;
216 * For setups where the kernel page size does not match the hardware
217 * page size (assumably, the kernel page size must be a multiple of
218 * the hardware page size), we will need to determine what the page
221 #define PAGE_RATIO ((1 << PAGE_SHIFT) >> ARM_PGSHIFT)
222 #define TEST_PAGE_RATIO_4 (PAGE_RATIO == 4)
226 #define SUPERPAGE_NBASEPAGES 1 /* No superpages support */
229 * Convert addresses to pages and vice versa.
230 * No rounding is used.
232 #define arm_atop(x) (((vm_map_address_t)(x)) >> ARM_PGSHIFT)
233 #define arm_ptoa(x) (((vm_map_address_t)(x)) << ARM_PGSHIFT)
236 * Round off or truncate to the nearest page. These will work
237 * for either addresses or counts. (i.e. 1 byte rounds to 1 page
240 #define arm_round_page(x) \
241 ((((vm_map_address_t)(x)) + ARM_PGMASK) & ~ARM_PGMASK)
242 #define arm_trunc_page(x) (((vm_map_address_t)(x)) & ~ARM_PGMASK)
245 /* Convert address offset to page table index */
246 #define ptenum(a) ((((a) & ARM_TT_LEAF_INDEX_MASK) >> ARM_TT_LEAF_SHIFT))
249 #if (__ARM_VMSA__ <= 7)
250 #define NTTES (ARM_PGBYTES / sizeof(tt_entry_t))
251 #define NPTES ((ARM_PGBYTES/4) /sizeof(pt_entry_t))
253 #define NTTES (ARM_PGBYTES / sizeof(tt_entry_t))
254 #define NPTES (ARM_PGBYTES / sizeof(pt_entry_t))
257 extern void flush_mmu_tlb_region(vm_offset_t va
, unsigned length
);
259 #if defined(__arm64__)
260 extern uint64_t get_mmu_control(void);
261 extern uint64_t get_aux_control(void);
262 extern void set_aux_control(uint64_t);
263 extern void set_mmu_ttb(uint64_t);
264 extern void set_mmu_ttb_alternate(uint64_t);
265 extern uint64_t get_tcr(void);
266 extern void set_tcr(uint64_t);
267 extern uint64_t pmap_get_arm64_prot(pmap_t
, vm_offset_t
);
268 #if defined(HAS_VMSA_LOCK)
269 extern void vmsa_lock(void);
272 extern uint32_t get_mmu_control(void);
273 extern void set_mmu_control(uint32_t);
274 extern uint32_t get_aux_control(void);
275 extern void set_aux_control(uint32_t);
276 extern void set_mmu_ttb(pmap_paddr_t
);
277 extern void set_mmu_ttb_alternate(pmap_paddr_t
);
278 extern void set_context_id(uint32_t);
281 extern pmap_paddr_t
get_mmu_ttb(void);
282 extern pmap_paddr_t
mmu_kvtop(vm_offset_t va
);
283 extern pmap_paddr_t
mmu_kvtop_wpreflight(vm_offset_t va
);
284 extern pmap_paddr_t
mmu_uvtop(vm_offset_t va
);
286 #if (__ARM_VMSA__ <= 7)
287 /* Convert address offset to translation table index */
288 #define ttenum(a) ((a) >> ARM_TT_L1_SHIFT)
290 /* Convert translation table index to user virtual address */
291 #define tteitova(a) ((a) << ARM_TT_L1_SHIFT)
293 #define pa_to_suptte(a) ((a) & ARM_TTE_SUPER_L1_MASK)
294 #define suptte_to_pa(p) ((p) & ARM_TTE_SUPER_L1_MASK)
296 #define pa_to_sectte(a) ((a) & ARM_TTE_BLOCK_L1_MASK)
297 #define sectte_to_pa(p) ((p) & ARM_TTE_BLOCK_L1_MASK)
299 #define pa_to_tte(a) ((a) & ARM_TTE_TABLE_MASK)
300 #define tte_to_pa(p) ((p) & ARM_TTE_TABLE_MASK)
302 #define pa_to_pte(a) ((a) & ARM_PTE_PAGE_MASK)
303 #define pte_to_pa(p) ((p) & ARM_PTE_PAGE_MASK)
304 #define pte_increment_pa(p) ((p) += ptoa(1))
306 #define ARM_NESTING_SIZE_MIN ((PAGE_SIZE/0x1000)*4*ARM_TT_L1_SIZE)
307 #define ARM_NESTING_SIZE_MAX ((256*ARM_TT_L1_SIZE))
311 /* Convert address offset to translation table index */
312 #define ttel0num(a) ((a & ARM_TTE_L0_MASK) >> ARM_TT_L0_SHIFT)
313 #define ttel1num(a) ((a & ARM_TTE_L1_MASK) >> ARM_TT_L1_SHIFT)
314 #define ttel2num(a) ((a & ARM_TTE_L2_MASK) >> ARM_TT_L2_SHIFT)
316 #define pa_to_tte(a) ((a) & ARM_TTE_TABLE_MASK)
317 #define tte_to_pa(p) ((p) & ARM_TTE_TABLE_MASK)
319 #define pa_to_pte(a) ((a) & ARM_PTE_PAGE_MASK)
320 #define pte_to_pa(p) ((p) & ARM_PTE_PAGE_MASK)
321 #define pte_to_ap(p) (((p) & ARM_PTE_APMASK) >> ARM_PTE_APSHIFT)
322 #define pte_increment_pa(p) ((p) += ptoa(1))
324 #define ARM_NESTING_SIZE_MAX (0x0000000010000000ULL)
326 #define TLBFLUSH_SIZE (ARM_TTE_MAX/((sizeof(unsigned int))*BYTE_SIZE))
328 #endif /* __ARM_VMSA__ <= 7 */
330 #define PMAP_GC_INFLIGHT 1
331 #define PMAP_GC_WAIT 2
333 #if DEVELOPMENT || DEBUG
334 #define pmap_cs_log_h(msg, args...) { if(pmap_cs_log_hacks) printf("PMAP_CS: " msg "\n", args); }
335 #define pmap_cs_log pmap_cs_log_h
338 #define pmap_cs_log(msg, args...)
339 #define pmap_cs_log_h(msg, args...)
340 #endif /* DEVELOPMENT || DEBUG */
345 * Convert translation/page table entry to kernel virtual address
347 #define ttetokv(a) (phystokv(tte_to_pa(a)))
348 #define ptetokv(a) (phystokv(pte_to_pa(a)))
351 tt_entry_t
*XNU_PTRAUTH_SIGNED_PTR("pmap.tte") tte
; /* translation table entries */
352 pmap_paddr_t ttep
; /* translation table physical */
353 vm_map_address_t min
; /* min address in pmap */
354 vm_map_address_t max
; /* max address in pmap */
355 #if ARM_PARAMETERIZED_PMAP
356 const struct page_table_attr
* pmap_pt_attr
; /* details about page table layout */
357 #endif /* ARM_PARAMETERIZED_PMAP */
358 ledger_t ledger
; /* ledger tracking phys mappings */
360 decl_lck_rw_data(, rwlock
);
362 struct pmap_statistics stats
; /* map statistics */
363 queue_chain_t pmaps
; /* global list of pmaps */
364 tt_entry_t
*tt_entry_free
; /* free translation table entries */
365 struct pmap
*XNU_PTRAUTH_SIGNED_PTR("pmap.nested_pmap") nested_pmap
; /* nested pmap */
366 vm_map_address_t nested_region_addr
;
367 vm_map_offset_t nested_region_size
;
368 vm_map_offset_t nested_region_true_start
;
369 vm_map_offset_t nested_region_true_end
;
370 unsigned int *nested_region_asid_bitmap
;
372 #if (__ARM_VMSA__ <= 7)
373 unsigned int tte_index_max
; /* max tte index in translation table entries */
381 unsigned int stamp
; /* creation stamp */
382 _Atomic
int32_t ref_count
; /* pmap reference count */
383 unsigned int gc_status
; /* gc status */
384 unsigned int nested_region_asid_bitmap_size
;
385 uint32_t nested_no_bounds_refcnt
;/* number of pmaps that nested this pmap without bounds set */
391 char pmap_procname
[17];
392 bool pmap_stats_assert
;
393 #endif /* MACH_ASSERT */
395 bool pmap_vm_map_cs_enforced
;
401 #if DEVELOPMENT || DEBUG
402 bool footprint_suspended
;
403 bool footprint_was_suspended
;
404 #endif /* DEVELOPMENT || DEBUG */
405 bool nx_enabled
; /* no execute */
406 bool nested
; /* is nested */
407 bool is_64bit
; /* is 64bit */
408 bool nested_has_no_bounds_ref
; /* nested a pmap when the bounds were not set */
409 bool nested_bounds_set
; /* The nesting bounds have been set */
414 #endif /* HAS_APPLE_PAC */
417 #define PMAP_VASID(pmap) (((uint32_t)((pmap)->sw_asid) << 16) | pmap->hw_asid)
420 extern int pmap_list_resident_pages(
425 #else /* #if VM_DEBUG */
426 #define pmap_list_resident_pages(pmap, listp, space) (0)
427 #endif /* #if VM_DEBUG */
429 extern int copysafe(vm_map_address_t from
, vm_map_address_t to
, uint32_t cnt
, int type
, uint32_t *bytes_copied
);
431 /* globals shared between arm_vm_init and pmap */
432 extern tt_entry_t
*cpu_tte
; /* first CPUs translation table (shared with kernel pmap) */
433 extern pmap_paddr_t cpu_ttep
; /* physical translation table addr */
436 extern void *ropagetable_begin
;
437 extern void *ropagetable_end
;
441 extern tt_entry_t
*invalid_tte
; /* global invalid translation table */
442 extern pmap_paddr_t invalid_ttep
; /* physical invalid translation table addr */
445 #define PMAP_CONTEXT(pmap, thread)
448 * platform dependent Prototypes
450 extern void pmap_switch_user_ttb(pmap_t pmap
);
451 extern void pmap_clear_user_ttb(void);
452 extern void pmap_bootstrap(vm_offset_t
);
453 extern vm_map_address_t
pmap_ptov(pmap_t
, ppnum_t
);
454 extern pmap_paddr_t
pmap_find_pa(pmap_t map
, addr64_t va
);
455 extern pmap_paddr_t
pmap_find_pa_nofault(pmap_t map
, addr64_t va
);
456 extern ppnum_t
pmap_find_phys(pmap_t map
, addr64_t va
);
457 extern ppnum_t
pmap_find_phys_nofault(pmap_t map
, addr64_t va
);
458 extern void pmap_set_pmap(pmap_t pmap
, thread_t thread
);
459 extern void pmap_collect(pmap_t pmap
);
460 extern void pmap_gc(void);
462 extern void * pmap_sign_user_ptr(void *value
, ptrauth_key key
, uint64_t data
, uint64_t jop_key
);
463 extern void * pmap_auth_user_ptr(void *value
, ptrauth_key key
, uint64_t data
, uint64_t jop_key
);
464 #endif /* HAS_APPLE_PAC && XNU_MONITOR */
467 * Interfaces implemented as macros.
470 #define PMAP_SWITCH_USER(th, new_map, my_cpu) { \
472 pmap_set_pmap(vm_map_pmap(new_map), th); \
475 #define pmap_kernel() \
478 #define pmap_compressed(pmap) \
479 ((pmap)->stats.compressed)
481 #define pmap_resident_count(pmap) \
482 ((pmap)->stats.resident_count)
484 #define pmap_resident_max(pmap) \
485 ((pmap)->stats.resident_max)
489 #define pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr) \
492 #define pmap_pageable(pmap, start, end, pageable) \
495 #define pmap_kernel_va(VA) \
496 (((VA) >= VM_MIN_KERNEL_ADDRESS) && ((VA) <= VM_MAX_KERNEL_ADDRESS))
498 #define pmap_attribute(pmap, addr, size, attr, value) \
499 (KERN_INVALID_ADDRESS)
501 #define copyinmsg(from, to, cnt) \
502 copyin(from, to, cnt)
504 #define copyoutmsg(from, to, cnt) \
505 copyout(from, to, cnt)
507 extern pmap_paddr_t
kvtophys(vm_offset_t va
);
508 extern vm_map_address_t
phystokv(pmap_paddr_t pa
);
509 extern vm_map_address_t
phystokv_range(pmap_paddr_t pa
, vm_size_t
*max_len
);
511 extern vm_map_address_t
pmap_map(vm_map_address_t va
, vm_offset_t sa
, vm_offset_t ea
, vm_prot_t prot
, unsigned int flags
);
512 extern vm_map_address_t
pmap_map_high_window_bd( vm_offset_t pa
, vm_size_t len
, vm_prot_t prot
);
513 extern kern_return_t
pmap_map_block(pmap_t pmap
, addr64_t va
, ppnum_t pa
, uint32_t size
, vm_prot_t prot
, int attr
, unsigned int flags
);
514 extern void pmap_map_globals(void);
516 #define PMAP_MAP_BD_DEVICE 0x0
517 #define PMAP_MAP_BD_WCOMB 0x1
518 #define PMAP_MAP_BD_POSTED 0x2
519 #define PMAP_MAP_BD_POSTED_REORDERED 0x3
520 #define PMAP_MAP_BD_POSTED_COMBINED_REORDERED 0x4
521 #define PMAP_MAP_BD_MASK 0x7
523 extern vm_map_address_t
pmap_map_bd_with_options(vm_map_address_t va
, vm_offset_t sa
, vm_offset_t ea
, vm_prot_t prot
, int32_t options
);
524 extern vm_map_address_t
pmap_map_bd(vm_map_address_t va
, vm_offset_t sa
, vm_offset_t ea
, vm_prot_t prot
);
526 extern void pmap_init_pte_page(pmap_t
, pt_entry_t
*, vm_offset_t
, unsigned int ttlevel
, boolean_t alloc_ptd
);
528 extern boolean_t
pmap_valid_address(pmap_paddr_t addr
);
529 extern void pmap_disable_NX(pmap_t pmap
);
530 extern void pmap_set_nested(pmap_t pmap
);
531 extern void pmap_create_sharedpages(vm_map_address_t
*kernel_data_addr
, vm_map_address_t
*kernel_text_addr
, vm_map_address_t
*user_text_addr
);
532 extern void pmap_insert_sharedpage(pmap_t pmap
);
533 extern void pmap_protect_sharedpage(void);
535 extern vm_offset_t
pmap_cpu_windows_copy_addr(int cpu_num
, unsigned int index
);
536 extern unsigned int pmap_map_cpu_windows_copy(ppnum_t pn
, vm_prot_t prot
, unsigned int wimg_bits
);
537 extern void pmap_unmap_cpu_windows_copy(unsigned int index
);
540 /* exposed for use by the HMAC SHA driver */
541 extern void pmap_invoke_with_page(ppnum_t page_number
, void *ctx
,
542 void (*callback
)(void *ctx
, ppnum_t page_number
, const void *page
));
543 extern void pmap_hibernate_invoke(void *ctx
, void (*callback
)(void *ctx
, uint64_t addr
, uint64_t len
));
544 extern void pmap_set_ppl_hashed_flag(const pmap_paddr_t addr
);
545 extern void pmap_clear_ppl_hashed_flag_all(void);
546 extern void pmap_check_ppl_hashed_flag_all(void);
547 #endif /* XNU_MONITOR */
549 extern boolean_t
pmap_valid_page(ppnum_t pn
);
550 extern boolean_t
pmap_bootloader_page(ppnum_t pn
);
552 #define MACHINE_PMAP_IS_EMPTY 1
553 extern boolean_t
pmap_is_empty(pmap_t pmap
, vm_map_offset_t start
, vm_map_offset_t end
);
555 #define ARM_PMAP_MAX_OFFSET_DEFAULT 0x01
556 #define ARM_PMAP_MAX_OFFSET_MIN 0x02
557 #define ARM_PMAP_MAX_OFFSET_MAX 0x04
558 #define ARM_PMAP_MAX_OFFSET_DEVICE 0x08
559 #define ARM_PMAP_MAX_OFFSET_JUMBO 0x10
562 extern vm_map_offset_t
pmap_max_offset(boolean_t is64
, unsigned int option
);
563 extern vm_map_offset_t
pmap_max_64bit_offset(unsigned int option
);
564 extern vm_map_offset_t
pmap_max_32bit_offset(unsigned int option
);
566 boolean_t
pmap_virtual_region(unsigned int region_select
, vm_map_offset_t
*startp
, vm_map_size_t
*size
);
568 boolean_t
pmap_enforces_execute_only(pmap_t pmap
);
572 #if __has_feature(ptrauth_calls) && defined(XNU_TARGET_OS_OSX)
574 pmap_disable_user_jop(pmap_t pmap
);
575 #endif /* __has_feature(ptrauth_calls) && defined(XNU_TARGET_OS_OSX) */
577 /* pmap dispatch indices */
578 #define ARM_FAST_FAULT_INDEX 0
579 #define ARM_FORCE_FAST_FAULT_INDEX 1
580 #define MAPPING_FREE_PRIME_INDEX 2
581 #define MAPPING_REPLENISH_INDEX 3
582 #define PHYS_ATTRIBUTE_CLEAR_INDEX 4
583 #define PHYS_ATTRIBUTE_SET_INDEX 5
584 #define PMAP_BATCH_SET_CACHE_ATTRIBUTES_INDEX 6
585 #define PMAP_CHANGE_WIRING_INDEX 7
586 #define PMAP_CREATE_INDEX 8
587 #define PMAP_DESTROY_INDEX 9
588 #define PMAP_ENTER_OPTIONS_INDEX 10
589 /* #define PMAP_EXTRACT_INDEX 11 -- Not used*/
590 #define PMAP_FIND_PA_INDEX 12
591 #define PMAP_INSERT_SHAREDPAGE_INDEX 13
592 #define PMAP_IS_EMPTY_INDEX 14
593 #define PMAP_MAP_CPU_WINDOWS_COPY_INDEX 15
594 #define PMAP_MARK_PAGE_AS_PMAP_PAGE_INDEX 16
595 #define PMAP_NEST_INDEX 17
596 #define PMAP_PAGE_PROTECT_OPTIONS_INDEX 18
597 #define PMAP_PROTECT_OPTIONS_INDEX 19
598 #define PMAP_QUERY_PAGE_INFO_INDEX 20
599 #define PMAP_QUERY_RESIDENT_INDEX 21
600 #define PMAP_REFERENCE_INDEX 22
601 #define PMAP_REMOVE_OPTIONS_INDEX 23
602 #define PMAP_RETURN_INDEX 24
603 #define PMAP_SET_CACHE_ATTRIBUTES_INDEX 25
604 #define PMAP_SET_NESTED_INDEX 26
605 #define PMAP_SET_PROCESS_INDEX 27
606 #define PMAP_SWITCH_INDEX 28
607 #define PMAP_SWITCH_USER_TTB_INDEX 29
608 #define PMAP_CLEAR_USER_TTB_INDEX 30
609 #define PMAP_UNMAP_CPU_WINDOWS_COPY_INDEX 31
610 #define PMAP_UNNEST_OPTIONS_INDEX 32
611 #define PMAP_FOOTPRINT_SUSPEND_INDEX 33
612 #define PMAP_CPU_DATA_INIT_INDEX 34
613 #define PMAP_RELEASE_PAGES_TO_KERNEL_INDEX 35
614 #define PMAP_SET_JIT_ENTITLED_INDEX 36
617 #define PMAP_UPDATE_COMPRESSOR_PAGE_INDEX 55
618 #define PMAP_TRIM_INDEX 56
619 #define PMAP_LEDGER_ALLOC_INIT_INDEX 57
620 #define PMAP_LEDGER_ALLOC_INDEX 58
621 #define PMAP_LEDGER_FREE_INDEX 59
623 #if HAS_APPLE_PAC && XNU_MONITOR
624 #define PMAP_SIGN_USER_PTR 60
625 #define PMAP_AUTH_USER_PTR 61
626 #endif /* HAS_APPLE_PAC && XNU_MONITOR */
628 #define PHYS_ATTRIBUTE_CLEAR_RANGE_INDEX 66
631 #if __has_feature(ptrauth_calls) && defined(XNU_TARGET_OS_OSX)
632 #define PMAP_DISABLE_USER_JOP_INDEX 69
633 #endif /* __has_feature(ptrauth_calls) && defined(XNU_TARGET_OS_OSX) */
637 #define PMAP_SET_VM_MAP_CS_ENFORCED_INDEX 72
639 #define PMAP_COUNT 73
641 #define PMAP_INVALID_CPU_NUM (~0U)
643 struct pmap_cpu_data_array_entry
{
644 pmap_cpu_data_t cpu_data
;
645 } __attribute__((aligned(1 << MAX_L2_CLINE
)));
647 /* Initialize the pmap per-CPU data for the current CPU. */
648 extern void pmap_cpu_data_init(void);
650 /* Get the pmap per-CPU data for the current CPU. */
651 extern pmap_cpu_data_t
* pmap_get_cpu_data(void);
654 extern boolean_t pmap_ppl_locked_down
;
657 * Denotes the bounds of the PPL stacks. These are visible so that other code
658 * can check if addresses are part of the PPL stacks.
660 extern void * pmap_stacks_start
;
661 extern void * pmap_stacks_end
;
663 /* Asks if a page belongs to the monitor. */
664 extern boolean_t
pmap_is_monitor(ppnum_t pn
);
667 * Indicates that we are done with our static bootstrap
668 * allocations, so the monitor may now mark the pages
671 extern void pmap_static_allocations_done(void);
674 * Indicates that we are done mutating sensitive state in the system, and that
675 * the PPL may now restict write access to PPL owned mappings.
677 extern void pmap_lockdown_ppl(void);
681 #define PPL_STACK_SIZE (PAGE_SIZE << 2)
683 #define PPL_STACK_SIZE PAGE_SIZE
686 /* One stack for each CPU, plus a guard page below each stack and above the last stack */
687 #define PPL_STACK_REGION_SIZE ((MAX_CPUS * (PPL_STACK_SIZE + ARM_PGBYTES)) + ARM_PGBYTES)
689 #define PPL_DATA_SEGMENT_SECTION_NAME "__PPLDATA,__data"
690 #define PPL_TEXT_SEGMENT_SECTION_NAME "__PPLTEXT,__text,regular,pure_instructions"
691 #define PPL_DATACONST_SEGMENT_SECTION_NAME "__PPLDATA,__const"
693 #define MARK_AS_PMAP_DATA \
694 __PLACE_IN_SECTION(PPL_DATA_SEGMENT_SECTION_NAME)
695 #define MARK_AS_PMAP_TEXT \
696 __attribute__((used, section(PPL_TEXT_SEGMENT_SECTION_NAME), noinline))
697 #define MARK_AS_PMAP_RODATA \
698 __PLACE_IN_SECTION(PPL_DATACONST_SEGMENT_SECTION_NAME)
700 #else /* XNU_MONITOR */
702 #define MARK_AS_PMAP_TEXT
703 #define MARK_AS_PMAP_DATA
704 #define MARK_AS_PMAP_RODATA
706 #endif /* !XNU_MONITOR */
709 extern kern_return_t
pmap_return(boolean_t do_panic
, boolean_t do_recurse
);
711 extern lck_grp_t pmap_lck_grp
;
714 extern void CleanPoC_DcacheRegion_Force_nopreempt(vm_offset_t va
, size_t length
);
715 #define pmap_force_dcache_clean(va, sz) CleanPoC_DcacheRegion_Force_nopreempt(va, sz)
716 #define pmap_simple_lock(l) simple_lock_nopreempt(l, &pmap_lck_grp)
717 #define pmap_simple_unlock(l) simple_unlock_nopreempt(l)
718 #define pmap_simple_lock_try(l) simple_lock_try_nopreempt(l, &pmap_lck_grp)
719 #define pmap_lock_bit(l, i) hw_lock_bit_nopreempt(l, i, &pmap_lck_grp)
720 #define pmap_unlock_bit(l, i) hw_unlock_bit_nopreempt(l, i)
722 #define pmap_force_dcache_clean(va, sz) CleanPoC_DcacheRegion_Force(va, sz)
723 #define pmap_simple_lock(l) simple_lock(l, &pmap_lck_grp)
724 #define pmap_simple_unlock(l) simple_unlock(l)
725 #define pmap_simple_lock_try(l) simple_lock_try(l, &pmap_lck_grp)
726 #define pmap_lock_bit(l, i) hw_lock_bit(l, i, &pmap_lck_grp)
727 #define pmap_unlock_bit(l, i) hw_unlock_bit(l, i)
730 #endif /* #ifndef ASSEMBLER */
732 #if __ARM_KERNEL_PROTECT__
734 * The exception vector mappings start at the middle of the kernel page table
735 * range (so that the EL0 mapping can be located at the base of the range).
737 #define ARM_KERNEL_PROTECT_EXCEPTION_START ((~((ARM_TT_ROOT_SIZE + ARM_TT_ROOT_INDEX_MASK) / 2ULL)) + 1ULL)
738 #endif /* __ARM_KERNEL_PROTECT__ */
740 #endif /* #ifndef _ARM_PMAP_H_ */