iokit/Drivers/network/drvPPCBMac/BMacEnetRegisters.h

   1 /*
   2  * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * Copyright (c) 1998-1999 by Apple Computer, Inc., All rights reserved.
  24  *
  25  * Interface definition for the BigMac Ethernet controller.
  26  *
  27  * HISTORY
  28  *
  29  */
  30
  31 #ifndef _BMACENETREGISTERS_H
  32 #define _BMACENETREGISTERS_H
  33
  34 // ---------------------------------------------------------------------------------------------
  35 // Heathrow (F)eature (C)ontrol (R)egister Addresses
  36 // ---------------------------------------------------------------------------------------------
  37 #define kHeathrowFCR                    0x0038                  // FCR offset from Heathrow Base Address
  38 #define kEnetEnabledBits                0x60000000              // mask to enable Enet Xcvr/Controller
  39 #define kResetEnetCell                  0x80000000              // mask used to reset Enet cell
  40 #define kClearResetEnetCell             0x7fffffff              // mask used to clear reset Enet cell
  41 #define kDisableEnet                    0x1fffffff              // mask to disable Enet Xcvr/Controller
  42
  43
  44 // ---------------------------------------------------------------------------------------------
  45 //      BMAC & Heathrow I/O Addresses
  46 // ---------------------------------------------------------------------------------------------
  47 #define kTxDMABaseOffset                0x08200                 // offset from Heathrow Base address
  48 #define kRxDMABaseOffset                0x08300
  49 #define kControllerBaseOffset           0x11000
  50
  51
  52 // ---------------------------------------------------------------------------------------------
  53 //      BigMac Register Numbers & Bit Assignments
  54 // ---------------------------------------------------------------------------------------------
  55 #define kXIFC                           0x0000
  56 #define kTxOutputEnable                 0x0001
  57 #define kMIILoopbackBits                0x0006
  58 #define kMIIBufferEnable                0x0008
  59 #define kSQETestEnable                  0x0010
  60 #define kSTAT                           0x0200
  61 #define kINTDISABLE                     0x0210
  62 #define kIntFrameReceived               0x0001
  63 #define kIntRxFrameCntExp               0x0002
  64 #define kIntRxAlignCntExp               0x0004
  65 #define kIntRxCRCCntExp                 0x0008
  66 #define kIntRxLenCntExp                 0x0010
  67 #define kIntRxOverFlow                  0x0020
  68 #define kIntRxCodeViolation             0x0040
  69 #define kIntSQETestError                0x0080
  70 #define kIntFrameSent                   0x0100
  71 #define kIntTxUnderrun                  0x0200
  72 #define kIntTxMaxSizeError              0x0400
  73 #define kIntTxNormalCollExp             0x0800
  74 #define kIntTxExcessCollExp             0x1000
  75 #define kIntTxLateCollExp               0x2000
  76 #define kIntTxNetworkCollExp            0x4000
  77 #define kIntTxDeferTimerExp             0x8000
  78 #define kNormalIntEvents                ~(0xFFFF & ( kIntFrameSent | kIntTxUnderrun) )
  79 #if EXTRA_INTERRUPTS
  80         #define kXtraInterrupts         ~(0xFFFF & (kIntFrameReceived | kIntRxFrameCntExp \
  81                                                                         | kIntFrameSent | kIntTxUnderrun | kIntFrameSent) )
  82 #endif
  83 #define kNoEventsMask           0xFFFF
  84 #define kTXRST                          0x0420
  85 #define kTxResetBit                     0x0001
  86 #define kTXCFG                          0x0430
  87 #define kTxMACEnable            0x0001
  88 #define kTxThreshold            0x0004
  89 #define kTxSlowDown                     0x0020
  90 #define kTxIgnoreCollision              0x0040
  91 #define kTxDisableFCS                   0x0080
  92 #define kTxNoBackoff                    0x0100
  93 #define kTxFullDuplex                   0x0200
  94 #define kTxNeverGiveUp                  0x0400
  95 #define kIPG1                           0x0440
  96 #define kIPG2                           0x0450
  97 #define kALIMIT                         0x0460
  98 #define kSLOT                           0x0470
  99 #define kPALEN                          0x0480
 100 #define kPAPAT                          0x0490
 101 #define kTXSFD                          0x04A0
 102 #define kJAM                            0x04B0
 103 #define kTXMAX                          0x04C0
 104 #define kTXMIN                          0x04D0
 105 #define kPAREG                          0x04E0
 106 #define kDCNT                           0x04F0
 107 #define kNCCNT                          0x0500
 108 #define kNTCNT                          0x0510
 109 #define kEXCNT                          0x0520
 110 #define kLTCNT                          0x0530
 111 #define kRSEED                          0x0540
 112 #define kTXSM                           0x0550
 113 #define kRXRST                          0x0620
 114 #define kRxResetValue                   0x0000
 115 #define kRXCFG                          0x0630
 116 #define kRxMACEnable                    0x0001
 117 #define kReservedValue                  0x0004
 118 #define kRxPromiscEnable                0x0040
 119 #define kRxCRCEnable                    0x0100
 120 #define kRxRejectOwnPackets             0x0200
 121 #define kRxHashFilterEnable             0x0800
 122 #define kRxAddrFilterEnable             0x1000
 123 #define kRXMAX                          0x0640
 124 #define kRXMIN                          0x0650
 125 #define kMADD2                          0x0660
 126 #define kMADD1                          0x0670
 127 #define kMADD0                          0x0680
 128 #define kFRCNT                          0x0690
 129 #define kLECNT                          0x06A0
 130 #define kAECNT                          0x06B0
 131 #define kFECNT                          0x06C0
 132 #define kRXSM                           0x06D0
 133 #define kRXCV                           0x06E0
 134 #define kHASH3                          0x0700
 135 #define kHASH2                          0x0710
 136 #define kHASH1                          0x0720
 137 #define kHASH0                          0x0730
 138 #define kAFR2                           0x0740
 139 #define kAFR1                           0x0750
 140 #define kAFR0                           0x0760
 141 #define kAFCR                           0x0770
 142 #define kEnableAllCompares              0x0fff
 143 #define kTXFIFOCSR                      0x0100
 144 #define kTxFIFOEnable                   0x0001
 145 #define kTxFIFO128                      0x0000
 146 #define kTxFIFO2048                     0x001e
 147 #define kTXTH                           0x0110
 148 #define kRXFIFOCSR                      0x0120
 149 #define kRxFIFOEnable                   kTxFIFOEnable
 150 #define kRxFIFO128                      kTxFIFO128
 151 #define kRxFIFO2048                     kTxFIFO2048
 152 #define kMEMADD                         0x0130
 153 #define kMEMDATAHI                      0x0140
 154 #define kMEMDATALO                      0x0150
 155 #define kXCVRIF                         0x0160
 156 #define kCOLActiveLow                   0x0002
 157 #define kSerialMode                     0x0004
 158 #define kClkBit                         0x0008
 159 #define kLinkStatus                     0x0100
 160 #define kCHIPID                         0x0170
 161 #define kCHIPID_Heathrow                0xB0
 162 #define kCHIPID_Paddington              0xC0
 163 #define kCHIPID_PaddingtonXmitStreaming 0xC4
 164
 165 #define kMIFCSR                         0x0180
 166 #define kMIFCSR_Clock                   0x0001
 167 #define kMIFCSR_DataOut                 0x0002
 168 #define kMIFCSR_DataOutEnable           0x0004
 169 #define kMIFCSR_DataIn                  0x0008
 170 #define kSROMCSR                        0x0190
 171 #define kTXPNTR                         0x01A0
 172 #define kRXPNTR                         0x01B0
 173
 174 // ---------------------------------------------------------------------------------------------
 175 //      Misc. Bit definitions for BMac Status word
 176 // ---------------------------------------------------------------------------------------------
 177 #define kRxAbortBit                     0x8000                  // status bit in BMac status for rx packets
 178 #define kRxLengthMask           0x3FFF                  // bits that determine length of rx packets
 179
 180
 181 #define TX_RING_LENGTH          33
 182 #define RX_RING_LENGTH          33
 183
 184 #define TX_PKTS_PER_INT         10
 185
 186 #define NETWORK_BUFSIZE         (ETHERMAXPACKET + ETHERCRC + 2)
 187 #define TRANSMIT_QUEUE_SIZE             1024
 188
 189 #define WATCHDOG_TIMER_MS       500
 190 #define TX_KDB_TIMEOUT          1000
 191
 192 #define TRANSMIT_QUIESCE_uS     200
 193 #define RECEIVE_QUIESCE_uS      1500
 194
 195
 196 enum
 197 {
 198     kIRQEnetDev   = 0,
 199     kIRQEnetTxDMA = 1,
 200     kIRQEnetRxDMA = 2
 201 };
 202
 203 enum
 204 {
 205         MEMORY_MAP_ENET_INDEX           = 0,
 206         MEMORY_MAP_TXDMA_INDEX          = 1,
 207         MEMORY_MAP_RXDMA_INDEX          = 2,
 208         MEMORY_MAP_HEATHROW_INDEX       = 3,
 209         MEMORY_MAP_COUNT                        = 4
 210 };
 211
 212 #endif /* !_BMACENETREGISTERS_H */