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1 /*
2 * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
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14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
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27 */
28 /*
29 * @OSF_COPYRIGHT@
30 */
31 /*
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56 /*
57 */
58
59 #ifndef _I386_TRAP_H_
60 #define _I386_TRAP_H_
61
62 /*
63 * Hardware trap vectors for i386.
64 */
65 #define T_DIVIDE_ERROR 0
66 #define T_DEBUG 1
67 #define T_NMI 2 /* non-maskable interrupt */
68 #define T_INT3 3 /* int 3 instruction */
69 #define T_OVERFLOW 4 /* overflow test */
70 #define T_OUT_OF_BOUNDS 5 /* bounds check */
71 #define T_INVALID_OPCODE 6 /* invalid op code */
72 #define T_NO_FPU 7 /* no floating point */
73 #define T_DOUBLE_FAULT 8 /* double fault */
74 #define T_FPU_FAULT 9
75 #define T_INVALID_TSS 10
76 #define T_SEGMENT_NOT_PRESENT 11
77 #define T_STACK_FAULT 12
78 #define T_GENERAL_PROTECTION 13
79 #define T_PAGE_FAULT 14
80 /* 15 */
81 #define T_FLOATING_POINT_ERROR 16
82 #define T_WATCHPOINT 17
83 #define T_MACHINE_CHECK 18
84 #define T_SSE_FLOAT_ERROR 19
85 /* 20-126 */
86 #define T_DTRACE_RET 127
87
88 /* The SYSENTER and SYSCALL trap numbers are software constructs.
89 * These exceptions are dispatched directly to the system call handlers.
90 * See also the "software interrupt codes" section of
91 * osfmk/mach/i386/syscall_sw.h
92 */
93 #define T_SYSENTER 0x84
94 #define T_SYSCALL 0x85
95
96 #define T_PREEMPT 255
97
98 #define TRAP_NAMES "divide error", "debug trap", "NMI", "breakpoint", \
99 "overflow", "bounds check", "invalid opcode", \
100 "no coprocessor", "double fault", "coprocessor overrun", \
101 "invalid TSS", "segment not present", "stack bounds", \
102 "general protection", "page fault", "(reserved)", \
103 "coprocessor error", "watchpoint", "machine check", "SSE floating point"
104
105 /*
106 * Page-fault trap codes.
107 */
108 #define T_PF_PROT 0x1 /* protection violation */
109 #define T_PF_WRITE 0x2 /* write access */
110 #define T_PF_USER 0x4 /* from user state */
111
112 #ifdef PAE
113 #define T_PF_RSVD 0x8 /* reserved bit set to 1 */
114 #define T_PF_EXECUTE 0x10 /* instruction fetch when NX */
115 #endif
116
117 #if !defined(ASSEMBLER) && defined(MACH_KERNEL)
118
119 #include <i386/thread.h>
120
121 extern void i386_exception(
122 int exc,
123 mach_exception_code_t code,
124 mach_exception_subcode_t subcode);
125
126 extern void sync_iss_to_iks(x86_saved_state_t *regs);
127
128 extern void sync_iss_to_iks_unconditionally(
129 x86_saved_state_t *regs);
130
131 extern void kernel_trap(x86_saved_state_t *regs, uintptr_t *lo_spp);
132
133 extern void user_trap(x86_saved_state_t *regs);
134
135 extern void interrupt(x86_saved_state_t *regs);
136
137 extern void panic_double_fault64(x86_saved_state_t *regs);
138 extern void panic_machine_check64(x86_saved_state_t *regs);
139
140 extern void i386_astintr(int preemption);
141
142
143 typedef kern_return_t (*perfCallback)(
144 int trapno,
145 void *regs,
146 uintptr_t *lo_spp,
147 int);
148
149 typedef kern_return_t (*perfASTCallback)(ast_t reasons, ast_t *myast);
150
151 extern volatile perfCallback perfTrapHook;
152 extern volatile perfASTCallback perfASTHook;
153 extern volatile perfCallback perfIntHook;
154
155 extern void panic_i386_backtrace(void *, int, const char *, boolean_t, x86_saved_state_t *);
156 #if MACH_KDP
157 extern boolean_t kdp_i386_trap(
158 unsigned int,
159 x86_saved_state64_t *,
160 kern_return_t,
161 vm_offset_t);
162 #endif /* MACH_KDP */
163 #endif /* !ASSEMBLER && MACH_KERNEL */
164
165 #endif /* _I386_TRAP_H_ */