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32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
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65 * i386 Task State Segment
68 uint32_t back_link
; /* segment number of previous task,
70 uint32_t esp0
; /* initial stack pointer ... */
71 uint32_t ss0
; /* and segment for ring 0 */
72 uint32_t esp1
; /* initial stack pointer ... */
73 uint32_t ss1
; /* and segment for ring 1 */
74 uint32_t esp2
; /* initial stack pointer ... */
75 uint32_t ss2
; /* and segment for ring 2 */
76 uint32_t cr3
; /* CR3 - page table directory
84 uint32_t esp
; /* current stack pointer */
90 uint32_t ss
; /* current stack segment */
94 uint32_t ldt
; /* local descriptor table segment */
95 uint16_t trace_trap
; /* trap on switch to this task */
96 uint16_t io_bit_map_offset
;
97 /* offset to start of IO permission
102 * Temporary stack used on kernel entry via the sysenter instruction.
103 * Its top points on to the PCB save area. It must contain space for
104 * a single interrupt stack frame in case of single-stepping over the sysenter.
105 * Although this is defined as a 64-bit stack, the space is also used in
106 * 32-bit legacy mode. For 64-bit the stack is 16-byte aligned.
108 struct sysenter_stack
{
109 uint64_t stack
[16]; /* Space for a 64-bit frame and some */
110 uint64_t top
; /* Top and pointer to ISS in PCS */
116 uint64_t rsp0
; /* stack pointer for CPL0 */
117 uint64_t rsp1
; /* stack pointer for CPL1 */
118 uint64_t rsp2
; /* stack pointer for CPL2 */
121 uint64_t ist1
; /* interrupt stack table 1 */
122 uint64_t ist2
; /* interrupt stack table 2 */
123 uint64_t ist3
; /* interrupt stack table 3 */
124 uint64_t ist4
; /* interrupt stack table 4 */
125 uint64_t ist5
; /* interrupt stack table 5 */
126 uint64_t ist6
; /* interrupt stack table 6 */
127 uint64_t ist7
; /* interrupt stack table 7 */
131 uint16_t io_bit_map_offset
;
132 /* offset to IO permission bit map */
135 #endif /* _I386_TSS_H_ */