osfmk/mach/i386/fp_reg.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * @OSF_COPYRIGHT@
  24  */
  25 /*
  26  * Mach Operating System
  27  * Copyright (c) 1992-1989 Carnegie Mellon University
  28  * All Rights Reserved.
  29  *
  30  * Permission to use, copy, modify and distribute this software and its
  31  * documentation is hereby granted, provided that both the copyright
  32  * notice and this permission notice appear in all copies of the
  33  * software, derivative works or modified versions, and any portions
  34  * thereof, and that both notices appear in supporting documentation.
  35  *
  36  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  37  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  38  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  39  *
  40  * Carnegie Mellon requests users of this software to return to
  41  *
  42  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  43  *  School of Computer Science
  44  *  Carnegie Mellon University
  45  *  Pittsburgh PA 15213-3890
  46  *
  47  * any improvements or extensions that they make and grant Carnegie Mellon
  48  * the rights to redistribute these changes.
  49  */
  50 /*
  51  */
  52
  53 #ifndef _I386_FP_SAVE_H_
  54 #define _I386_FP_SAVE_H_
  55
  56
  57 /* note when allocating this data structure, it must be 16 byte aligned. */
  58 struct x86_fx_save {
  59         unsigned short  fx_control;     /* control */
  60         unsigned short  fx_status;      /* status */
  61         unsigned char   fx_tag;         /* register tags */
  62         unsigned char   fx_bbz1;        /* better be zero when calling fxrtstor */
  63         unsigned short  fx_opcode;
  64         unsigned int    fx_eip;         /* eip  instruction */
  65         unsigned short  fx_cs;          /* cs instruction */
  66         unsigned short  fx_bbz2;        /* better be zero when calling fxrtstor */
  67         unsigned int    fx_dp;          /* data address */
  68         unsigned short  fx_ds;          /* data segment */
  69         unsigned short  fx_bbz3;        /* better be zero when calling fxrtstor */
  70         unsigned int    fx_MXCSR;
  71         unsigned int    fx_MXCSR_MASK;
  72         unsigned short  fx_reg_word[8][8];      /* STx/MMx registers */
  73         unsigned short  fx_XMM_reg[8][16];      /* XMM0-XMM15 on 64 bit processors */
  74                                                 /* XMM0-XMM7  on 32 bit processors... unused storage reserved */
  75         unsigned char   fx_reserved[16*6];      /* reserved by intel for future expansion */
  76 };
  77
  78
  79 /*
  80  * Control register
  81  */
  82 #define FPC_IE          0x0001          /* enable invalid operation
  83                                            exception */
  84 #define FPC_IM          FPC_IE
  85 #define FPC_DE          0x0002          /* enable denormalized operation
  86                                            exception */
  87 #define FPC_DM          FPC_DE
  88 #define FPC_ZE          0x0004          /* enable zero-divide exception */
  89 #define FPC_ZM          FPC_ZE
  90 #define FPC_OE          0x0008          /* enable overflow exception */
  91 #define FPC_OM          FPC_OE
  92 #define FPC_UE          0x0010          /* enable underflow exception */
  93 #define FPC_PE          0x0020          /* enable precision exception */
  94 #define FPC_PC          0x0300          /* precision control: */
  95 #define FPC_PC_24       0x0000                  /* 24 bits */
  96 #define FPC_PC_53       0x0200                  /* 53 bits */
  97 #define FPC_PC_64       0x0300                  /* 64 bits */
  98 #define FPC_RC          0x0c00          /* rounding control: */
  99 #define FPC_RC_RN       0x0000                  /* round to nearest or even */
 100 #define FPC_RC_RD       0x0400                  /* round down */
 101 #define FPC_RC_RU       0x0800                  /* round up */
 102 #define FPC_RC_CHOP     0x0c00                  /* chop */
 103 #define FPC_IC          0x1000          /* infinity control (obsolete) */
 104 #define FPC_IC_PROJ     0x0000                  /* projective infinity */
 105 #define FPC_IC_AFF      0x1000                  /* affine infinity (std) */
 106
 107 /*
 108  * Status register
 109  */
 110 #define FPS_IE          0x0001          /* invalid operation */
 111 #define FPS_DE          0x0002          /* denormalized operand */
 112 #define FPS_ZE          0x0004          /* divide by zero */
 113 #define FPS_OE          0x0008          /* overflow */
 114 #define FPS_UE          0x0010          /* underflow */
 115 #define FPS_PE          0x0020          /* precision */
 116 #define FPS_SF          0x0040          /* stack flag */
 117 #define FPS_ES          0x0080          /* error summary */
 118 #define FPS_C0          0x0100          /* condition code bit 0 */
 119 #define FPS_C1          0x0200          /* condition code bit 1 */
 120 #define FPS_C2          0x0400          /* condition code bit 2 */
 121 #define FPS_TOS         0x3800          /* top-of-stack pointer */
 122 #define FPS_TOS_SHIFT   11
 123 #define FPS_C3          0x4000          /* condition code bit 3 */
 124 #define FPS_BUSY        0x8000          /* FPU busy */
 125
 126 /*
 127  * Kind of floating-point support provided by kernel.
 128  */
 129 #define FP_NO           0               /* no floating point */
 130 #define FP_SOFT         1               /* software FP emulator */
 131 #define FP_287          2               /* 80287 */
 132 #define FP_387          3               /* 80387 or 80486 */
 133 #define FP_FXSR         4               /* Fast save/restore SIMD Extension */
 134
 135 #endif  /* _I386_FP_SAVE_H_ */