iokit/Drivers/platform/drvAppleCuda/AppleVIA6522.h

   1 /*
   2  * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
  24  *              All Rights Reserved
  25  *
  26  * Permission to use, copy, modify, and distribute this software and
  27  * its documentation for any purpose and without fee is hereby granted,
  28  * provided that the above copyright notice appears in all copies and
  29  * that both the copyright notice and this permission notice appear in
  30  * supporting documentation.
  31  *
  32  * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
  33  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  34  * FOR A PARTICULAR PURPOSE.
  35  *
  36  * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
  37  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
  38  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
  39  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
  40  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  41  *
  42  */
  43 /*
  44  * Copyright 1996 1995 by Apple Computer, Inc. 1997 1996 1995 1994 1993 1992 1991
  45  *              All Rights Reserved
  46  *
  47  * Permission to use, copy, modify, and distribute this software and
  48  * its documentation for any purpose and without fee is hereby granted,
  49  * provided that the above copyright notice appears in all copies and
  50  * that both the copyright notice and this permission notice appear in
  51  * supporting documentation.
  52  *
  53  * APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
  54  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  55  * FOR A PARTICULAR PURPOSE.
  56  *
  57  * IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
  58  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
  59  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
  60  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
  61  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  62  */
  63 /*
  64  * MKLINUX-1.0DR2
  65  */
  66 /*
  67  * 18 June 1998 sdouglas
  68  * Start IOKit version.
  69  */
  70
  71
  72 /*
  73     File:       via6522.h
  74
  75     Contains:   xxx put contents here xxx
  76
  77     Written by: xxx put writers here xxx
  78
  79     Copyright:  © 1993, 1995 by Apple Computer, Inc., all rights reserved.
  80
  81     Change History (most recent first):
  82
  83          <1>     2/22/95    AM      First checked in.
  84          <1>    04/04/94    MRN     First checked in.
  85
  86 */
  87
  88 /*
  89  * Copyright 1987-91 Apple Computer, Inc.
  90  * All Rights Reserved.
  91  */
  92
  93 #ifndef __VIA6522_H__
  94 #define __VIA6522_H__
  95
  96 /*
  97  *   Synertek SY6522 VIA Versatile Interface Adapter
  98  */
  99
 100 /*
 101  * This has been modified to address BOTH the via and RBV registers,
 102  * because we know that both chips ignore part of the address, thus
 103  * only responding correctly.  It's ugly, but the ROM does it...
 104  */
 105
 106 #if defined(powerc) || defined (__powerc)
 107 #pragma options align=mac68k
 108 #endif
 109
 110 typedef struct via6522Regs                      /* VIA / RBV address */
 111     {
 112     volatile unsigned char  vBufB;              /* 0000/0000 register b */
 113     volatile unsigned char  RvExp;              /* 0001 RBV future expansion */
 114     volatile unsigned char  RvSlotIFR;          /* 0002 RBV Slot interrupts reg. */
 115     volatile unsigned char  RvIFR;              /* 0003 RBV interrupt flag reg. */
 116     unsigned char           jnk0[ 12 ];
 117
 118     volatile unsigned char  RvMonP;             /* xxxx/0010 RBV video monitor type */
 119     volatile unsigned char  RvChpT;             /* xxxx/0011 RBV test mode register */
 120     volatile unsigned char  RvSlotIER;          /* xxxx/0012 RBV slot interrupt enables */
 121     volatile unsigned char  RvIER;              /* xxxx/0013 RBV interrupt flag enable reg */
 122     unsigned char           jnk1[ 0x1FF - 0x13 ];
 123
 124     volatile unsigned char  vBufAH;             /* 0200 buffer a (with handshake). */
 125     unsigned char           jnk2[ 0x1FF ];      /* Dont use! Here only for completeness */
 126
 127     volatile unsigned char  vDIRB;              /* 0400 data direction register B */
 128     unsigned char           jnk25[ 0x1FF ];
 129
 130     volatile unsigned char  vDIRA;              /* 0600 data direction register A */
 131     unsigned char           jnk3[ 0x1FF ];
 132
 133     volatile unsigned char  vT1C;               /* 0800 timer one low */
 134     unsigned char           jnk4[ 0x1FF ];
 135
 136     volatile unsigned char  vT1CH;              /* 0A00 timer one high */
 137     unsigned char           jnk5[ 0x1FF ];
 138
 139     volatile unsigned char  vT1L;               /* 0C00 timer one latches low */
 140     unsigned char           jnk6[ 0x1FF ];
 141
 142     volatile unsigned char  vT1LH;              /* 0E00 timer one latches high */
 143     unsigned char           jnk7[ 0x1FF ];
 144
 145     volatile unsigned char  vT2C;               /* 1000 timer 2 low */
 146     unsigned char           jnk8[ 0x1FF ];
 147
 148     volatile unsigned char  vT2CH;              /* 1200 timer two counter high */
 149     unsigned char           jnk9[ 0x1FF ];
 150
 151     volatile unsigned char  vSR;                /* 1400 shift register */
 152     unsigned char           jnka[ 0x1FF ];
 153
 154     volatile unsigned char  vACR;               /* 1600 auxilary control register */
 155     unsigned char           jnkb[ 0x1FF ];
 156
 157     volatile unsigned char  vPCR;               /* 1800 peripheral control register */
 158     unsigned char           jnkc[ 0x1FF ];
 159
 160     volatile unsigned char  vIFR;               /* 1A00 interrupt flag register */
 161     unsigned char           jnkd[ 0x1FF ];
 162
 163     volatile unsigned char  vIER;               /* 1C00 interrupt enable register */
 164     unsigned char           jnkf[ 0x1FF ];
 165
 166     volatile unsigned char  vBufA;              /* 1E00 register A, read and write */
 167     } via6522Regs;
 168
 169 #if defined(powerc) || defined(__powerc)
 170 #pragma options align=reset
 171 #endif
 172
 173
 174 /*  Register B contents */
 175
 176 #define VRB_POWEROFF    0x04            /* disk head select */
 177 #define RBV_POWEROFF    VRB_POWEROFF
 178 #define VRB_BUSLOCK     0x02            /* NuBus Transactions are locked */
 179
 180
 181 /*  Register A contents */
 182
 183 #define VRA_DRIVE       0x10            /* drive select */
 184 #define VRA_HEAD        0x20            /* disk head select */
 185
 186
 187 /*  Auxillary control register contents */
 188
 189 #define VAC_PAENL       0x01            /* Enable latch for PA */
 190 #define VAC_PADISL      0x00            /* Disable latch for PA */
 191 #define VAC_PBENL       0x02            /* Enable latch for PA */
 192 #define VAC_PBDISL      0x00            /* Disable latch for PA */
 193 #define VAC_SRDIS       0x00            /* Shift Reg Disabled */
 194 #define VAC_SRMD1       0x04            /* Shift In under control of T2 */
 195 #define VAC_SRMD2       0x08            /* Shift In under control of Phase 2 */
 196 #define VAC_SRMD3       0x0C            /* Shift in under control of Ext Clk */
 197 #define VAC_SRMD4       0x10            /* Shift Out free running at T2 rate */
 198 #define VAC_SRMD5       0x14            /* Shift Out under control of T2 */
 199 #define VAC_SRMD6       0x18            /* Shift Out under control of theta2 */
 200 #define VAC_SRMD7       0x1C            /* Shift Out under control of Ext Clk */
 201 #define VAC_T2CTL       0x20            /* Timer two, control */
 202 #define VAC_T2TI        0x00            /* Timer Two, Timed Interrupt */
 203 #define VAC_T2CD        0x20            /* Timer Two, count down with pulses on PB6 */
 204 #define VAC_T1CONT      0x40            /* Timer one, continous counting */
 205 #define VAC_T11SHOT     0x00            /* Timer One, one shot output */
 206 #define VAC_T1PB7       0x80            /* Timer one, drives PB7 */
 207 #define VAC_T1PB7DIS    0x00            /* Timer one, drives PB7 disabled */
 208
 209
 210 /*  Interrupt enable register contents */
 211
 212 #define VIE_CA2         0x01            /* interrupt on CA2 */
 213 #define VIE_CA1         0x02            /* interrupt on CA1 */
 214 #define VIE_SR          0x04            /* Shift Register */
 215 #define VIE_CB2         0x08            /* interrupt on CB2 */
 216 #define VIE_CB1         0x10            /* interrupt on CB1 */
 217 #define VIE_TIM2        0x20            /* timer 2 interrupt */
 218 #define VIE_TIM1        0x40            /* timer 1 interrupt */
 219 #define VIE_SET         0x80            /* Set interrupt bits if this is on */
 220 #define VIE_CLEAR       0x00            /* Clear bits if used */
 221
 222 #define VIE_ALL         ( VIE_TIM1 | VIE_TIM2 | VIE_CB1 | VIE_CB2 | VIE_SR | VIE_CA1 | VIE_CA2 )
 223
 224
 225 /*  VIA Data Direction Register Contents */
 226
 227 #define VDR_P7_O        0x80            /* P7 is output */
 228 #define VDR_P7_I        0x00            /* P7 is input */
 229 #define VDR_P6_O        0x40            /* P6 is output */
 230 #define VDR_P6_I        0x00            /* P6 is input */
 231 #define VDR_P5_O        0x20            /* P5 is output */
 232 #define VDR_P5_I        0x00            /* P5 is input */
 233 #define VDR_P4_O        0x10            /* P4 is output */
 234 #define VDR_P4_I        0x00            /* P4 is input */
 235 #define VDR_P3_O        0x08            /* P3 is output */
 236 #define VDR_P3_I        0x00            /* P3 is input */
 237 #define VDR_P2_O        0x04            /* P2 is output */
 238 #define VDR_P2_I        0x00            /* P2 is input */
 239 #define VDR_P1_O        0x02            /* P1 is output */
 240 #define VDR_P1_I        0x00            /* P1 is input */
 241 #define VDR_P0_O        0x01            /* P0 is output */
 242 #define VDR_P0_I        0x00            /* P0 is input */
 243
 244
 245 /*  VIA1 Register A contents where they differ from standard VIA1 */
 246
 247 #define RBV_BURNIN      0x01            /* burnin flag */
 248 #define RBV_CPUID0      0x02            /* CPU id bit 0 */
 249 #define RBV_CPUID1      0x04            /* CPU id bit 1 */
 250 #define RBV_CPUID2      0x10            /* CPU id bit 2 */
 251 #define RBV_CPUID3      0x40            /* CPU id bit 3 */
 252
 253
 254 /*  VIA1 Register B contents where they differ from standard VIA1 */
 255
 256 #define RBV_PARDIS      0x40            /* disable parity */
 257 #define RBV_PAROK       0x80            /* parity OK */
 258
 259 #define EVRB_XCVR       0x08            /* XCVR_SESSION* */
 260 #define EVRB_FULL       0x10            /* VIA_FULL */
 261 #define EVRB_SYSES      0x20            /* SYS_SESSION */
 262 #define EVRB_AUXIE      0x00            /* Enable A/UX Interrupt Scheme */
 263 #define EVRB_AUXID      0x40            /* Disable A/UX Interrupt Scheme */
 264 #define EVRB_SFTWRIE    0x00            /* Software Interrupt ReQuest */
 265 #define EVRB_SFTWRID    0x80            /* Software Interrupt ReQuest */
 266
 267
 268 /*  VIA2 Register A contents where they differ from standard VIA2 */
 269
 270 #define RBV_SZEROIRQ    0x40            /* slot 0 irq */
 271 #define EVRA_ENETIRQ    0x01            /* Ethernet irq */
 272 #define EVRA_VIDIRQ     0x40            /* Video irq */
 273
 274
 275 /*  VIA2 Register B contents where they differ from standard VIA2 */
 276
 277 #define RBV_CDIS        0x01            /* disable external cache */
 278 #define RBV_CFLUSH      0x08            /* flush external cache */
 279 #define EVRB_LED        0x10            /* LED */
 280 #define RBV_PARODD      0x80            /* 1 for odd, 0 for even */
 281
 282
 283 /*  Video monitor parameters: */
 284 #define RBV_DEPTH       0x07            /* bits per pixel: 000=1,001=2,010=4,011=8 */
 285 #define RBV_MONID       0x38            /* monitor type as below */
 286 #define RBV_VIDOFF      0x40            /* 1 turns off onboard video */
 287
 288
 289 /*  Supported video monitor types: */
 290
 291 #define MON_15BW        ( 1 << 3 )      /* 15" BW  portrait */
 292 #define MON_IIGS        ( 2 << 3 )      /* modified IIGS monitor */
 293 #define MON_15RGB       ( 5 << 3 )      /* 15" RGB portrait */
 294 #define MON_12OR13      ( 6 << 3 )      /* 12" BW or 13" RGB */
 295 #define MON_NONE        ( 7 << 3 )      /* No monitor attached */
 296
 297 #endif /* __VIA6522_H__ */