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1 | /* | |
2 | * Copyright (c) 2000-2007 Apple Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | /* | |
29 | * @OSF_COPYRIGHT@ | |
30 | */ | |
31 | ||
32 | #include <debug.h> | |
33 | #include <mach_ldebug.h> | |
34 | #include <mach_kdb.h> | |
35 | #include <mach_kdp.h> | |
36 | ||
37 | #include <kern/misc_protos.h> | |
38 | #include <kern/thread.h> | |
39 | #include <kern/processor.h> | |
40 | #include <kern/startup.h> | |
41 | #include <machine/machine_routines.h> | |
42 | #include <ppc/boot.h> | |
43 | #include <ppc/proc_reg.h> | |
44 | #include <ppc/misc_protos.h> | |
45 | #include <ppc/pmap.h> | |
46 | #include <ppc/new_screen.h> | |
47 | #include <ppc/exception.h> | |
48 | #include <ppc/asm.h> | |
49 | #include <ppc/Firmware.h> | |
50 | #include <ppc/savearea.h> | |
51 | #include <ppc/low_trace.h> | |
52 | #include <ppc/Diagnostics.h> | |
53 | #include <ppc/cpu_internal.h> | |
54 | #include <ppc/mem.h> | |
55 | #include <ppc/mappings.h> | |
56 | #include <ppc/locks.h> | |
57 | #include <kern/pms.h> | |
58 | #include <ppc/rtclock.h> | |
59 | ||
60 | #include <pexpert/pexpert.h> | |
61 | ||
62 | extern unsigned int mckFlags; | |
63 | extern vm_offset_t intstack; | |
64 | extern vm_offset_t debstack; | |
65 | ||
66 | extern unsigned int extPatchMCK; | |
67 | extern unsigned int extPatch32; | |
68 | extern unsigned int hwulckPatch_isync; | |
69 | extern unsigned int hwulckPatch_eieio; | |
70 | extern unsigned int hwulckbPatch_isync; | |
71 | extern unsigned int hwulckbPatch_eieio; | |
72 | extern unsigned int mulckPatch_isync; | |
73 | extern unsigned int mulckPatch_eieio; | |
74 | extern unsigned int mulckePatch_isync; | |
75 | extern unsigned int mulckePatch_eieio; | |
76 | extern unsigned int sulckPatch_isync; | |
77 | extern unsigned int sulckPatch_eieio; | |
78 | extern unsigned int rwlesPatch_isync; | |
79 | extern unsigned int rwlesPatch_eieio; | |
80 | extern unsigned int rwldPatch_isync; | |
81 | extern unsigned int rwldPatch_eieio; | |
82 | extern unsigned int bcopy_nop_if_32bit; | |
83 | extern unsigned int bcopy_nc_nop_if_32bit; | |
84 | extern unsigned int memcpy_nop_if_32bit; | |
85 | extern unsigned int xsum_nop_if_32bit; | |
86 | extern unsigned int uft_nop_if_32bit; | |
87 | extern unsigned int uft_uaw_nop_if_32bit; | |
88 | extern unsigned int uft_cuttrace; | |
89 | ||
90 | int forcenap = 0; | |
91 | int wcte = 0; /* Non-cache gather timer disabled */ | |
92 | ||
93 | int debug_task; | |
94 | ||
95 | patch_entry_t patch_table[] = { | |
96 | {&extPatch32, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
97 | {&extPatchMCK, 0x60000000, PATCH_PROCESSOR, CPU_SUBTYPE_POWERPC_970}, | |
98 | {&hwulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
99 | {&hwulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
100 | {&hwulckbPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
101 | {&hwulckbPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
102 | {&mulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
103 | {&mulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
104 | {&mulckePatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
105 | {&mulckePatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
106 | {&sulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
107 | {&sulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
108 | {&rwlesPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
109 | {&rwlesPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
110 | {&rwldPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
111 | {&rwldPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
112 | {&bcopy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
113 | {&bcopy_nc_nop_if_32bit,0x60000000, PATCH_FEATURE, PatchExt32}, | |
114 | {&memcpy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
115 | {&xsum_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
116 | {&uft_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
117 | {&uft_uaw_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
118 | {&uft_cuttrace, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
119 | {NULL, 0x00000000, PATCH_END_OF_TABLE, 0} | |
120 | }; | |
121 | ||
122 | ||
123 | /* | |
124 | * Forward definition | |
125 | */ | |
126 | void ppc_init( | |
127 | boot_args *args); | |
128 | ||
129 | void ppc_init_cpu( | |
130 | struct per_proc_info *proc_info); | |
131 | ||
132 | ||
133 | /* | |
134 | * Routine: ppc_init | |
135 | * Function: | |
136 | */ | |
137 | void | |
138 | ppc_init( | |
139 | boot_args *args) | |
140 | { | |
141 | unsigned int maxmem; | |
142 | uint64_t xmaxmem; | |
143 | uint64_t newhid; | |
144 | unsigned int cputrace; | |
145 | unsigned int novmx; | |
146 | unsigned int mcksoft; | |
147 | thread_t thread; | |
148 | mapping_t *mp; | |
149 | uint64_t scdata; | |
150 | ||
151 | ||
152 | /* | |
153 | * Setup per_proc info for first cpu. | |
154 | */ | |
155 | ||
156 | BootProcInfo.cpu_number = 0; | |
157 | BootProcInfo.cpu_flags = 0; | |
158 | BootProcInfo.istackptr = 0; /* we're on the interrupt stack */ | |
159 | BootProcInfo.intstack_top_ss = (vm_offset_t)&intstack + INTSTACK_SIZE - FM_SIZE; | |
160 | BootProcInfo.debstack_top_ss = (vm_offset_t)&debstack + KERNEL_STACK_SIZE - FM_SIZE; | |
161 | BootProcInfo.debstackptr = BootProcInfo.debstack_top_ss; | |
162 | BootProcInfo.interrupts_enabled = 0; | |
163 | BootProcInfo.pending_ast = AST_NONE; | |
164 | BootProcInfo.FPU_owner = NULL; | |
165 | BootProcInfo.VMX_owner = NULL; | |
166 | BootProcInfo.pp_cbfr = console_per_proc_alloc(TRUE); | |
167 | BootProcInfo.rtcPop = EndOfAllTime; | |
168 | BootProcInfo.pp2ndPage = (addr64_t)&BootProcInfo; /* Initial physical address of the second page */ | |
169 | ||
170 | BootProcInfo.pms.pmsStamp = 0; /* Dummy transition time */ | |
171 | BootProcInfo.pms.pmsPop = EndOfAllTime; /* Set the pop way into the future */ | |
172 | ||
173 | BootProcInfo.pms.pmsState = pmsParked; /* Park the power stepper */ | |
174 | BootProcInfo.pms.pmsCSetCmd = pmsCInit; /* Set dummy initial hardware state */ | |
175 | ||
176 | mp = (mapping_t *)BootProcInfo.ppUMWmp; | |
177 | mp->mpFlags = 0x01000000 | mpLinkage | mpPerm | 1; | |
178 | mp->mpSpace = invalSpace; | |
179 | ||
180 | pmsInit(); /* Initialize the stepper */ | |
181 | ||
182 | thread_bootstrap(); | |
183 | ||
184 | thread = current_thread(); | |
185 | thread->machine.curctx = &thread->machine.facctx; | |
186 | thread->machine.facctx.facAct = thread; | |
187 | thread->machine.umwSpace = invalSpace; /* Initialize user memory window space to invalid */ | |
188 | thread->machine.preemption_count = 1; | |
189 | ||
190 | cpu_bootstrap(); | |
191 | cpu_init(); | |
192 | ||
193 | master_cpu = 0; | |
194 | processor_bootstrap(); | |
195 | ||
196 | timer_start(&thread->system_timer, mach_absolute_time()); | |
197 | PROCESSOR_DATA(master_processor, kernel_timer) = | |
198 | PROCESSOR_DATA(master_processor, thread_timer) = &thread->system_timer; | |
199 | ||
200 | static_memory_end = round_page(args->topOfKernelData);; | |
201 | ||
202 | PE_init_platform(FALSE, args); /* Get platform expert set up */ | |
203 | ||
204 | if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0; /* Special run without VMX? */ | |
205 | if(novmx) { /* Yeah, turn it off */ | |
206 | BootProcInfo.pf.Available &= ~pfAltivec; /* Turn off Altivec available */ | |
207 | __asm__ volatile("mtsprg 2,%0" : : "r" (BootProcInfo.pf.Available)); /* Set live value */ | |
208 | } | |
209 | ||
210 | if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0; /* If force nap not set, make 0 */ | |
211 | else { | |
212 | if(forcenap < 2) forcenap = forcenap + 1; /* Else set 1 for off, 2 for on */ | |
213 | else forcenap = 0; /* Clear for error case */ | |
214 | } | |
215 | ||
216 | if (!PE_parse_boot_arg("pmsx", &pmsExperimental)) pmsExperimental = 0; /* Check if we should start in experimental power management stepper mode */ | |
217 | if (!PE_parse_boot_arg("lcks", &LcksOpts)) LcksOpts = 0; /* Set lcks options */ | |
218 | if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags = 0; /* Set diagnostic flags */ | |
219 | if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF; /* If tracing requested, enable it */ | |
220 | ||
221 | if(PE_parse_boot_arg("ctrc", &cputrace)) { /* See if tracing is limited to a specific cpu */ | |
222 | trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) | (cputrace & 0xF); /* Limit to 4 */ | |
223 | } | |
224 | ||
225 | if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) { /* See if non-default trace buffer size */ | |
226 | #if DEBUG | |
227 | trcWork.traceSize = 32; /* Default 32 page trace table for DEBUG */ | |
228 | #else | |
229 | trcWork.traceSize = 8; /* Default 8 page trace table for RELEASE */ | |
230 | #endif | |
231 | } | |
232 | ||
233 | if(trcWork.traceSize < 1) trcWork.traceSize = 1; /* Minimum size of 1 page */ | |
234 | if(trcWork.traceSize > 256) trcWork.traceSize = 256; /* Maximum size of 256 pages */ | |
235 | trcWork.traceSize = trcWork.traceSize * 4096; /* Change page count to size */ | |
236 | ||
237 | if (!PE_parse_boot_arg("maxmem", &maxmem)) | |
238 | xmaxmem=0; | |
239 | else | |
240 | xmaxmem = (uint64_t)maxmem * (1024 * 1024); | |
241 | ||
242 | if (!PE_parse_boot_arg("wcte", &wcte)) wcte = 0; /* If write combine timer enable not supplied, make 1 */ | |
243 | else wcte = (wcte != 0); /* Force to 0 or 1 */ | |
244 | ||
245 | if (!PE_parse_boot_arg("mcklog", &mckFlags)) mckFlags = 0; /* If machine check flags not specified, clear */ | |
246 | else if(mckFlags > 1) mckFlags = 0; /* If bogus, clear */ | |
247 | ||
248 | if (!PE_parse_boot_arg("ht_shift", &hash_table_shift)) /* should we use a non-default hash table size? */ | |
249 | hash_table_shift = 0; /* no, use default size */ | |
250 | ||
251 | /* | |
252 | * VM initialization, after this we're using page tables... | |
253 | */ | |
254 | ||
255 | ppc_vm_init(xmaxmem, args); | |
256 | ||
257 | if(BootProcInfo.pf.Available & pf64Bit) { /* Are we on a 64-bit machine */ | |
258 | ||
259 | if(!wcte) { | |
260 | (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */ | |
261 | scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */ | |
262 | (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */ | |
263 | } | |
264 | ||
265 | if(PE_parse_boot_arg("mcksoft", &mcksoft)) { /* Have they supplied "machine check software recovery? */ | |
266 | newhid = BootProcInfo.pf.pfHID5; /* Get the old HID5 */ | |
267 | if(mcksoft < 2) { | |
268 | newhid &= 0xFFFFFFFFFFFFDFFFULL; /* Clear the old one */ | |
269 | newhid |= (mcksoft & 1) << 13; /* Set new value to enable machine check recovery */ | |
270 | BootProcInfo.pf.pfHID5 = newhid; /* Set the new one */ | |
271 | hid5set64(newhid); /* Set the hid for this processir */ | |
272 | } | |
273 | } | |
274 | } | |
275 | ||
276 | machine_startup(); | |
277 | } | |
278 | ||
279 | /* | |
280 | * Routine: ppc_init_cpu | |
281 | * Function: | |
282 | */ | |
283 | void | |
284 | ppc_init_cpu( | |
285 | struct per_proc_info *proc_info) | |
286 | { | |
287 | uint64_t scdata; | |
288 | ||
289 | proc_info->cpu_flags &= ~SleepState; | |
290 | ||
291 | if((BootProcInfo.pf.Available & pf64Bit) && !wcte) { /* Should we disable the store gather timer? */ | |
292 | (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */ | |
293 | scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */ | |
294 | (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */ | |
295 | } | |
296 | ||
297 | cpu_init(); | |
298 | ||
299 | slave_main(); | |
300 | } |