[apple/xnu.git] / osfmk / ppc / chud / chud_spr.h.orig

/*
 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */

#ifndef _CHUD_SPR_H_
#define _CHUD_SPR_H_

/* PPC SPRs - 32-bit and 64-bit implementations */
#define chud_ppc_srr0		26
#define chud_ppc_srr1		27
#define chud_ppc_dsisr		18
#define chud_ppc_dar		19
#define chud_ppc_dec		22
#define chud_ppc_sdr1		25
#define chud_ppc_sprg0		272
#define chud_ppc_sprg1		273
#define chud_ppc_sprg2		274
#define chud_ppc_sprg3		275
#define chud_ppc_ear		282
#define chud_ppc_tbl		284
#define chud_ppc_tbu		285
#define chud_ppc_pvr		287
#define chud_ppc_ibat0u		528
#define chud_ppc_ibat0l		529
#define chud_ppc_ibat1u		530
#define chud_ppc_ibat1l		531
#define chud_ppc_ibat2u		532
#define chud_ppc_ibat2l		533
#define chud_ppc_ibat3u		534
#define chud_ppc_ibat3l		535
#define chud_ppc_dbat0u		536
#define chud_ppc_dbat0l		537
#define chud_ppc_dbat1u		538
#define chud_ppc_dbat1l		539
#define chud_ppc_dbat2u		540
#define chud_ppc_dbat2l		541
#define chud_ppc_dbat3u		542
#define chud_ppc_dbat3l		543
#define chud_ppc_dabr		1013
#define chud_ppc_msr		10000	/* FAKE */

/* PPC SPRs - 32-bit implementations */
#define chud_ppc32_sr0		20000	/* FAKE */
#define chud_ppc32_sr1		20001	/* FAKE */
#define chud_ppc32_sr2		20002	/* FAKE */
#define chud_ppc32_sr3		20003	/* FAKE */
#define chud_ppc32_sr4		20004	/* FAKE */
#define chud_ppc32_sr5		20005	/* FAKE */
#define chud_ppc32_sr6		20006	/* FAKE */
#define chud_ppc32_sr7		20007	/* FAKE */
#define chud_ppc32_sr8		20008	/* FAKE */
#define chud_ppc32_sr9		20009	/* FAKE */
#define chud_ppc32_sr10		20010	/* FAKE */
#define chud_ppc32_sr11		20011	/* FAKE */
#define chud_ppc32_sr12		20012	/* FAKE */
#define chud_ppc32_sr13		20013	/* FAKE */
#define chud_ppc32_sr14		20014	/* FAKE */
#define chud_ppc32_sr15		20015	/* FAKE */

/* PPC SPRs - 64-bit implementations */
#define chud_ppc64_asr		280

/* PPC SPRs - 750/750CX/750CXe/750FX Specific */
#define chud_750_upmc1		937
#define chud_750_upmc2		938
#define chud_750_upmc3		941
#define chud_750_upmc4		942
#define chud_750_mmcr0		952
#define chud_750_pmc1		953
#define chud_750_pmc2		954
#define chud_750_sia		955
#define chud_750_mmcr1		956
#define chud_750_pmc3		957
#define chud_750_pmc4		958
#define chud_750_hid0		1008
#define chud_750_hid1		1009
#define chud_750_iabr		1010
#define chud_750_l2cr		1017
#define chud_750_ictc		1019
#define chud_750_thrm1		1020
#define chud_750_thrm2		1021
#define chud_750_thrm3		1022
#define chud_750fx_ibat4u	560 /* 750FX only */
#define chud_750fx_ibat4l	561 /* 750FX only */
#define chud_750fx_ibat5u	562 /* 750FX only */
#define chud_750fx_ibat5l	563 /* 750FX only */
#define chud_750fx_ibat6u	564 /* 750FX only */
#define chud_750fx_ibat6l	565 /* 750FX only */
#define chud_750fx_ibat7u	566 /* 750FX only */
#define chud_750fx_ibat7l	567 /* 750FX only */
#define chud_750fx_dbat4u	568 /* 750FX only */
#define chud_750fx_dbat4l	569 /* 750FX only */
#define chud_750fx_dbat5u	570 /* 750FX only */
#define chud_750fx_dbat5l	571 /* 750FX only */
#define chud_750fx_dbat6u	572 /* 750FX only */
#define chud_750fx_dbat6l	573 /* 750FX only */
#define chud_750fx_dbat7u	574 /* 750FX only */
#define chud_750fx_dbat7l	575 /* 750FX only */
#define chud_750fx_hid2		1016  /* 750FX only */

/* PPC SPRs - 7400/7410 Specific */
#define chud_7400_upmc1		937
#define chud_7400_upmc2		938
#define chud_7400_upmc3		941
#define chud_7400_upmc4		942
#define chud_7400_mmcr2		944
#define chud_7400_bamr		951
#define chud_7400_mmcr0		952
#define chud_7400_pmc1		953
#define chud_7400_pmc2		954
#define chud_7400_siar		955 
#define chud_7400_mmcr1		956
#define chud_7400_pmc3		957
#define chud_7400_pmc4		958
#define chud_7400_sda		959
#define chud_7400_hid0		1008
#define chud_7400_hid1		1009
#define chud_7400_iabr		1010
#define chud_7400_msscr0	1014
#define chud_7410_l2pmcr	1016 /* 7410 only */
#define chud_7400_l2cr		1017
#define chud_7400_ictc		1019
#define chud_7400_thrm1		1020
#define chud_7400_thrm2		1021
#define chud_7400_thrm3		1022
#define chud_7400_pir		1023

/* PPC SPRs - 7450/7455 Specific */
#define chud_7455_sprg4		276 /* 7455 only */
#define chud_7455_sprg5		277 /* 7455 only */
#define chud_7455_sprg6		278 /* 7455 only */
#define chud_7455_sprg7		279 /* 7455 only */
#define chud_7455_ibat4u	560 /* 7455 only */
#define chud_7455_ibat4l	561 /* 7455 only */
#define chud_7455_ibat5u	562 /* 7455 only */
#define chud_7455_ibat5l	563 /* 7455 only */
#define chud_7455_ibat6u	564 /* 7455 only */
#define chud_7455_ibat6l	565 /* 7455 only */
#define chud_7455_ibat7u	566 /* 7455 only */
#define chud_7455_ibat7l	567 /* 7455 only */
#define chud_7455_dbat4u	568 /* 7455 only */
#define chud_7455_dbat4l	569 /* 7455 only */
#define chud_7455_dbat5u	570 /* 7455 only */
#define chud_7455_dbat5l	571 /* 7455 only */
#define chud_7455_dbat6u	572 /* 7455 only */
#define chud_7455_dbat6l	573 /* 7455 only */
#define chud_7455_dbat7u	574 /* 7455 only */
#define chud_7455_dbat7l	575 /* 7455 only */
#define chud_7450_upmc5		929
#define chud_7450_upmc6		930
#define chud_7450_upmc1		937
#define chud_7450_upmc2		938
#define chud_7450_upmc3		941
#define chud_7450_upmc4		942
#define chud_7450_mmcr2		944
#define chud_7450_pmc5		945
#define chud_7450_pmc6		946
#define chud_7450_bamr		951
#define chud_7450_mmcr0		952
#define chud_7450_pmc1		953
#define chud_7450_pmc2		954
#define chud_7450_siar		955 
#define chud_7450_mmcr1		956
#define chud_7450_pmc3		957
#define chud_7450_pmc4		958
#define chud_7450_tlbmiss	980
#define chud_7450_ptehi		981
#define chud_7450_ptelo		982
#define chud_7450_l3pm		983
#define chud_7450_hid0		1008
#define chud_7450_hid1		1009
#define chud_7450_iabr		1010
#define chud_7450_ldstdb	1012
#define chud_7450_msscr0	1014
#define chud_7450_msssr0	1015
#define chud_7450_ldstcr	1016
#define chud_7450_l2cr		1017
#define chud_7450_l3cr		1018
#define chud_7450_ictc		1019
#define chud_7450_ictrl		1011
#define chud_7450_thrm1		1020
#define chud_7450_thrm2		1021
#define chud_7450_thrm3		1022
#define chud_7450_pir		1023

/* PPC SPRs - 970 Specific */
#define chud_970_vrsave		256
#define chud_970_ummcra		770
#define chud_970_upmc1		771
#define chud_970_upmc2		772
#define chud_970_upmc3		773
#define chud_970_upmc4		774
#define chud_970_upmc5		775
#define chud_970_upmc6		776
#define chud_970_upmc7		777
#define chud_970_upmc8		778
#define chud_970_ummcr0		779
#define chud_970_usiar		780
#define chud_970_usdar		781
#define chud_970_ummcr1		782
#define chud_970_uimc		783
#define chud_970_mmcra		786
#define chud_970_pmc1		787
#define chud_970_pmc2		788
#define chud_970_pmc3		789
#define chud_970_pmc4		790
#define chud_970_pmc5		791
#define chud_970_pmc6		792
#define chud_970_pmc7		793
#define chud_970_pmc8		794
#define chud_970_mmcr0		795
#define chud_970_siar		796
#define chud_970_sdar		797
#define chud_970_mmcr1		798
#define chud_970_imc		799


#endif // _CHUD_SPR_H_
Commit	Line	Data
ccc36f2f A	1	/*
	2	* Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
	11	*
	12	* This Original Code and all software distributed under the License are
	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
	19	*
	20	* @APPLE_LICENSE_HEADER_END@
	21	*/
	22
	23	#ifndef _CHUD_SPR_H_
	24	#define _CHUD_SPR_H_
	25
	26	/* PPC SPRs - 32-bit and 64-bit implementations */
	27	#define chud_ppc_srr0 26
	28	#define chud_ppc_srr1 27
	29	#define chud_ppc_dsisr 18
	30	#define chud_ppc_dar 19
	31	#define chud_ppc_dec 22
	32	#define chud_ppc_sdr1 25
	33	#define chud_ppc_sprg0 272
	34	#define chud_ppc_sprg1 273
	35	#define chud_ppc_sprg2 274
	36	#define chud_ppc_sprg3 275
	37	#define chud_ppc_ear 282
	38	#define chud_ppc_tbl 284
	39	#define chud_ppc_tbu 285
	40	#define chud_ppc_pvr 287
	41	#define chud_ppc_ibat0u 528
	42	#define chud_ppc_ibat0l 529
	43	#define chud_ppc_ibat1u 530
	44	#define chud_ppc_ibat1l 531
	45	#define chud_ppc_ibat2u 532
	46	#define chud_ppc_ibat2l 533
	47	#define chud_ppc_ibat3u 534
	48	#define chud_ppc_ibat3l 535
	49	#define chud_ppc_dbat0u 536
	50	#define chud_ppc_dbat0l 537
	51	#define chud_ppc_dbat1u 538
	52	#define chud_ppc_dbat1l 539
	53	#define chud_ppc_dbat2u 540
	54	#define chud_ppc_dbat2l 541
	55	#define chud_ppc_dbat3u 542
	56	#define chud_ppc_dbat3l 543
	57	#define chud_ppc_dabr 1013
	58	#define chud_ppc_msr 10000 /* FAKE */
	59
	60	/* PPC SPRs - 32-bit implementations */
	61	#define chud_ppc32_sr0 20000 /* FAKE */
	62	#define chud_ppc32_sr1 20001 /* FAKE */
	63	#define chud_ppc32_sr2 20002 /* FAKE */
	64	#define chud_ppc32_sr3 20003 /* FAKE */
65	#define chud_ppc32_sr4 20004 /* FAKE */
66	#define chud_ppc32_sr5 20005 /* FAKE */
67	#define chud_ppc32_sr6 20006 /* FAKE */
68	#define chud_ppc32_sr7 20007 /* FAKE */
69	#define chud_ppc32_sr8 20008 /* FAKE */
70	#define chud_ppc32_sr9 20009 /* FAKE */
71	#define chud_ppc32_sr10 20010 /* FAKE */
72	#define chud_ppc32_sr11 20011 /* FAKE */
73	#define chud_ppc32_sr12 20012 /* FAKE */
74	#define chud_ppc32_sr13 20013 /* FAKE */
75	#define chud_ppc32_sr14 20014 /* FAKE */
76	#define chud_ppc32_sr15 20015 /* FAKE */
77
78	/* PPC SPRs - 64-bit implementations */
79	#define chud_ppc64_asr 280
80
81	/* PPC SPRs - 750/750CX/750CXe/750FX Specific */
82	#define chud_750_upmc1 937
83	#define chud_750_upmc2 938
84	#define chud_750_upmc3 941
85	#define chud_750_upmc4 942
86	#define chud_750_mmcr0 952
87	#define chud_750_pmc1 953
88	#define chud_750_pmc2 954
89	#define chud_750_sia 955
90	#define chud_750_mmcr1 956
91	#define chud_750_pmc3 957
92	#define chud_750_pmc4 958
93	#define chud_750_hid0 1008
94	#define chud_750_hid1 1009
95	#define chud_750_iabr 1010
96	#define chud_750_l2cr 1017
97	#define chud_750_ictc 1019
98	#define chud_750_thrm1 1020
99	#define chud_750_thrm2 1021
100	#define chud_750_thrm3 1022
101	#define chud_750fx_ibat4u 560 /* 750FX only */
102	#define chud_750fx_ibat4l 561 /* 750FX only */
103	#define chud_750fx_ibat5u 562 /* 750FX only */
104	#define chud_750fx_ibat5l 563 /* 750FX only */
105	#define chud_750fx_ibat6u 564 /* 750FX only */
106	#define chud_750fx_ibat6l 565 /* 750FX only */
107	#define chud_750fx_ibat7u 566 /* 750FX only */
108	#define chud_750fx_ibat7l 567 /* 750FX only */
109	#define chud_750fx_dbat4u 568 /* 750FX only */
110	#define chud_750fx_dbat4l 569 /* 750FX only */
111	#define chud_750fx_dbat5u 570 /* 750FX only */
112	#define chud_750fx_dbat5l 571 /* 750FX only */
113	#define chud_750fx_dbat6u 572 /* 750FX only */
114	#define chud_750fx_dbat6l 573 /* 750FX only */
115	#define chud_750fx_dbat7u 574 /* 750FX only */
116	#define chud_750fx_dbat7l 575 /* 750FX only */
117	#define chud_750fx_hid2 1016 /* 750FX only */
118
119	/* PPC SPRs - 7400/7410 Specific */
120	#define chud_7400_upmc1 937
121	#define chud_7400_upmc2 938
122	#define chud_7400_upmc3 941
123	#define chud_7400_upmc4 942
124	#define chud_7400_mmcr2 944
125	#define chud_7400_bamr 951
126	#define chud_7400_mmcr0 952
127	#define chud_7400_pmc1 953
128	#define chud_7400_pmc2 954
129	#define chud_7400_siar 955
130	#define chud_7400_mmcr1 956
131	#define chud_7400_pmc3 957
132	#define chud_7400_pmc4 958
133	#define chud_7400_sda 959
134	#define chud_7400_hid0 1008
135	#define chud_7400_hid1 1009
136	#define chud_7400_iabr 1010
137	#define chud_7400_msscr0 1014
138	#define chud_7410_l2pmcr 1016 /* 7410 only */
139	#define chud_7400_l2cr 1017
140	#define chud_7400_ictc 1019
141	#define chud_7400_thrm1 1020
142	#define chud_7400_thrm2 1021
143	#define chud_7400_thrm3 1022
144	#define chud_7400_pir 1023
145
146	/* PPC SPRs - 7450/7455 Specific */
147	#define chud_7455_sprg4 276 /* 7455 only */
148	#define chud_7455_sprg5 277 /* 7455 only */
149	#define chud_7455_sprg6 278 /* 7455 only */
150	#define chud_7455_sprg7 279 /* 7455 only */
151	#define chud_7455_ibat4u 560 /* 7455 only */
152	#define chud_7455_ibat4l 561 /* 7455 only */
153	#define chud_7455_ibat5u 562 /* 7455 only */
154	#define chud_7455_ibat5l 563 /* 7455 only */
155	#define chud_7455_ibat6u 564 /* 7455 only */
156	#define chud_7455_ibat6l 565 /* 7455 only */
157	#define chud_7455_ibat7u 566 /* 7455 only */
158	#define chud_7455_ibat7l 567 /* 7455 only */
159	#define chud_7455_dbat4u 568 /* 7455 only */
160	#define chud_7455_dbat4l 569 /* 7455 only */
161	#define chud_7455_dbat5u 570 /* 7455 only */
162	#define chud_7455_dbat5l 571 /* 7455 only */
163	#define chud_7455_dbat6u 572 /* 7455 only */
164	#define chud_7455_dbat6l 573 /* 7455 only */
165	#define chud_7455_dbat7u 574 /* 7455 only */
166	#define chud_7455_dbat7l 575 /* 7455 only */
167	#define chud_7450_upmc5 929
168	#define chud_7450_upmc6 930
169	#define chud_7450_upmc1 937
170	#define chud_7450_upmc2 938
171	#define chud_7450_upmc3 941
172	#define chud_7450_upmc4 942
173	#define chud_7450_mmcr2 944
174	#define chud_7450_pmc5 945
175	#define chud_7450_pmc6 946
176	#define chud_7450_bamr 951
177	#define chud_7450_mmcr0 952
178	#define chud_7450_pmc1 953
179	#define chud_7450_pmc2 954
180	#define chud_7450_siar 955
181	#define chud_7450_mmcr1 956
182	#define chud_7450_pmc3 957
183	#define chud_7450_pmc4 958
184	#define chud_7450_tlbmiss 980
185	#define chud_7450_ptehi 981
186	#define chud_7450_ptelo 982
187	#define chud_7450_l3pm 983
188	#define chud_7450_hid0 1008
189	#define chud_7450_hid1 1009
190	#define chud_7450_iabr 1010
191	#define chud_7450_ldstdb 1012
192	#define chud_7450_msscr0 1014
193	#define chud_7450_msssr0 1015
194	#define chud_7450_ldstcr 1016
195	#define chud_7450_l2cr 1017
196	#define chud_7450_l3cr 1018
197	#define chud_7450_ictc 1019
198	#define chud_7450_ictrl 1011
199	#define chud_7450_thrm1 1020
200	#define chud_7450_thrm2 1021
201	#define chud_7450_thrm3 1022
202	#define chud_7450_pir 1023
203
204	/* PPC SPRs - 970 Specific */
205	#define chud_970_vrsave 256
206	#define chud_970_ummcra 770
207	#define chud_970_upmc1 771
208	#define chud_970_upmc2 772
209	#define chud_970_upmc3 773
210	#define chud_970_upmc4 774
211	#define chud_970_upmc5 775
212	#define chud_970_upmc6 776
213	#define chud_970_upmc7 777
214	#define chud_970_upmc8 778
215	#define chud_970_ummcr0 779
216	#define chud_970_usiar 780
217	#define chud_970_usdar 781
218	#define chud_970_ummcr1 782
219	#define chud_970_uimc 783
220	#define chud_970_mmcra 786
221	#define chud_970_pmc1 787
222	#define chud_970_pmc2 788
223	#define chud_970_pmc3 789
224	#define chud_970_pmc4 790
225	#define chud_970_pmc5 791
226	#define chud_970_pmc6 792
227	#define chud_970_pmc7 793
228	#define chud_970_pmc8 794
229	#define chud_970_mmcr0 795
230	#define chud_970_siar 796
231	#define chud_970_sdar 797
232	#define chud_970_mmcr1 798
233	#define chud_970_imc 799
234
235
236	#endif // _CHUD_SPR_H_