[apple/xnu.git] / osfmk / ppc / machine_routines.h

/*
 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_PPC_MACHINE_ROUTINES_H_
#define	_PPC_MACHINE_ROUTINES_H_

#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/kern_types.h>
#include <pexpert/pexpert.h>

#include <sys/cdefs.h>
#include <sys/appleapiopts.h>

__BEGIN_DECLS

/* Get Interrupts Enabled */
extern boolean_t	ml_get_interrupts_enabled(
						void);

/* Set Interrupts Enabled */
extern boolean_t	ml_set_interrupts_enabled(
						boolean_t				enable);

/* Check if running at interrupt context */
extern boolean_t	ml_at_interrupt_context(
						void);

#ifdef KERNEL_PRIVATE

/* Generate a fake interrupt */
extern void			ml_cause_interrupt(
						void);

/* Type for the IPI Hander */
typedef void (*ipi_handler_t)(void);

/* Type for the Time Base Enable function */
typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);

/* enables (or disables) the processor nap mode the function returns the previous value*/
extern boolean_t	ml_enable_nap(
						int						target_cpu,
						boolean_t				nap_enabled);

/* Put the processor to sleep */
extern void			ml_ppc_sleep(
						void);

extern void			ml_get_timebase(
						unsigned long long		*timstamp);

extern int			ml_enable_cache_level(
						int						cache_level,
						int						enable);

extern void			ml_static_mfree(
						vm_offset_t				vaddr,
						vm_size_t				size);
        
/* Init Interrupts */
extern void			ml_install_interrupt_handler(
						void					*nub,
						int						source,
						void					*target,
						IOInterruptHandler		handler,
						void					*refCon);
               
extern vm_offset_t		ml_static_ptovirt(
							vm_offset_t			paddr);

/* virtual to physical on wired pages */
extern vm_offset_t		ml_vtophys(
							vm_offset_t			vaddr);

vm_size_t ml_nofault_copy(
	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);

/* PCI config cycle probing */
extern boolean_t		ml_probe_read(
							vm_offset_t			paddr,
							unsigned int		*val);

extern boolean_t		ml_probe_read_64(
							addr64_t			paddr,
							unsigned int		*val);

/* Read physical address byte */
extern unsigned int		ml_phys_read_byte(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_byte_64(
							addr64_t			paddr);

/* Read physical address half word */
extern unsigned int		ml_phys_read_half(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_half_64(
							addr64_t			paddr);

/* Read physical address word*/
extern unsigned int		ml_phys_read(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_64(
							addr64_t			paddr);

extern unsigned int		ml_phys_read_word(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_word_64(
							addr64_t			paddr);

/* Read physical address double word */
extern unsigned long long ml_phys_read_double(
							vm_offset_t			paddr);

extern unsigned long long ml_phys_read_double_64(
							addr64_t			paddr);

/* Write physical address byte */
extern void				ml_phys_write_byte(
							vm_offset_t			paddr,
							unsigned	int		data);

extern void				ml_phys_write_byte_64(
								addr64_t		paddr,
								unsigned int	data);

/* Write physical address half word */
extern void				ml_phys_write_half(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_half_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address word */
extern void				ml_phys_write(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_64(
							addr64_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address double word */
extern void				 ml_phys_write_double(
							vm_offset_t			paddr,
							unsigned long long	data);

extern void				ml_phys_write_double_64(
							addr64_t paddr,
							unsigned long long	 data);

/* Struct for ml_processor_register */
struct ml_processor_info {
	cpu_id_t			cpu_id;
	boolean_t			boot_cpu;
	vm_offset_t			start_paddr;
	boolean_t			supports_nap;
	unsigned long			l2cr_value;
	time_base_enable_t		time_base_enable;
	uint32_t			power_mode_0;
	uint32_t			power_mode_1;
};

typedef struct ml_processor_info ml_processor_info_t;

/* Register a processor */
extern kern_return_t	ml_processor_register(
							ml_processor_info_t *ml_processor_info,
							processor_t			*processor,
							ipi_handler_t		*ipi_handler);

/* Zero bytes starting at a physical address */
extern void				bzero_phys(
							addr64_t			phys_address,
							uint32_t			length);

/* Zero bytes starting at a physical address that's uncacheable */
extern void				bzero_phys_nc(
							addr64_t			phys_address,
							uint32_t			length);

/* Bytes available on current stack */
vm_offset_t ml_stack_remaining(void);

#endif /* KERNEL_PRIVATE */

#ifdef	XNU_KERNEL_PRIVATE
#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)

/* Map memory map IO space */
extern vm_offset_t		ml_io_map(
							vm_offset_t			phys_addr, 
							vm_size_t			size);

void	ml_get_bouncepool_info(
        vm_offset_t *phys_addr,
	vm_size_t   *size);


/* boot memory allocation */
extern vm_offset_t		ml_static_malloc(
							vm_size_t			size);

#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */


#ifdef	MACH_KERNEL_PRIVATE
extern void				ml_init_interrupt(
							void);

extern void				cacheInit(
							void);

extern void				cacheDisable(
							void);

extern void				ml_init_lock_timeout(
							void);

void ml_ppc_do_sleep(void);

#endif /* MACH_KERNEL_PRIVATE */
#endif /* XNU_KERNEL_PRIVATE */

#ifdef  KERNEL_PRIVATE
extern void		ml_thread_policy(
				thread_t	thread,
				unsigned	policy_id,
				unsigned	policy_info);

#define MACHINE_GROUP				0x00000001
#define MACHINE_NETWORK_GROUP		0x10000000 
#define MACHINE_NETWORK_WORKLOOP	0x00000001
#define MACHINE_NETWORK_NETISR		0x00000002

/* Initialize the maximum number of CPUs */
extern void				ml_init_max_cpus(
							unsigned int		max_cpus);

/* Return the maximum number of CPUs set by ml_init_max_cpus() */
extern unsigned int		ml_get_max_cpus(
							void);

extern void			ml_cpu_up(void);
extern void			ml_cpu_down(void);

/* Struct for ml_cpu_get_info */
struct ml_cpu_info {
	unsigned long		vector_unit;
	unsigned long		cache_line_size;
	unsigned long		l1_icache_size;
	unsigned long		l1_dcache_size;
	unsigned long		l2_settings;
	unsigned long		l2_cache_size;
	unsigned long		l3_settings;
	unsigned long		l3_cache_size;
};

typedef struct ml_cpu_info ml_cpu_info_t;

/* Get processor info */
extern void				ml_cpu_get_info(
							ml_cpu_info_t		*ml_cpu_info);

extern void				ml_set_processor_speed(
							unsigned long		speed);
extern void				ml_set_processor_speed_slave(
							unsigned long		speed);
extern void				ml_set_processor_speed_dpll(
							unsigned long		speed);
extern void				ml_set_processor_speed_dfs(
							unsigned long		speed);
extern void				ml_set_processor_speed_powertune(
							unsigned long		speed);

extern void				ml_set_processor_voltage(
							unsigned long		voltage);

extern unsigned int		ml_scom_write(
							uint32_t			reg,
							uint64_t			data);

extern unsigned int		ml_scom_read(
							uint32_t			reg,
							uint64_t			*data);

extern uint32_t 		ml_hdec_ratio(void);

extern int boffSettingsInit;

#endif /* KERNEL_PRIVATE */

__END_DECLS

#endif /* _PPC_MACHINE_ROUTINES_H_ */
Commit	Line	Data
1c79356b	1	/*
2d21ac55	2	* Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#ifndef _PPC_MACHINE_ROUTINES_H_
	33	#define _PPC_MACHINE_ROUTINES_H_
	34
	35	#include <mach/mach_types.h>
	36	#include <mach/boolean.h>
	37	#include <kern/kern_types.h>
	38	#include <pexpert/pexpert.h>
	39
b0d623f7 A	40	#include <sys/cdefs.h>
	41	#include <sys/appleapiopts.h>
	42
	43	__BEGIN_DECLS
	44
9bccf70c	45	/* Get Interrupts Enabled */
91447636 A	46	extern boolean_t ml_get_interrupts_enabled(
91447636 A	47	void);
1c79356b	48
9bccf70c	49	/* Set Interrupts Enabled */
91447636 A	50	extern boolean_t ml_set_interrupts_enabled(
91447636 A	51	boolean_t enable);
1c79356b	52
9bccf70c	53	/* Check if running at interrupt context */
91447636 A	54	extern boolean_t ml_at_interrupt_context(
	55	void);
	56
	57	#ifdef KERNEL_PRIVATE
1c79356b	58
9bccf70c	59	/* Generate a fake interrupt */
91447636 A	60	extern void ml_cause_interrupt(
91447636 A	61	void);
9bccf70c A	62
	63	/* Type for the IPI Hander */
	64	typedef void (*ipi_handler_t)(void);
	65
	66	/* Type for the Time Base Enable function */
	67	typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
	68
	69	/* enables (or disables) the processor nap mode the function returns the previous value*/
91447636 A	70	extern boolean_t ml_enable_nap(
	71	int target_cpu,
	72	boolean_t nap_enabled);
9bccf70c A	73
9bccf70c A	74	/* Put the processor to sleep */
91447636 A	75	extern void ml_ppc_sleep(
	76	void);
	77
	78	extern void ml_get_timebase(
	79	unsigned long long *timstamp);
9bccf70c	80
91447636 A	81	extern int ml_enable_cache_level(
	82	int cache_level,
	83	int enable);
1c79356b	84
91447636 A	85	extern void ml_static_mfree(
	86	vm_offset_t vaddr,
	87	vm_size_t size);
1c79356b	88
1c79356b	89	/* Init Interrupts */
91447636 A	90	extern void ml_install_interrupt_handler(
	91	void *nub,
	92	int source,
	93	void *target,
	94	IOInterruptHandler handler,
	95	void *refCon);
1c79356b	96
91447636 A	97	extern vm_offset_t ml_static_ptovirt(
91447636 A	98	vm_offset_t paddr);
1c79356b	99
9bccf70c	100	/* virtual to physical on wired pages */
91447636 A	101	extern vm_offset_t ml_vtophys(
91447636 A	102	vm_offset_t vaddr);
1c79356b	103
2d21ac55 A	104	vm_size_t ml_nofault_copy(
	105	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);
	106
1c79356b	107	/* PCI config cycle probing */
91447636 A	108	extern boolean_t ml_probe_read(
	109	vm_offset_t paddr,
	110	unsigned int *val);
	111
	112	extern boolean_t ml_probe_read_64(
	113	addr64_t paddr,
	114	unsigned int *val);
1c79356b A	115
1c79356b A	116	/* Read physical address byte */
91447636 A	117	extern unsigned int ml_phys_read_byte(
	118	vm_offset_t paddr);
	119
	120	extern unsigned int ml_phys_read_byte_64(
	121	addr64_t paddr);
55e303ae A	122
55e303ae A	123	/* Read physical address half word */
91447636 A	124	extern unsigned int ml_phys_read_half(
	125	vm_offset_t paddr);
	126
	127	extern unsigned int ml_phys_read_half_64(
	128	addr64_t paddr);
1c79356b	129
55e303ae	130	/* Read physical address word*/
91447636 A	131	extern unsigned int ml_phys_read(
	132	vm_offset_t paddr);
	133
	134	extern unsigned int ml_phys_read_64(
	135	addr64_t paddr);
	136
	137	extern unsigned int ml_phys_read_word(
	138	vm_offset_t paddr);
	139
	140	extern unsigned int ml_phys_read_word_64(
	141	addr64_t paddr);
55e303ae A	142
55e303ae A	143	/* Read physical address double word */
91447636 A	144	extern unsigned long long ml_phys_read_double(
	145	vm_offset_t paddr);
	146
	147	extern unsigned long long ml_phys_read_double_64(
	148	addr64_t paddr);
1c79356b A	149
1c79356b A	150	/* Write physical address byte */
91447636 A	151	extern void ml_phys_write_byte(
	152	vm_offset_t paddr,
	153	unsigned int data);
	154
	155	extern void ml_phys_write_byte_64(
	156	addr64_t paddr,
	157	unsigned int data);
1c79356b	158
55e303ae	159	/* Write physical address half word */
91447636 A	160	extern void ml_phys_write_half(
	161	vm_offset_t paddr,
	162	unsigned int data);
	163
	164	extern void ml_phys_write_half_64(
	165	addr64_t paddr,
	166	unsigned int data);
55e303ae A	167
55e303ae A	168	/* Write physical address word */
91447636 A	169	extern void ml_phys_write(
	170	vm_offset_t paddr,
	171	unsigned int data);
	172
	173	extern void ml_phys_write_64(
	174	addr64_t paddr,
	175	unsigned int data);
	176
	177	extern void ml_phys_write_word(
	178	vm_offset_t paddr,
	179	unsigned int data);
	180
	181	extern void ml_phys_write_word_64(
	182	addr64_t paddr,
	183	unsigned int data);
55e303ae A	184
55e303ae A	185	/* Write physical address double word */
91447636 A	186	extern void ml_phys_write_double(
	187	vm_offset_t paddr,
	188	unsigned long long data);
	189
	190	extern void ml_phys_write_double_64(
	191	addr64_t paddr,
	192	unsigned long long data);
1c79356b	193
1c79356b	194	/* Struct for ml_processor_register */
55e303ae	195	struct ml_processor_info {
1c79356b A	196	cpu_id_t cpu_id;
	197	boolean_t boot_cpu;
	198	vm_offset_t start_paddr;
	199	boolean_t supports_nap;
91447636 A	200	unsigned long l2cr_value;
91447636 A	201	time_base_enable_t time_base_enable;
483a1d10 A	202	uint32_t power_mode_0;
483a1d10 A	203	uint32_t power_mode_1;
1c79356b A	204	};
1c79356b A	205
55e303ae	206	typedef struct ml_processor_info ml_processor_info_t;
1c79356b A	207
1c79356b A	208	/* Register a processor */
91447636 A	209	extern kern_return_t ml_processor_register(
	210	ml_processor_info_t *ml_processor_info,
	211	processor_t *processor,
	212	ipi_handler_t *ipi_handler);
1c79356b	213
55e303ae	214	/* Zero bytes starting at a physical address */
91447636 A	215	extern void bzero_phys(
	216	addr64_t phys_address,
	217	uint32_t length);
55e303ae	218
2d21ac55 A	219	/* Zero bytes starting at a physical address that's uncacheable */
	220	extern void bzero_phys_nc(
	221	addr64_t phys_address,
	222	uint32_t length);
	223
b0d623f7 A	224	/* Bytes available on current stack */
	225	vm_offset_t ml_stack_remaining(void);
	226
91447636	227	#endif /* KERNEL_PRIVATE */
1c79356b	228
91447636	229	#ifdef XNU_KERNEL_PRIVATE
9bccf70c	230	#if defined(PEXPERT_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
1c79356b	231
9bccf70c	232	/* Map memory map IO space */
91447636 A	233	extern vm_offset_t ml_io_map(
	234	vm_offset_t phys_addr,
	235	vm_size_t size);
1c79356b	236
0c530ab8 A	237	void ml_get_bouncepool_info(
	238	vm_offset_t *phys_addr,
	239	vm_size_t *size);
	240
	241
9bccf70c	242	/* boot memory allocation */
91447636 A	243	extern vm_offset_t ml_static_malloc(
91447636 A	244	vm_size_t size);
1c79356b	245
9bccf70c	246	#endif /* PEXPERT_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
1c79356b	247
1c79356b	248
91447636 A	249	#ifdef MACH_KERNEL_PRIVATE
	250	extern void ml_init_interrupt(
	251	void);
1c79356b	252
91447636 A	253	extern void cacheInit(
91447636 A	254	void);
1c79356b	255
91447636 A	256	extern void cacheDisable(
91447636 A	257	void);
1c79356b	258
91447636 A	259	extern void ml_init_lock_timeout(
91447636 A	260	void);
1c79356b	261
91447636	262	void ml_ppc_do_sleep(void);
ab86ba33	263
9bccf70c	264	#endif /* MACH_KERNEL_PRIVATE */
91447636	265	#endif /* XNU_KERNEL_PRIVATE */
9bccf70c	266
91447636 A	267	#ifdef KERNEL_PRIVATE
	268	extern void ml_thread_policy(
	269	thread_t thread,
	270	unsigned policy_id,
	271	unsigned policy_info);
9bccf70c A	272
	273	#define MACHINE_GROUP 0x00000001
	274	#define MACHINE_NETWORK_GROUP 0x10000000
	275	#define MACHINE_NETWORK_WORKLOOP 0x00000001
	276	#define MACHINE_NETWORK_NETISR 0x00000002
	277
43866e37	278	/* Initialize the maximum number of CPUs */
91447636 A	279	extern void ml_init_max_cpus(
91447636 A	280	unsigned int max_cpus);
43866e37 A	281
43866e37 A	282	/* Return the maximum number of CPUs set by ml_init_max_cpus() */
91447636 A	283	extern unsigned int ml_get_max_cpus(
91447636 A	284	void);
43866e37	285
91447636 A	286	extern void ml_cpu_up(void);
91447636 A	287	extern void ml_cpu_down(void);
43866e37 A	288
	289	/* Struct for ml_cpu_get_info */
	290	struct ml_cpu_info {
9bccf70c A	291	unsigned long vector_unit;
	292	unsigned long cache_line_size;
	293	unsigned long l1_icache_size;
	294	unsigned long l1_dcache_size;
	295	unsigned long l2_settings;
	296	unsigned long l2_cache_size;
	297	unsigned long l3_settings;
	298	unsigned long l3_cache_size;
	299	};
	300
43866e37	301	typedef struct ml_cpu_info ml_cpu_info_t;
9bccf70c A	302
9bccf70c A	303	/* Get processor info */
91447636 A	304	extern void ml_cpu_get_info(
	305	ml_cpu_info_t *ml_cpu_info);
	306
	307	extern void ml_set_processor_speed(
	308	unsigned long speed);
	309	extern void ml_set_processor_speed_slave(
	310	unsigned long speed);
	311	extern void ml_set_processor_speed_dpll(
	312	unsigned long speed);
	313	extern void ml_set_processor_speed_dfs(
	314	unsigned long speed);
	315	extern void ml_set_processor_speed_powertune(
	316	unsigned long speed);
	317
	318	extern void ml_set_processor_voltage(
	319	unsigned long voltage);
	320
	321	extern unsigned int ml_scom_write(
	322	uint32_t reg,
	323	uint64_t data);
	324
	325	extern unsigned int ml_scom_read(
	326	uint32_t reg,
	327	uint64_t *data);
	328
	329	extern uint32_t ml_hdec_ratio(void);
	330
2d21ac55 A	331	extern int boffSettingsInit;
2d21ac55 A	332
91447636	333	#endif /* KERNEL_PRIVATE */
9bccf70c	334
b0d623f7 A	335	__END_DECLS
b0d623f7 A	336
1c79356b	337	#endif /* _PPC_MACHINE_ROUTINES_H_ */