[apple/xnu.git] / osfmk / ppc / machine_routines.h

/*
 * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_PPC_MACHINE_ROUTINES_H_
#define	_PPC_MACHINE_ROUTINES_H_

#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/kern_types.h>
#include <pexpert/pexpert.h>

/* Get Interrupts Enabled */
extern boolean_t	ml_get_interrupts_enabled(
						void);

/* Set Interrupts Enabled */
extern boolean_t	ml_set_interrupts_enabled(
						boolean_t				enable);

/* Check if running at interrupt context */
extern boolean_t	ml_at_interrupt_context(
						void);

#ifdef KERNEL_PRIVATE

/* Generate a fake interrupt */
extern void			ml_cause_interrupt(
						void);

/* Type for the IPI Hander */
typedef void (*ipi_handler_t)(void);

/* Type for the Time Base Enable function */
typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);

/* enables (or disables) the processor nap mode the function returns the previous value*/
extern boolean_t	ml_enable_nap(
						int						target_cpu,
						boolean_t				nap_enabled);

/* Put the processor to sleep */
extern void			ml_ppc_sleep(
						void);

extern void			ml_get_timebase(
						unsigned long long		*timstamp);

extern int			ml_enable_cache_level(
						int						cache_level,
						int						enable);

extern void			ml_static_mfree(
						vm_offset_t				vaddr,
						vm_size_t				size);
        
/* Init Interrupts */
extern void			ml_install_interrupt_handler(
						void					*nub,
						int						source,
						void					*target,
						IOInterruptHandler		handler,
						void					*refCon);
               
extern vm_offset_t		ml_static_ptovirt(
							vm_offset_t			paddr);

/* virtual to physical on wired pages */
extern vm_offset_t		ml_vtophys(
							vm_offset_t			vaddr);

/* PCI config cycle probing */
extern boolean_t		ml_probe_read(
							vm_offset_t			paddr,
							unsigned int		*val);

extern boolean_t		ml_probe_read_64(
							addr64_t			paddr,
							unsigned int		*val);

/* Read physical address byte */
extern unsigned int		ml_phys_read_byte(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_byte_64(
							addr64_t			paddr);

/* Read physical address half word */
extern unsigned int		ml_phys_read_half(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_half_64(
							addr64_t			paddr);

/* Read physical address word*/
extern unsigned int		ml_phys_read(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_64(
							addr64_t			paddr);

extern unsigned int		ml_phys_read_word(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_word_64(
							addr64_t			paddr);

/* Read physical address double word */
extern unsigned long long ml_phys_read_double(
							vm_offset_t			paddr);

extern unsigned long long ml_phys_read_double_64(
							addr64_t			paddr);

/* Write physical address byte */
extern void				ml_phys_write_byte(
							vm_offset_t			paddr,
							unsigned	int		data);

extern void				ml_phys_write_byte_64(
								addr64_t		paddr,
								unsigned int	data);

/* Write physical address half word */
extern void				ml_phys_write_half(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_half_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address word */
extern void				ml_phys_write(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_64(
							addr64_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address double word */
extern void				 ml_phys_write_double(
							vm_offset_t			paddr,
							unsigned long long	data);

extern void				ml_phys_write_double_64(
							addr64_t paddr,
							unsigned long long	 data);

/* Struct for ml_processor_register */
struct ml_processor_info {
	cpu_id_t			cpu_id;
	boolean_t			boot_cpu;
	vm_offset_t			start_paddr;
	boolean_t			supports_nap;
	unsigned long			l2cr_value;
	time_base_enable_t		time_base_enable;
	uint32_t			power_mode_0;
	uint32_t			power_mode_1;
};

typedef struct ml_processor_info ml_processor_info_t;

/* Register a processor */
extern kern_return_t	ml_processor_register(
							ml_processor_info_t *ml_processor_info,
							processor_t			*processor,
							ipi_handler_t		*ipi_handler);

/* Zero bytes starting at a physical address */
extern void				bzero_phys(
							addr64_t			phys_address,
							uint32_t			length);

#endif /* KERNEL_PRIVATE */

#ifdef	XNU_KERNEL_PRIVATE
#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)

/* Map memory map IO space */
extern vm_offset_t		ml_io_map(
							vm_offset_t			phys_addr, 
							vm_size_t			size);

void	ml_get_bouncepool_info(
        vm_offset_t *phys_addr,
	vm_size_t   *size);


/* boot memory allocation */
extern vm_offset_t		ml_static_malloc(
							vm_size_t			size);

#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */

#if	defined(BSD_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)

extern int				set_be_bit(
							void);

extern int				clr_be_bit(
							void);

extern int				be_tracing(
							void);

#endif /* BSD_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */

#ifdef	MACH_KERNEL_PRIVATE
extern void				ml_init_interrupt(
							void);

extern void				cacheInit(
							void);

extern void				cacheDisable(
							void);

extern void				ml_init_lock_timeout(
							void);

void ml_ppc_do_sleep(void);

#endif /* MACH_KERNEL_PRIVATE */
#endif /* XNU_KERNEL_PRIVATE */

#ifdef  KERNEL_PRIVATE
extern void		ml_thread_policy(
				thread_t	thread,
				unsigned	policy_id,
				unsigned	policy_info);

#define MACHINE_GROUP				0x00000001
#define MACHINE_NETWORK_GROUP		0x10000000 
#define MACHINE_NETWORK_WORKLOOP	0x00000001
#define MACHINE_NETWORK_NETISR		0x00000002

/* Initialize the maximum number of CPUs */
extern void				ml_init_max_cpus(
							unsigned int		max_cpus);

/* Return the maximum number of CPUs set by ml_init_max_cpus() */
extern unsigned int		ml_get_max_cpus(
							void);

extern void			ml_cpu_up(void);
extern void			ml_cpu_down(void);

/* Struct for ml_cpu_get_info */
struct ml_cpu_info {
	unsigned long		vector_unit;
	unsigned long		cache_line_size;
	unsigned long		l1_icache_size;
	unsigned long		l1_dcache_size;
	unsigned long		l2_settings;
	unsigned long		l2_cache_size;
	unsigned long		l3_settings;
	unsigned long		l3_cache_size;
};

typedef struct ml_cpu_info ml_cpu_info_t;

/* Get processor info */
extern void				ml_cpu_get_info(
							ml_cpu_info_t		*ml_cpu_info);

extern void				ml_set_processor_speed(
							unsigned long		speed);
extern void				ml_set_processor_speed_slave(
							unsigned long		speed);
extern void				ml_set_processor_speed_dpll(
							unsigned long		speed);
extern void				ml_set_processor_speed_dfs(
							unsigned long		speed);
extern void				ml_set_processor_speed_powertune(
							unsigned long		speed);

extern void				ml_set_processor_voltage(
							unsigned long		voltage);

extern unsigned int		ml_scom_write(
							uint32_t			reg,
							uint64_t			data);

extern unsigned int		ml_scom_read(
							uint32_t			reg,
							uint64_t			*data);

extern uint32_t 		ml_hdec_ratio(void);

#endif /* KERNEL_PRIVATE */

#endif /* _PPC_MACHINE_ROUTINES_H_ */
Commit	Line	Data
1c79356b	1	/*
91447636	2	* Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
6601e61a	4	* @APPLE_LICENSE_HEADER_START@
1c79356b	5	*
6601e61a A	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
8f6c56a5	11	*
6601e61a A	12	* This Original Code and all software distributed under the License are
6601e61a A	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
6601e61a A	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
8f6c56a5	19	*
6601e61a	20	* @APPLE_LICENSE_HEADER_END@
1c79356b A	21	*/
	22	/*
	23	* @OSF_COPYRIGHT@
	24	*/
	25
	26	#ifndef _PPC_MACHINE_ROUTINES_H_
	27	#define _PPC_MACHINE_ROUTINES_H_
	28
	29	#include <mach/mach_types.h>
	30	#include <mach/boolean.h>
	31	#include <kern/kern_types.h>
	32	#include <pexpert/pexpert.h>
	33
9bccf70c	34	/* Get Interrupts Enabled */
91447636 A	35	extern boolean_t ml_get_interrupts_enabled(
91447636 A	36	void);
1c79356b	37
9bccf70c	38	/* Set Interrupts Enabled */
91447636 A	39	extern boolean_t ml_set_interrupts_enabled(
91447636 A	40	boolean_t enable);
1c79356b	41
9bccf70c	42	/* Check if running at interrupt context */
91447636 A	43	extern boolean_t ml_at_interrupt_context(
	44	void);
	45
	46	#ifdef KERNEL_PRIVATE
1c79356b	47
9bccf70c	48	/* Generate a fake interrupt */
91447636 A	49	extern void ml_cause_interrupt(
91447636 A	50	void);
9bccf70c A	51
	52	/* Type for the IPI Hander */
	53	typedef void (*ipi_handler_t)(void);
	54
	55	/* Type for the Time Base Enable function */
	56	typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
	57
	58	/* enables (or disables) the processor nap mode the function returns the previous value*/
91447636 A	59	extern boolean_t ml_enable_nap(
	60	int target_cpu,
	61	boolean_t nap_enabled);
9bccf70c A	62
9bccf70c A	63	/* Put the processor to sleep */
91447636 A	64	extern void ml_ppc_sleep(
	65	void);
	66
	67	extern void ml_get_timebase(
	68	unsigned long long *timstamp);
9bccf70c	69
91447636 A	70	extern int ml_enable_cache_level(
	71	int cache_level,
	72	int enable);
1c79356b	73
91447636 A	74	extern void ml_static_mfree(
	75	vm_offset_t vaddr,
	76	vm_size_t size);
1c79356b	77
1c79356b	78	/* Init Interrupts */
91447636 A	79	extern void ml_install_interrupt_handler(
	80	void *nub,
	81	int source,
	82	void *target,
	83	IOInterruptHandler handler,
	84	void *refCon);
1c79356b	85
91447636 A	86	extern vm_offset_t ml_static_ptovirt(
91447636 A	87	vm_offset_t paddr);
1c79356b	88
9bccf70c	89	/* virtual to physical on wired pages */
91447636 A	90	extern vm_offset_t ml_vtophys(
91447636 A	91	vm_offset_t vaddr);
1c79356b A	92
1c79356b A	93	/* PCI config cycle probing */
91447636 A	94	extern boolean_t ml_probe_read(
	95	vm_offset_t paddr,
	96	unsigned int *val);
	97
	98	extern boolean_t ml_probe_read_64(
	99	addr64_t paddr,
	100	unsigned int *val);
1c79356b A	101
1c79356b A	102	/* Read physical address byte */
91447636 A	103	extern unsigned int ml_phys_read_byte(
	104	vm_offset_t paddr);
	105
	106	extern unsigned int ml_phys_read_byte_64(
	107	addr64_t paddr);
55e303ae A	108
55e303ae A	109	/* Read physical address half word */
91447636 A	110	extern unsigned int ml_phys_read_half(
	111	vm_offset_t paddr);
	112
	113	extern unsigned int ml_phys_read_half_64(
	114	addr64_t paddr);
1c79356b	115
55e303ae	116	/* Read physical address word*/
91447636 A	117	extern unsigned int ml_phys_read(
	118	vm_offset_t paddr);
	119
	120	extern unsigned int ml_phys_read_64(
	121	addr64_t paddr);
	122
	123	extern unsigned int ml_phys_read_word(
	124	vm_offset_t paddr);
	125
	126	extern unsigned int ml_phys_read_word_64(
	127	addr64_t paddr);
55e303ae A	128
55e303ae A	129	/* Read physical address double word */
91447636 A	130	extern unsigned long long ml_phys_read_double(
	131	vm_offset_t paddr);
	132
	133	extern unsigned long long ml_phys_read_double_64(
	134	addr64_t paddr);
1c79356b A	135
1c79356b A	136	/* Write physical address byte */
91447636 A	137	extern void ml_phys_write_byte(
	138	vm_offset_t paddr,
	139	unsigned int data);
	140
	141	extern void ml_phys_write_byte_64(
	142	addr64_t paddr,
	143	unsigned int data);
1c79356b	144
55e303ae	145	/* Write physical address half word */
91447636 A	146	extern void ml_phys_write_half(
	147	vm_offset_t paddr,
	148	unsigned int data);
	149
	150	extern void ml_phys_write_half_64(
	151	addr64_t paddr,
	152	unsigned int data);
55e303ae A	153
55e303ae A	154	/* Write physical address word */
91447636 A	155	extern void ml_phys_write(
	156	vm_offset_t paddr,
	157	unsigned int data);
	158
	159	extern void ml_phys_write_64(
	160	addr64_t paddr,
	161	unsigned int data);
	162
	163	extern void ml_phys_write_word(
	164	vm_offset_t paddr,
	165	unsigned int data);
	166
	167	extern void ml_phys_write_word_64(
	168	addr64_t paddr,
	169	unsigned int data);
55e303ae A	170
55e303ae A	171	/* Write physical address double word */
91447636 A	172	extern void ml_phys_write_double(
	173	vm_offset_t paddr,
	174	unsigned long long data);
	175
	176	extern void ml_phys_write_double_64(
	177	addr64_t paddr,
	178	unsigned long long data);
1c79356b	179
1c79356b	180	/* Struct for ml_processor_register */
55e303ae	181	struct ml_processor_info {
1c79356b A	182	cpu_id_t cpu_id;
	183	boolean_t boot_cpu;
	184	vm_offset_t start_paddr;
	185	boolean_t supports_nap;
91447636 A	186	unsigned long l2cr_value;
91447636 A	187	time_base_enable_t time_base_enable;
483a1d10 A	188	uint32_t power_mode_0;
483a1d10 A	189	uint32_t power_mode_1;
1c79356b A	190	};
1c79356b A	191
55e303ae	192	typedef struct ml_processor_info ml_processor_info_t;
1c79356b A	193
1c79356b A	194	/* Register a processor */
91447636 A	195	extern kern_return_t ml_processor_register(
	196	ml_processor_info_t *ml_processor_info,
	197	processor_t *processor,
	198	ipi_handler_t *ipi_handler);
1c79356b	199
55e303ae	200	/* Zero bytes starting at a physical address */
91447636 A	201	extern void bzero_phys(
	202	addr64_t phys_address,
	203	uint32_t length);
55e303ae	204
91447636	205	#endif /* KERNEL_PRIVATE */
1c79356b	206
91447636	207	#ifdef XNU_KERNEL_PRIVATE
9bccf70c	208	#if defined(PEXPERT_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
1c79356b	209
9bccf70c	210	/* Map memory map IO space */
91447636 A	211	extern vm_offset_t ml_io_map(
	212	vm_offset_t phys_addr,
	213	vm_size_t size);
1c79356b	214
0c530ab8 A	215	void ml_get_bouncepool_info(
	216	vm_offset_t *phys_addr,
	217	vm_size_t *size);
	218
	219
9bccf70c	220	/* boot memory allocation */
91447636 A	221	extern vm_offset_t ml_static_malloc(
91447636 A	222	vm_size_t size);
1c79356b	223
9bccf70c	224	#endif /* PEXPERT_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
1c79356b	225
91447636	226	#if defined(BSD_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
9bccf70c	227
91447636 A	228	extern int set_be_bit(
91447636 A	229	void);
9bccf70c	230
91447636 A	231	extern int clr_be_bit(
91447636 A	232	void);
9bccf70c	233
91447636 A	234	extern int be_tracing(
91447636 A	235	void);
9bccf70c	236
91447636	237	#endif /* BSD_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
1c79356b	238
91447636 A	239	#ifdef MACH_KERNEL_PRIVATE
	240	extern void ml_init_interrupt(
	241	void);
1c79356b	242
91447636 A	243	extern void cacheInit(
91447636 A	244	void);
1c79356b	245
91447636 A	246	extern void cacheDisable(
91447636 A	247	void);
1c79356b	248
91447636 A	249	extern void ml_init_lock_timeout(
91447636 A	250	void);
1c79356b	251
91447636	252	void ml_ppc_do_sleep(void);
ab86ba33	253
9bccf70c	254	#endif /* MACH_KERNEL_PRIVATE */
91447636	255	#endif /* XNU_KERNEL_PRIVATE */
9bccf70c	256
91447636 A	257	#ifdef KERNEL_PRIVATE
	258	extern void ml_thread_policy(
	259	thread_t thread,
	260	unsigned policy_id,
	261	unsigned policy_info);
9bccf70c A	262
	263	#define MACHINE_GROUP 0x00000001
	264	#define MACHINE_NETWORK_GROUP 0x10000000
	265	#define MACHINE_NETWORK_WORKLOOP 0x00000001
	266	#define MACHINE_NETWORK_NETISR 0x00000002
	267
43866e37	268	/* Initialize the maximum number of CPUs */
91447636 A	269	extern void ml_init_max_cpus(
91447636 A	270	unsigned int max_cpus);
43866e37 A	271
43866e37 A	272	/* Return the maximum number of CPUs set by ml_init_max_cpus() */
91447636 A	273	extern unsigned int ml_get_max_cpus(
91447636 A	274	void);
43866e37	275
91447636 A	276	extern void ml_cpu_up(void);
91447636 A	277	extern void ml_cpu_down(void);
43866e37 A	278
	279	/* Struct for ml_cpu_get_info */
	280	struct ml_cpu_info {
9bccf70c A	281	unsigned long vector_unit;
	282	unsigned long cache_line_size;
	283	unsigned long l1_icache_size;
	284	unsigned long l1_dcache_size;
	285	unsigned long l2_settings;
	286	unsigned long l2_cache_size;
	287	unsigned long l3_settings;
	288	unsigned long l3_cache_size;
	289	};
	290
43866e37	291	typedef struct ml_cpu_info ml_cpu_info_t;
9bccf70c A	292
9bccf70c A	293	/* Get processor info */
91447636 A	294	extern void ml_cpu_get_info(
	295	ml_cpu_info_t *ml_cpu_info);
	296
	297	extern void ml_set_processor_speed(
	298	unsigned long speed);
	299	extern void ml_set_processor_speed_slave(
	300	unsigned long speed);
	301	extern void ml_set_processor_speed_dpll(
	302	unsigned long speed);
	303	extern void ml_set_processor_speed_dfs(
	304	unsigned long speed);
	305	extern void ml_set_processor_speed_powertune(
	306	unsigned long speed);
	307
	308	extern void ml_set_processor_voltage(
	309	unsigned long voltage);
	310
	311	extern unsigned int ml_scom_write(
	312	uint32_t reg,
	313	uint64_t data);
	314
	315	extern unsigned int ml_scom_read(
	316	uint32_t reg,
	317	uint64_t *data);
	318
	319	extern uint32_t ml_hdec_ratio(void);
	320
	321	#endif /* KERNEL_PRIVATE */
9bccf70c	322
1c79356b	323	#endif /* _PPC_MACHINE_ROUTINES_H_ */