[apple/xnu.git] / osfmk / mach / machine.h

/*
 * Copyright (c) 2007-2016 Apple, Inc. All rights reserved.
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 *
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 *
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 *
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * Mach Operating System
 * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */
/*	File:	machine.h
 *	Author:	Avadis Tevanian, Jr.
 *	Date:	1986
 *
 *	Machine independent machine abstraction.
 */

#ifndef _MACH_MACHINE_H_
#define _MACH_MACHINE_H_

#ifndef __ASSEMBLER__

#include <stdint.h>
#include <mach/machine/vm_types.h>
#include <mach/boolean.h>

typedef integer_t       cpu_type_t;
typedef integer_t       cpu_subtype_t;
typedef integer_t       cpu_threadtype_t;

#define CPU_STATE_MAX           4

#define CPU_STATE_USER          0
#define CPU_STATE_SYSTEM        1
#define CPU_STATE_IDLE          2
#define CPU_STATE_NICE          3

#ifdef  KERNEL_PRIVATE

#include <sys/cdefs.h>

__BEGIN_DECLS
cpu_type_t                      cpu_type(void);

cpu_subtype_t           cpu_subtype(void);

cpu_threadtype_t        cpu_threadtype(void);
__END_DECLS

#ifdef  MACH_KERNEL_PRIVATE

struct machine_info {
	integer_t       major_version;          /* kernel major version id */
	integer_t       minor_version;          /* kernel minor version id */
	integer_t       max_cpus;                       /* max number of CPUs possible */
	uint32_t        memory_size;            /* size of memory in bytes, capped at 2 GB */
	uint64_t        max_mem;                        /* actual size of physical memory */
	uint32_t        physical_cpu;           /* number of physical CPUs now available */
	integer_t       physical_cpu_max;       /* max number of physical CPUs possible */
	uint32_t        logical_cpu;            /* number of logical cpu now available */
	integer_t       logical_cpu_max;        /* max number of physical CPUs possible */
};

typedef struct machine_info     *machine_info_t;
typedef struct machine_info     machine_info_data_t;

extern struct machine_info      machine_info;

__BEGIN_DECLS
cpu_type_t                      slot_type(
	int             slot_num);

cpu_subtype_t           slot_subtype(
	int             slot_num);

cpu_threadtype_t        slot_threadtype(
	int             slot_num);
__END_DECLS

#endif  /* MACH_KERNEL_PRIVATE */
#endif  /* KERNEL_PRIVATE */


/*
 * Capability bits used in the definition of cpu_type.
 */
#define CPU_ARCH_MASK           0xff000000      /* mask for architecture bits */
#define CPU_ARCH_ABI64          0x01000000      /* 64 bit ABI */
#define CPU_ARCH_ABI64_32       0x02000000      /* ABI for 64-bit hardware with 32-bit types; LP32 */

/*
 *	Machine types known by all.
 */

#define CPU_TYPE_ANY            ((cpu_type_t) -1)

#define CPU_TYPE_VAX            ((cpu_type_t) 1)
/* skip				((cpu_type_t) 2)	*/
/* skip				((cpu_type_t) 3)	*/
/* skip				((cpu_type_t) 4)	*/
/* skip				((cpu_type_t) 5)	*/
#define CPU_TYPE_MC680x0        ((cpu_type_t) 6)
#define CPU_TYPE_X86            ((cpu_type_t) 7)
#define CPU_TYPE_I386           CPU_TYPE_X86            /* compatibility */
#define CPU_TYPE_X86_64         (CPU_TYPE_X86 | CPU_ARCH_ABI64)

/* skip CPU_TYPE_MIPS		((cpu_type_t) 8)	*/
/* skip                         ((cpu_type_t) 9)	*/
#define CPU_TYPE_MC98000        ((cpu_type_t) 10)
#define CPU_TYPE_HPPA           ((cpu_type_t) 11)
#define CPU_TYPE_ARM            ((cpu_type_t) 12)
#define CPU_TYPE_ARM64          (CPU_TYPE_ARM | CPU_ARCH_ABI64)
#define CPU_TYPE_ARM64_32       (CPU_TYPE_ARM | CPU_ARCH_ABI64_32)
#define CPU_TYPE_MC88000        ((cpu_type_t) 13)
#define CPU_TYPE_SPARC          ((cpu_type_t) 14)
#define CPU_TYPE_I860           ((cpu_type_t) 15)
/* skip	CPU_TYPE_ALPHA		((cpu_type_t) 16)	*/
/* skip				((cpu_type_t) 17)	*/
#define CPU_TYPE_POWERPC                ((cpu_type_t) 18)
#define CPU_TYPE_POWERPC64              (CPU_TYPE_POWERPC | CPU_ARCH_ABI64)
/* skip				((cpu_type_t) 19)	*/

/*
 *	Machine subtypes (these are defined here, instead of in a machine
 *	dependent directory, so that any program can get all definitions
 *	regardless of where is it compiled).
 */

/*
 * Capability bits used in the definition of cpu_subtype.
 */
#define CPU_SUBTYPE_MASK        0xff000000      /* mask for feature flags */
#define CPU_SUBTYPE_LIB64       0x80000000      /* 64 bit libraries */


/*
 *	Object files that are hand-crafted to run on any
 *	implementation of an architecture are tagged with
 *	CPU_SUBTYPE_MULTIPLE.  This functions essentially the same as
 *	the "ALL" subtype of an architecture except that it allows us
 *	to easily find object files that may need to be modified
 *	whenever a new implementation of an architecture comes out.
 *
 *	It is the responsibility of the implementor to make sure the
 *	software handles unsupported implementations elegantly.
 */
#define CPU_SUBTYPE_MULTIPLE            ((cpu_subtype_t) -1)
#define CPU_SUBTYPE_LITTLE_ENDIAN       ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_BIG_ENDIAN          ((cpu_subtype_t) 1)

/*
 *     Machine threadtypes.
 *     This is none - not defined - for most machine types/subtypes.
 */
#define CPU_THREADTYPE_NONE             ((cpu_threadtype_t) 0)

/*
 *	VAX subtypes (these do *not* necessary conform to the actual cpu
 *	ID assigned by DEC available via the SID register).
 */

#define CPU_SUBTYPE_VAX_ALL     ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_VAX780      ((cpu_subtype_t) 1)
#define CPU_SUBTYPE_VAX785      ((cpu_subtype_t) 2)
#define CPU_SUBTYPE_VAX750      ((cpu_subtype_t) 3)
#define CPU_SUBTYPE_VAX730      ((cpu_subtype_t) 4)
#define CPU_SUBTYPE_UVAXI       ((cpu_subtype_t) 5)
#define CPU_SUBTYPE_UVAXII      ((cpu_subtype_t) 6)
#define CPU_SUBTYPE_VAX8200     ((cpu_subtype_t) 7)
#define CPU_SUBTYPE_VAX8500     ((cpu_subtype_t) 8)
#define CPU_SUBTYPE_VAX8600     ((cpu_subtype_t) 9)
#define CPU_SUBTYPE_VAX8650     ((cpu_subtype_t) 10)
#define CPU_SUBTYPE_VAX8800     ((cpu_subtype_t) 11)
#define CPU_SUBTYPE_UVAXIII     ((cpu_subtype_t) 12)

/*
 *      680x0 subtypes
 *
 * The subtype definitions here are unusual for historical reasons.
 * NeXT used to consider 68030 code as generic 68000 code.  For
 * backwards compatability:
 *
 *	CPU_SUBTYPE_MC68030 symbol has been preserved for source code
 *	compatability.
 *
 *	CPU_SUBTYPE_MC680x0_ALL has been defined to be the same
 *	subtype as CPU_SUBTYPE_MC68030 for binary comatability.
 *
 *	CPU_SUBTYPE_MC68030_ONLY has been added to allow new object
 *	files to be tagged as containing 68030-specific instructions.
 */

#define CPU_SUBTYPE_MC680x0_ALL         ((cpu_subtype_t) 1)
#define CPU_SUBTYPE_MC68030             ((cpu_subtype_t) 1) /* compat */
#define CPU_SUBTYPE_MC68040             ((cpu_subtype_t) 2)
#define CPU_SUBTYPE_MC68030_ONLY        ((cpu_subtype_t) 3)

/*
 *	I386 subtypes
 */

#define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4))

#define CPU_SUBTYPE_I386_ALL                    CPU_SUBTYPE_INTEL(3, 0)
#define CPU_SUBTYPE_386                                 CPU_SUBTYPE_INTEL(3, 0)
#define CPU_SUBTYPE_486                                 CPU_SUBTYPE_INTEL(4, 0)
#define CPU_SUBTYPE_486SX                               CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128
#define CPU_SUBTYPE_586                                 CPU_SUBTYPE_INTEL(5, 0)
#define CPU_SUBTYPE_PENT        CPU_SUBTYPE_INTEL(5, 0)
#define CPU_SUBTYPE_PENTPRO     CPU_SUBTYPE_INTEL(6, 1)
#define CPU_SUBTYPE_PENTII_M3   CPU_SUBTYPE_INTEL(6, 3)
#define CPU_SUBTYPE_PENTII_M5   CPU_SUBTYPE_INTEL(6, 5)
#define CPU_SUBTYPE_CELERON                             CPU_SUBTYPE_INTEL(7, 6)
#define CPU_SUBTYPE_CELERON_MOBILE              CPU_SUBTYPE_INTEL(7, 7)
#define CPU_SUBTYPE_PENTIUM_3                   CPU_SUBTYPE_INTEL(8, 0)
#define CPU_SUBTYPE_PENTIUM_3_M                 CPU_SUBTYPE_INTEL(8, 1)
#define CPU_SUBTYPE_PENTIUM_3_XEON              CPU_SUBTYPE_INTEL(8, 2)
#define CPU_SUBTYPE_PENTIUM_M                   CPU_SUBTYPE_INTEL(9, 0)
#define CPU_SUBTYPE_PENTIUM_4                   CPU_SUBTYPE_INTEL(10, 0)
#define CPU_SUBTYPE_PENTIUM_4_M                 CPU_SUBTYPE_INTEL(10, 1)
#define CPU_SUBTYPE_ITANIUM                             CPU_SUBTYPE_INTEL(11, 0)
#define CPU_SUBTYPE_ITANIUM_2                   CPU_SUBTYPE_INTEL(11, 1)
#define CPU_SUBTYPE_XEON                                CPU_SUBTYPE_INTEL(12, 0)
#define CPU_SUBTYPE_XEON_MP                             CPU_SUBTYPE_INTEL(12, 1)

#define CPU_SUBTYPE_INTEL_FAMILY(x)     ((x) & 15)
#define CPU_SUBTYPE_INTEL_FAMILY_MAX    15

#define CPU_SUBTYPE_INTEL_MODEL(x)      ((x) >> 4)
#define CPU_SUBTYPE_INTEL_MODEL_ALL     0

/*
 *	X86 subtypes.
 */

#define CPU_SUBTYPE_X86_ALL             ((cpu_subtype_t)3)
#define CPU_SUBTYPE_X86_64_ALL          ((cpu_subtype_t)3)
#define CPU_SUBTYPE_X86_ARCH1           ((cpu_subtype_t)4)
#define CPU_SUBTYPE_X86_64_H            ((cpu_subtype_t)8)      /* Haswell feature subset */


#define CPU_THREADTYPE_INTEL_HTT        ((cpu_threadtype_t) 1)

/*
 *	Mips subtypes.
 */

#define CPU_SUBTYPE_MIPS_ALL    ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_MIPS_R2300  ((cpu_subtype_t) 1)
#define CPU_SUBTYPE_MIPS_R2600  ((cpu_subtype_t) 2)
#define CPU_SUBTYPE_MIPS_R2800  ((cpu_subtype_t) 3)
#define CPU_SUBTYPE_MIPS_R2000a ((cpu_subtype_t) 4)     /* pmax */
#define CPU_SUBTYPE_MIPS_R2000  ((cpu_subtype_t) 5)
#define CPU_SUBTYPE_MIPS_R3000a ((cpu_subtype_t) 6)     /* 3max */
#define CPU_SUBTYPE_MIPS_R3000  ((cpu_subtype_t) 7)

/*
 *	MC98000 (PowerPC) subtypes
 */
#define CPU_SUBTYPE_MC98000_ALL ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_MC98601     ((cpu_subtype_t) 1)

/*
 *	HPPA subtypes for Hewlett-Packard HP-PA family of
 *	risc processors. Port by NeXT to 700 series.
 */

#define CPU_SUBTYPE_HPPA_ALL            ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_HPPA_7100           ((cpu_subtype_t) 0) /* compat */
#define CPU_SUBTYPE_HPPA_7100LC         ((cpu_subtype_t) 1)

/*
 *	MC88000 subtypes.
 */
#define CPU_SUBTYPE_MC88000_ALL ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_MC88100     ((cpu_subtype_t) 1)
#define CPU_SUBTYPE_MC88110     ((cpu_subtype_t) 2)

/*
 *	SPARC subtypes
 */
#define CPU_SUBTYPE_SPARC_ALL           ((cpu_subtype_t) 0)

/*
 *	I860 subtypes
 */
#define CPU_SUBTYPE_I860_ALL    ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_I860_860    ((cpu_subtype_t) 1)

/*
 *	PowerPC subtypes
 */
#define CPU_SUBTYPE_POWERPC_ALL         ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_POWERPC_601         ((cpu_subtype_t) 1)
#define CPU_SUBTYPE_POWERPC_602         ((cpu_subtype_t) 2)
#define CPU_SUBTYPE_POWERPC_603         ((cpu_subtype_t) 3)
#define CPU_SUBTYPE_POWERPC_603e        ((cpu_subtype_t) 4)
#define CPU_SUBTYPE_POWERPC_603ev       ((cpu_subtype_t) 5)
#define CPU_SUBTYPE_POWERPC_604         ((cpu_subtype_t) 6)
#define CPU_SUBTYPE_POWERPC_604e        ((cpu_subtype_t) 7)
#define CPU_SUBTYPE_POWERPC_620         ((cpu_subtype_t) 8)
#define CPU_SUBTYPE_POWERPC_750         ((cpu_subtype_t) 9)
#define CPU_SUBTYPE_POWERPC_7400        ((cpu_subtype_t) 10)
#define CPU_SUBTYPE_POWERPC_7450        ((cpu_subtype_t) 11)
#define CPU_SUBTYPE_POWERPC_970         ((cpu_subtype_t) 100)

/*
 *	ARM subtypes
 */
#define CPU_SUBTYPE_ARM_ALL             ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_ARM_V4T             ((cpu_subtype_t) 5)
#define CPU_SUBTYPE_ARM_V6              ((cpu_subtype_t) 6)
#define CPU_SUBTYPE_ARM_V5TEJ           ((cpu_subtype_t) 7)
#define CPU_SUBTYPE_ARM_XSCALE          ((cpu_subtype_t) 8)
#define CPU_SUBTYPE_ARM_V7              ((cpu_subtype_t) 9)  /* ARMv7-A and ARMv7-R */
#define CPU_SUBTYPE_ARM_V7F             ((cpu_subtype_t) 10) /* Cortex A9 */
#define CPU_SUBTYPE_ARM_V7S             ((cpu_subtype_t) 11) /* Swift */
#define CPU_SUBTYPE_ARM_V7K             ((cpu_subtype_t) 12)
#define CPU_SUBTYPE_ARM_V8              ((cpu_subtype_t) 13)
#define CPU_SUBTYPE_ARM_V6M             ((cpu_subtype_t) 14) /* Not meant to be run under xnu */
#define CPU_SUBTYPE_ARM_V7M             ((cpu_subtype_t) 15) /* Not meant to be run under xnu */
#define CPU_SUBTYPE_ARM_V7EM            ((cpu_subtype_t) 16) /* Not meant to be run under xnu */
#define CPU_SUBTYPE_ARM_V8M             ((cpu_subtype_t) 17) /* Not meant to be run under xnu */

/*
 *  ARM64 subtypes
 */
#define CPU_SUBTYPE_ARM64_ALL           ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_ARM64_V8            ((cpu_subtype_t) 1)
#define CPU_SUBTYPE_ARM64E              ((cpu_subtype_t) 2)

/* CPU subtype feature flags for ptrauth on arm64e platforms */
#define CPU_SUBTYPE_ARM64_PTR_AUTH_MASK 0x0f000000
#define CPU_SUBTYPE_ARM64_PTR_AUTH_VERSION(x) (((x) & CPU_SUBTYPE_ARM64_PTR_AUTH_MASK) >> 24)

/*
 *  ARM64_32 subtypes
 */
#define CPU_SUBTYPE_ARM64_32_ALL        ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_ARM64_32_V8 ((cpu_subtype_t) 1)

#endif /* !__ASSEMBLER__ */

/*
 *	CPU families (sysctl hw.cpufamily)
 *
 * These are meant to identify the CPU's marketing name - an
 * application can map these to (possibly) localized strings.
 * NB: the encodings of the CPU families are intentionally arbitrary.
 * There is no ordering, and you should never try to deduce whether
 * or not some feature is available based on the family.
 * Use feature flags (eg, hw.optional.altivec) to test for optional
 * functionality.
 */
#define CPUFAMILY_UNKNOWN               0
#define CPUFAMILY_POWERPC_G3            0xcee41549
#define CPUFAMILY_POWERPC_G4            0x77c184ae
#define CPUFAMILY_POWERPC_G5            0xed76d8aa
#define CPUFAMILY_INTEL_6_13            0xaa33392b
#define CPUFAMILY_INTEL_PENRYN          0x78ea4fbc
#define CPUFAMILY_INTEL_NEHALEM         0x6b5a4cd2
#define CPUFAMILY_INTEL_WESTMERE        0x573b5eec
#define CPUFAMILY_INTEL_SANDYBRIDGE     0x5490b78c
#define CPUFAMILY_INTEL_IVYBRIDGE       0x1f65e835
#define CPUFAMILY_INTEL_HASWELL         0x10b282dc
#define CPUFAMILY_INTEL_BROADWELL       0x582ed09c
#define CPUFAMILY_INTEL_SKYLAKE         0x37fc219f
#define CPUFAMILY_INTEL_KABYLAKE        0x0f817246
#define CPUFAMILY_ARM_9                 0xe73283ae
#define CPUFAMILY_ARM_11                0x8ff620d8
#define CPUFAMILY_ARM_XSCALE            0x53b005f5
#define CPUFAMILY_ARM_12                0xbd1b0ae9
#define CPUFAMILY_ARM_13                0x0cc90e64
#define CPUFAMILY_ARM_14                0x96077ef1
#define CPUFAMILY_ARM_15                0xa8511bca
#define CPUFAMILY_ARM_SWIFT             0x1e2d6381
#define CPUFAMILY_ARM_CYCLONE           0x37a09642
#define CPUFAMILY_ARM_TYPHOON           0x2c91a47e
#define CPUFAMILY_ARM_TWISTER           0x92fb37c8
#define CPUFAMILY_ARM_HURRICANE         0x67ceee93
#define CPUFAMILY_ARM_MONSOON_MISTRAL   0xe81e7ef6
#define CPUFAMILY_ARM_VORTEX_TEMPEST    0x07d34b9f
#ifndef RC_HIDE_XNU_LIGHTNING
#define CPUFAMILY_ARM_LIGHTNING_THUNDER 0x462504d2
#endif /* !RC_HIDE_XNU_LIGHTNING */

/* The following synonyms are deprecated: */
#define CPUFAMILY_INTEL_6_23    CPUFAMILY_INTEL_PENRYN
#define CPUFAMILY_INTEL_6_26    CPUFAMILY_INTEL_NEHALEM


#endif  /* _MACH_MACHINE_H_ */
Commit	Line	Data
1c79356b	1	/*
5ba3f43e A	2	* Copyright (c) 2007-2016 Apple, Inc. All rights reserved.
5ba3f43e A	3	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
1c79356b	4	*
2d21ac55	5	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
0a7de745	6	*
2d21ac55 A	7	* This file contains Original Code and/or Modifications of Original Code
	8	* as defined in and that are subject to the Apple Public Source License
	9	* Version 2.0 (the 'License'). You may not use this file except in
	10	* compliance with the License. The rights granted to you under the License
	11	* may not be used to create, or enable the creation or redistribution of,
	12	* unlawful or unlicensed copies of an Apple operating system, or to
	13	* circumvent, violate, or enable the circumvention or violation of, any
	14	* terms of an Apple operating system software license agreement.
0a7de745	15	*
2d21ac55 A	16	* Please obtain a copy of the License at
2d21ac55 A	17	* http://www.opensource.apple.com/apsl/ and read it before using this file.
0a7de745	18	*
2d21ac55 A	19	* The Original Code and all software distributed under the License are
2d21ac55 A	20	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	21	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	22	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	23	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	24	* Please see the License for the specific language governing rights and
	25	* limitations under the License.
0a7de745	26	*
2d21ac55	27	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b	28	*/
0a7de745	29	/*
1c79356b A	30	* Mach Operating System
	31	* Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
	32	* All Rights Reserved.
0a7de745	33	*
1c79356b A	34	* Permission to use, copy, modify and distribute this software and its
	35	* documentation is hereby granted, provided that both the copyright
	36	* notice and this permission notice appear in all copies of the
	37	* software, derivative works or modified versions, and any portions
	38	* thereof, and that both notices appear in supporting documentation.
0a7de745	39	*
1c79356b A	40	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	41	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	42	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
0a7de745	43	*
1c79356b	44	* Carnegie Mellon requests users of this software to return to
0a7de745	45	*
1c79356b A	46	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	47	* School of Computer Science
	48	* Carnegie Mellon University
	49	* Pittsburgh PA 15213-3890
0a7de745	50	*
1c79356b A	51	* any improvements or extensions that they make and grant Carnegie Mellon
	52	* the rights to redistribute these changes.
	53	*/
	54	/* File: machine.h
	55	* Author: Avadis Tevanian, Jr.
	56	* Date: 1986
	57	*
	58	* Machine independent machine abstraction.
	59	*/
	60
0a7de745	61	#ifndef _MACH_MACHINE_H_
1c79356b A	62	#define _MACH_MACHINE_H_
1c79356b A	63
316670eb A	64	#ifndef __ASSEMBLER__
316670eb A	65
91447636	66	#include <stdint.h>
1c79356b A	67	#include <mach/machine/vm_types.h>
	68	#include <mach/boolean.h>
	69
0a7de745 A	70	typedef integer_t cpu_type_t;
	71	typedef integer_t cpu_subtype_t;
	72	typedef integer_t cpu_threadtype_t;
1c79356b	73
0a7de745	74	#define CPU_STATE_MAX 4
1c79356b	75
0a7de745 A	76	#define CPU_STATE_USER 0
	77	#define CPU_STATE_SYSTEM 1
	78	#define CPU_STATE_IDLE 2
	79	#define CPU_STATE_NICE 3
1c79356b	80
0a7de745	81	#ifdef KERNEL_PRIVATE
91447636 A	82
	83	#include <sys/cdefs.h>
	84
	85	__BEGIN_DECLS
0a7de745	86	cpu_type_t cpu_type(void);
91447636	87
0a7de745	88	cpu_subtype_t cpu_subtype(void);
91447636	89
0a7de745	90	cpu_threadtype_t cpu_threadtype(void);
91447636 A	91	__END_DECLS
91447636 A	92
0a7de745	93	#ifdef MACH_KERNEL_PRIVATE
91447636 A	94
91447636 A	95	struct machine_info {
0a7de745 A	96	integer_t major_version; /* kernel major version id */
	97	integer_t minor_version; /* kernel minor version id */
	98	integer_t max_cpus; /* max number of CPUs possible */
	99	uint32_t memory_size; /* size of memory in bytes, capped at 2 GB */
	100	uint64_t max_mem; /* actual size of physical memory */
	101	uint32_t physical_cpu; /* number of physical CPUs now available */
	102	integer_t physical_cpu_max; /* max number of physical CPUs possible */
	103	uint32_t logical_cpu; /* number of logical cpu now available */
	104	integer_t logical_cpu_max; /* max number of physical CPUs possible */
1c79356b A	105	};
1c79356b A	106
0a7de745 A	107	typedef struct machine_info *machine_info_t;
0a7de745 A	108	typedef struct machine_info machine_info_data_t;
1c79356b	109
0a7de745	110	extern struct machine_info machine_info;
9bccf70c	111
91447636	112	__BEGIN_DECLS
0a7de745 A	113	cpu_type_t slot_type(
0a7de745 A	114	int slot_num);
91447636	115
0a7de745 A	116	cpu_subtype_t slot_subtype(
0a7de745 A	117	int slot_num);
91447636	118
0a7de745 A	119	cpu_threadtype_t slot_threadtype(
0a7de745 A	120	int slot_num);
91447636 A	121	__END_DECLS
91447636 A	122
0a7de745 A	123	#endif /* MACH_KERNEL_PRIVATE */
0a7de745 A	124	#endif /* KERNEL_PRIVATE */
91447636 A	125
	126
	127	/*
	128	* Capability bits used in the definition of cpu_type.
	129	*/
0a7de745 A	130	#define CPU_ARCH_MASK 0xff000000 /* mask for architecture bits */
0a7de745 A	131	#define CPU_ARCH_ABI64 0x01000000 /* 64 bit ABI */
cb323159	132	#define CPU_ARCH_ABI64_32 0x02000000 /* ABI for 64-bit hardware with 32-bit types; LP32 */
1c79356b A	133
	134	/*
	135	* Machine types known by all.
	136	*/
1c79356b	137
0a7de745 A	138	#define CPU_TYPE_ANY ((cpu_type_t) -1)
	139
	140	#define CPU_TYPE_VAX ((cpu_type_t) 1)
1c79356b A	141	/* skip ((cpu_type_t) 2) */
	142	/* skip ((cpu_type_t) 3) */
	143	/* skip ((cpu_type_t) 4) */
	144	/* skip ((cpu_type_t) 5) */
0a7de745 A	145	#define CPU_TYPE_MC680x0 ((cpu_type_t) 6)
	146	#define CPU_TYPE_X86 ((cpu_type_t) 7)
	147	#define CPU_TYPE_I386 CPU_TYPE_X86 /* compatibility */
	148	#define CPU_TYPE_X86_64 (CPU_TYPE_X86 \| CPU_ARCH_ABI64)
c0fea474	149
1c79356b	150	/* skip CPU_TYPE_MIPS ((cpu_type_t) 8) */
0a7de745 A	151	/* skip ((cpu_type_t) 9) */
0a7de745 A	152	#define CPU_TYPE_MC98000 ((cpu_type_t) 10)
1c79356b	153	#define CPU_TYPE_HPPA ((cpu_type_t) 11)
0a7de745 A	154	#define CPU_TYPE_ARM ((cpu_type_t) 12)
0a7de745 A	155	#define CPU_TYPE_ARM64 (CPU_TYPE_ARM \| CPU_ARCH_ABI64)
cb323159	156	#define CPU_TYPE_ARM64_32 (CPU_TYPE_ARM \| CPU_ARCH_ABI64_32)
0a7de745 A	157	#define CPU_TYPE_MC88000 ((cpu_type_t) 13)
	158	#define CPU_TYPE_SPARC ((cpu_type_t) 14)
	159	#define CPU_TYPE_I860 ((cpu_type_t) 15)
1c79356b A	160	/* skip CPU_TYPE_ALPHA ((cpu_type_t) 16) */
1c79356b A	161	/* skip ((cpu_type_t) 17) */
0a7de745 A	162	#define CPU_TYPE_POWERPC ((cpu_type_t) 18)
0a7de745 A	163	#define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC \| CPU_ARCH_ABI64)
cb323159	164	/* skip ((cpu_type_t) 19) */
1c79356b A	165
	166	/*
	167	* Machine subtypes (these are defined here, instead of in a machine
	168	* dependent directory, so that any program can get all definitions
	169	* regardless of where is it compiled).
	170	*/
	171
2d21ac55 A	172	/*
	173	* Capability bits used in the definition of cpu_subtype.
	174	*/
0a7de745 A	175	#define CPU_SUBTYPE_MASK 0xff000000 /* mask for feature flags */
0a7de745 A	176	#define CPU_SUBTYPE_LIB64 0x80000000 /* 64 bit libraries */
2d21ac55 A	177
2d21ac55 A	178
1c79356b A	179	/*
	180	* Object files that are hand-crafted to run on any
	181	* implementation of an architecture are tagged with
	182	* CPU_SUBTYPE_MULTIPLE. This functions essentially the same as
	183	* the "ALL" subtype of an architecture except that it allows us
	184	* to easily find object files that may need to be modified
	185	* whenever a new implementation of an architecture comes out.
	186	*
	187	* It is the responsibility of the implementor to make sure the
	188	* software handles unsupported implementations elegantly.
	189	*/
0a7de745 A	190	#define CPU_SUBTYPE_MULTIPLE ((cpu_subtype_t) -1)
	191	#define CPU_SUBTYPE_LITTLE_ENDIAN ((cpu_subtype_t) 0)
	192	#define CPU_SUBTYPE_BIG_ENDIAN ((cpu_subtype_t) 1)
1c79356b	193
91447636 A	194	/*
	195	* Machine threadtypes.
	196	* This is none - not defined - for most machine types/subtypes.
	197	*/
0a7de745	198	#define CPU_THREADTYPE_NONE ((cpu_threadtype_t) 0)
91447636	199
1c79356b A	200	/*
	201	* VAX subtypes (these do not necessary conform to the actual cpu
	202	* ID assigned by DEC available via the SID register).
	203	*/
	204
0a7de745 A	205	#define CPU_SUBTYPE_VAX_ALL ((cpu_subtype_t) 0)
	206	#define CPU_SUBTYPE_VAX780 ((cpu_subtype_t) 1)
	207	#define CPU_SUBTYPE_VAX785 ((cpu_subtype_t) 2)
	208	#define CPU_SUBTYPE_VAX750 ((cpu_subtype_t) 3)
	209	#define CPU_SUBTYPE_VAX730 ((cpu_subtype_t) 4)
	210	#define CPU_SUBTYPE_UVAXI ((cpu_subtype_t) 5)
	211	#define CPU_SUBTYPE_UVAXII ((cpu_subtype_t) 6)
	212	#define CPU_SUBTYPE_VAX8200 ((cpu_subtype_t) 7)
	213	#define CPU_SUBTYPE_VAX8500 ((cpu_subtype_t) 8)
	214	#define CPU_SUBTYPE_VAX8600 ((cpu_subtype_t) 9)
	215	#define CPU_SUBTYPE_VAX8650 ((cpu_subtype_t) 10)
	216	#define CPU_SUBTYPE_VAX8800 ((cpu_subtype_t) 11)
	217	#define CPU_SUBTYPE_UVAXIII ((cpu_subtype_t) 12)
1c79356b A	218
1c79356b A	219	/*
0a7de745	220	* 680x0 subtypes
1c79356b A	221	*
	222	* The subtype definitions here are unusual for historical reasons.
	223	* NeXT used to consider 68030 code as generic 68000 code. For
	224	* backwards compatability:
0a7de745	225	*
1c79356b A	226	* CPU_SUBTYPE_MC68030 symbol has been preserved for source code
	227	* compatability.
	228	*
	229	* CPU_SUBTYPE_MC680x0_ALL has been defined to be the same
	230	* subtype as CPU_SUBTYPE_MC68030 for binary comatability.
	231	*
	232	* CPU_SUBTYPE_MC68030_ONLY has been added to allow new object
	233	* files to be tagged as containing 68030-specific instructions.
	234	*/
	235
0a7de745 A	236	#define CPU_SUBTYPE_MC680x0_ALL ((cpu_subtype_t) 1)
	237	#define CPU_SUBTYPE_MC68030 ((cpu_subtype_t) 1) /* compat */
	238	#define CPU_SUBTYPE_MC68040 ((cpu_subtype_t) 2)
	239	#define CPU_SUBTYPE_MC68030_ONLY ((cpu_subtype_t) 3)
1c79356b A	240
1c79356b A	241	/*
0c530ab8	242	* I386 subtypes
1c79356b A	243	*/
1c79356b A	244
0a7de745 A	245	#define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4))
	246
	247	#define CPU_SUBTYPE_I386_ALL CPU_SUBTYPE_INTEL(3, 0)
	248	#define CPU_SUBTYPE_386 CPU_SUBTYPE_INTEL(3, 0)
	249	#define CPU_SUBTYPE_486 CPU_SUBTYPE_INTEL(4, 0)
	250	#define CPU_SUBTYPE_486SX CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128
	251	#define CPU_SUBTYPE_586 CPU_SUBTYPE_INTEL(5, 0)
	252	#define CPU_SUBTYPE_PENT CPU_SUBTYPE_INTEL(5, 0)
	253	#define CPU_SUBTYPE_PENTPRO CPU_SUBTYPE_INTEL(6, 1)
	254	#define CPU_SUBTYPE_PENTII_M3 CPU_SUBTYPE_INTEL(6, 3)
	255	#define CPU_SUBTYPE_PENTII_M5 CPU_SUBTYPE_INTEL(6, 5)
	256	#define CPU_SUBTYPE_CELERON CPU_SUBTYPE_INTEL(7, 6)
	257	#define CPU_SUBTYPE_CELERON_MOBILE CPU_SUBTYPE_INTEL(7, 7)
	258	#define CPU_SUBTYPE_PENTIUM_3 CPU_SUBTYPE_INTEL(8, 0)
	259	#define CPU_SUBTYPE_PENTIUM_3_M CPU_SUBTYPE_INTEL(8, 1)
	260	#define CPU_SUBTYPE_PENTIUM_3_XEON CPU_SUBTYPE_INTEL(8, 2)
	261	#define CPU_SUBTYPE_PENTIUM_M CPU_SUBTYPE_INTEL(9, 0)
	262	#define CPU_SUBTYPE_PENTIUM_4 CPU_SUBTYPE_INTEL(10, 0)
	263	#define CPU_SUBTYPE_PENTIUM_4_M CPU_SUBTYPE_INTEL(10, 1)
	264	#define CPU_SUBTYPE_ITANIUM CPU_SUBTYPE_INTEL(11, 0)
	265	#define CPU_SUBTYPE_ITANIUM_2 CPU_SUBTYPE_INTEL(11, 1)
	266	#define CPU_SUBTYPE_XEON CPU_SUBTYPE_INTEL(12, 0)
	267	#define CPU_SUBTYPE_XEON_MP CPU_SUBTYPE_INTEL(12, 1)
	268
	269	#define CPU_SUBTYPE_INTEL_FAMILY(x) ((x) & 15)
	270	#define CPU_SUBTYPE_INTEL_FAMILY_MAX 15
	271
	272	#define CPU_SUBTYPE_INTEL_MODEL(x) ((x) >> 4)
	273	#define CPU_SUBTYPE_INTEL_MODEL_ALL 0
1c79356b	274
c0fea474 A	275	/*
	276	* X86 subtypes.
	277	*/
	278
0a7de745 A	279	#define CPU_SUBTYPE_X86_ALL ((cpu_subtype_t)3)
	280	#define CPU_SUBTYPE_X86_64_ALL ((cpu_subtype_t)3)
	281	#define CPU_SUBTYPE_X86_ARCH1 ((cpu_subtype_t)4)
	282	#define CPU_SUBTYPE_X86_64_H ((cpu_subtype_t)8) /* Haswell feature subset */
c0fea474	283
91447636	284
0a7de745	285	#define CPU_THREADTYPE_INTEL_HTT ((cpu_threadtype_t) 1)
91447636	286
1c79356b A	287	/*
	288	* Mips subtypes.
	289	*/
	290
0a7de745 A	291	#define CPU_SUBTYPE_MIPS_ALL ((cpu_subtype_t) 0)
	292	#define CPU_SUBTYPE_MIPS_R2300 ((cpu_subtype_t) 1)
	293	#define CPU_SUBTYPE_MIPS_R2600 ((cpu_subtype_t) 2)
	294	#define CPU_SUBTYPE_MIPS_R2800 ((cpu_subtype_t) 3)
	295	#define CPU_SUBTYPE_MIPS_R2000a ((cpu_subtype_t) 4) /* pmax */
	296	#define CPU_SUBTYPE_MIPS_R2000 ((cpu_subtype_t) 5)
	297	#define CPU_SUBTYPE_MIPS_R3000a ((cpu_subtype_t) 6) /* 3max */
	298	#define CPU_SUBTYPE_MIPS_R3000 ((cpu_subtype_t) 7)
1c79356b A	299
	300	/*
	301	* MC98000 (PowerPC) subtypes
	302	*/
0a7de745 A	303	#define CPU_SUBTYPE_MC98000_ALL ((cpu_subtype_t) 0)
0a7de745 A	304	#define CPU_SUBTYPE_MC98601 ((cpu_subtype_t) 1)
1c79356b A	305
	306	/*
	307	* HPPA subtypes for Hewlett-Packard HP-PA family of
0a7de745	308	* risc processors. Port by NeXT to 700 series.
1c79356b A	309	*/
1c79356b A	310
0a7de745 A	311	#define CPU_SUBTYPE_HPPA_ALL ((cpu_subtype_t) 0)
	312	#define CPU_SUBTYPE_HPPA_7100 ((cpu_subtype_t) 0) /* compat */
	313	#define CPU_SUBTYPE_HPPA_7100LC ((cpu_subtype_t) 1)
1c79356b A	314
	315	/*
	316	* MC88000 subtypes.
	317	*/
0a7de745 A	318	#define CPU_SUBTYPE_MC88000_ALL ((cpu_subtype_t) 0)
	319	#define CPU_SUBTYPE_MC88100 ((cpu_subtype_t) 1)
	320	#define CPU_SUBTYPE_MC88110 ((cpu_subtype_t) 2)
1c79356b A	321
	322	/*
	323	* SPARC subtypes
	324	*/
0a7de745	325	#define CPU_SUBTYPE_SPARC_ALL ((cpu_subtype_t) 0)
1c79356b A	326
	327	/*
	328	* I860 subtypes
	329	*/
0a7de745 A	330	#define CPU_SUBTYPE_I860_ALL ((cpu_subtype_t) 0)
0a7de745 A	331	#define CPU_SUBTYPE_I860_860 ((cpu_subtype_t) 1)
1c79356b A	332
	333	/*
	334	* PowerPC subtypes
	335	*/
0a7de745 A	336	#define CPU_SUBTYPE_POWERPC_ALL ((cpu_subtype_t) 0)
	337	#define CPU_SUBTYPE_POWERPC_601 ((cpu_subtype_t) 1)
	338	#define CPU_SUBTYPE_POWERPC_602 ((cpu_subtype_t) 2)
	339	#define CPU_SUBTYPE_POWERPC_603 ((cpu_subtype_t) 3)
	340	#define CPU_SUBTYPE_POWERPC_603e ((cpu_subtype_t) 4)
	341	#define CPU_SUBTYPE_POWERPC_603ev ((cpu_subtype_t) 5)
	342	#define CPU_SUBTYPE_POWERPC_604 ((cpu_subtype_t) 6)
	343	#define CPU_SUBTYPE_POWERPC_604e ((cpu_subtype_t) 7)
	344	#define CPU_SUBTYPE_POWERPC_620 ((cpu_subtype_t) 8)
	345	#define CPU_SUBTYPE_POWERPC_750 ((cpu_subtype_t) 9)
	346	#define CPU_SUBTYPE_POWERPC_7400 ((cpu_subtype_t) 10)
	347	#define CPU_SUBTYPE_POWERPC_7450 ((cpu_subtype_t) 11)
	348	#define CPU_SUBTYPE_POWERPC_970 ((cpu_subtype_t) 100)
1c79356b	349
0c530ab8	350	/*
2d21ac55 A	351	* ARM subtypes
	352	*/
	353	#define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0)
	354	#define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5)
	355	#define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6)
4a3eedf9	356	#define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7)
0a7de745	357	#define CPU_SUBTYPE_ARM_XSCALE ((cpu_subtype_t) 8)
cb323159	358	#define CPU_SUBTYPE_ARM_V7 ((cpu_subtype_t) 9) /* ARMv7-A and ARMv7-R */
0a7de745 A	359	#define CPU_SUBTYPE_ARM_V7F ((cpu_subtype_t) 10) /* Cortex A9 */
	360	#define CPU_SUBTYPE_ARM_V7S ((cpu_subtype_t) 11) /* Swift */
	361	#define CPU_SUBTYPE_ARM_V7K ((cpu_subtype_t) 12)
cb323159	362	#define CPU_SUBTYPE_ARM_V8 ((cpu_subtype_t) 13)
0a7de745 A	363	#define CPU_SUBTYPE_ARM_V6M ((cpu_subtype_t) 14) /* Not meant to be run under xnu */
	364	#define CPU_SUBTYPE_ARM_V7M ((cpu_subtype_t) 15) /* Not meant to be run under xnu */
	365	#define CPU_SUBTYPE_ARM_V7EM ((cpu_subtype_t) 16) /* Not meant to be run under xnu */
cb323159	366	#define CPU_SUBTYPE_ARM_V8M ((cpu_subtype_t) 17) /* Not meant to be run under xnu */
fe8ab488 A	367
	368	/*
	369	* ARM64 subtypes
	370	*/
	371	#define CPU_SUBTYPE_ARM64_ALL ((cpu_subtype_t) 0)
	372	#define CPU_SUBTYPE_ARM64_V8 ((cpu_subtype_t) 1)
cb323159	373	#define CPU_SUBTYPE_ARM64E ((cpu_subtype_t) 2)
fe8ab488	374
cb323159 A	375	/* CPU subtype feature flags for ptrauth on arm64e platforms */
	376	#define CPU_SUBTYPE_ARM64_PTR_AUTH_MASK 0x0f000000
	377	#define CPU_SUBTYPE_ARM64_PTR_AUTH_VERSION(x) (((x) & CPU_SUBTYPE_ARM64_PTR_AUTH_MASK) >> 24)
	378
	379	/*
	380	* ARM64_32 subtypes
	381	*/
	382	#define CPU_SUBTYPE_ARM64_32_ALL ((cpu_subtype_t) 0)
	383	#define CPU_SUBTYPE_ARM64_32_V8 ((cpu_subtype_t) 1)
d9a64523	384
316670eb	385	#endif /* !__ASSEMBLER__ */
2d21ac55 A	386
	387	/*
	388	* CPU families (sysctl hw.cpufamily)
0c530ab8	389	*
2d21ac55 A	390	* These are meant to identify the CPU's marketing name - an
2d21ac55 A	391	* application can map these to (possibly) localized strings.
0c530ab8 A	392	* NB: the encodings of the CPU families are intentionally arbitrary.
	393	* There is no ordering, and you should never try to deduce whether
	394	* or not some feature is available based on the family.
	395	* Use feature flags (eg, hw.optional.altivec) to test for optional
	396	* functionality.
	397	*/
0a7de745 A	398	#define CPUFAMILY_UNKNOWN 0
	399	#define CPUFAMILY_POWERPC_G3 0xcee41549
	400	#define CPUFAMILY_POWERPC_G4 0x77c184ae
	401	#define CPUFAMILY_POWERPC_G5 0xed76d8aa
	402	#define CPUFAMILY_INTEL_6_13 0xaa33392b
	403	#define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc
	404	#define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2
	405	#define CPUFAMILY_INTEL_WESTMERE 0x573b5eec
	406	#define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c
	407	#define CPUFAMILY_INTEL_IVYBRIDGE 0x1f65e835
	408	#define CPUFAMILY_INTEL_HASWELL 0x10b282dc
	409	#define CPUFAMILY_INTEL_BROADWELL 0x582ed09c
	410	#define CPUFAMILY_INTEL_SKYLAKE 0x37fc219f
	411	#define CPUFAMILY_INTEL_KABYLAKE 0x0f817246
	412	#define CPUFAMILY_ARM_9 0xe73283ae
	413	#define CPUFAMILY_ARM_11 0x8ff620d8
	414	#define CPUFAMILY_ARM_XSCALE 0x53b005f5
39037602	415	#define CPUFAMILY_ARM_12 0xbd1b0ae9
0a7de745 A	416	#define CPUFAMILY_ARM_13 0x0cc90e64
	417	#define CPUFAMILY_ARM_14 0x96077ef1
	418	#define CPUFAMILY_ARM_15 0xa8511bca
	419	#define CPUFAMILY_ARM_SWIFT 0x1e2d6381
	420	#define CPUFAMILY_ARM_CYCLONE 0x37a09642
	421	#define CPUFAMILY_ARM_TYPHOON 0x2c91a47e
	422	#define CPUFAMILY_ARM_TWISTER 0x92fb37c8
	423	#define CPUFAMILY_ARM_HURRICANE 0x67ceee93
	424	#define CPUFAMILY_ARM_MONSOON_MISTRAL 0xe81e7ef6
cb323159	425	#define CPUFAMILY_ARM_VORTEX_TEMPEST 0x07d34b9f
c6bf4f31 A	426	#ifndef RC_HIDE_XNU_LIGHTNING
	427	#define CPUFAMILY_ARM_LIGHTNING_THUNDER 0x462504d2
	428	#endif /* !RC_HIDE_XNU_LIGHTNING */
7e4a7d39 A	429
7e4a7d39 A	430	/* The following synonyms are deprecated: */
0a7de745 A	431	#define CPUFAMILY_INTEL_6_23 CPUFAMILY_INTEL_PENRYN
0a7de745 A	432	#define CPUFAMILY_INTEL_6_26 CPUFAMILY_INTEL_NEHALEM
7e4a7d39	433
0c530ab8	434
0a7de745	435	#endif /* _MACH_MACHINE_H_ */