[apple/xnu.git] / osfmk / mach / machine.h

/*
 * Copyright (c) 2000-2007 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/* 
 * Mach Operating System
 * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */
/*	File:	machine.h
 *	Author:	Avadis Tevanian, Jr.
 *	Date:	1986
 *
 *	Machine independent machine abstraction.
 */

#ifndef	_MACH_MACHINE_H_
#define _MACH_MACHINE_H_

#ifndef __ASSEMBLER__

#include <stdint.h>
#include <mach/machine/vm_types.h>
#include <mach/boolean.h>

typedef integer_t	cpu_type_t;
typedef integer_t	cpu_subtype_t;
typedef integer_t	cpu_threadtype_t;

#define CPU_STATE_MAX		4

#define CPU_STATE_USER		0
#define CPU_STATE_SYSTEM	1
#define CPU_STATE_IDLE		2
#define CPU_STATE_NICE		3

#ifdef	KERNEL_PRIVATE

#include <sys/cdefs.h>

__BEGIN_DECLS
cpu_type_t			cpu_type(void);

cpu_subtype_t		cpu_subtype(void);

cpu_threadtype_t	cpu_threadtype(void);
__END_DECLS

#ifdef	MACH_KERNEL_PRIVATE

struct machine_info {
	integer_t	major_version;		/* kernel major version id */
	integer_t	minor_version;		/* kernel minor version id */
	integer_t	max_cpus;			/* max number of CPUs possible */
	uint32_t	memory_size;		/* size of memory in bytes, capped at 2 GB */
	uint64_t	max_mem;			/* actual size of physical memory */
	uint32_t	physical_cpu;		/* number of physical CPUs now available */
	integer_t	physical_cpu_max;	/* max number of physical CPUs possible */
	uint32_t	logical_cpu;		/* number of logical cpu now available */
	integer_t	logical_cpu_max;	/* max number of physical CPUs possible */
};

typedef struct machine_info	*machine_info_t;
typedef struct machine_info	machine_info_data_t;

extern struct machine_info	machine_info;

__BEGIN_DECLS
cpu_type_t			slot_type(
						int		slot_num);

cpu_subtype_t		slot_subtype(
						int		slot_num);

cpu_threadtype_t	slot_threadtype(
						int		slot_num);
__END_DECLS

#endif	/* MACH_KERNEL_PRIVATE */
#endif	/* KERNEL_PRIVATE */


/*
 * Capability bits used in the definition of cpu_type.
 */
#define	CPU_ARCH_MASK	0xff000000		/* mask for architecture bits */
#define CPU_ARCH_ABI64	0x01000000		/* 64 bit ABI */

/*
 *	Machine types known by all.
 */
 
#define CPU_TYPE_ANY		((cpu_type_t) -1)

#define CPU_TYPE_VAX		((cpu_type_t) 1)
/* skip				((cpu_type_t) 2)	*/
/* skip				((cpu_type_t) 3)	*/
/* skip				((cpu_type_t) 4)	*/
/* skip				((cpu_type_t) 5)	*/
#define	CPU_TYPE_MC680x0	((cpu_type_t) 6)
#define CPU_TYPE_X86		((cpu_type_t) 7)
#define CPU_TYPE_I386		CPU_TYPE_X86		/* compatibility */
#define	CPU_TYPE_X86_64		(CPU_TYPE_X86 | CPU_ARCH_ABI64)

/* skip CPU_TYPE_MIPS		((cpu_type_t) 8)	*/
/* skip 			((cpu_type_t) 9)	*/
#define CPU_TYPE_MC98000	((cpu_type_t) 10)
#define CPU_TYPE_HPPA           ((cpu_type_t) 11)
#define CPU_TYPE_ARM		((cpu_type_t) 12)
#define CPU_TYPE_ARM64          (CPU_TYPE_ARM | CPU_ARCH_ABI64)
#define CPU_TYPE_MC88000	((cpu_type_t) 13)
#define CPU_TYPE_SPARC		((cpu_type_t) 14)
#define CPU_TYPE_I860		((cpu_type_t) 15)
/* skip	CPU_TYPE_ALPHA		((cpu_type_t) 16)	*/
/* skip				((cpu_type_t) 17)	*/
#define CPU_TYPE_POWERPC		((cpu_type_t) 18)
#define CPU_TYPE_POWERPC64		(CPU_TYPE_POWERPC | CPU_ARCH_ABI64)

/*
 *	Machine subtypes (these are defined here, instead of in a machine
 *	dependent directory, so that any program can get all definitions
 *	regardless of where is it compiled).
 */

/*
 * Capability bits used in the definition of cpu_subtype.
 */
#define CPU_SUBTYPE_MASK	0xff000000	/* mask for feature flags */
#define CPU_SUBTYPE_LIB64	0x80000000	/* 64 bit libraries */


/*
 *	Object files that are hand-crafted to run on any
 *	implementation of an architecture are tagged with
 *	CPU_SUBTYPE_MULTIPLE.  This functions essentially the same as
 *	the "ALL" subtype of an architecture except that it allows us
 *	to easily find object files that may need to be modified
 *	whenever a new implementation of an architecture comes out.
 *
 *	It is the responsibility of the implementor to make sure the
 *	software handles unsupported implementations elegantly.
 */
#define	CPU_SUBTYPE_MULTIPLE		((cpu_subtype_t) -1)
#define CPU_SUBTYPE_LITTLE_ENDIAN	((cpu_subtype_t) 0)
#define CPU_SUBTYPE_BIG_ENDIAN		((cpu_subtype_t) 1)

/*
 *     Machine threadtypes.
 *     This is none - not defined - for most machine types/subtypes.
 */
#define CPU_THREADTYPE_NONE		((cpu_threadtype_t) 0)

/*
 *	VAX subtypes (these do *not* necessary conform to the actual cpu
 *	ID assigned by DEC available via the SID register).
 */

#define	CPU_SUBTYPE_VAX_ALL	((cpu_subtype_t) 0) 
#define CPU_SUBTYPE_VAX780	((cpu_subtype_t) 1)
#define CPU_SUBTYPE_VAX785	((cpu_subtype_t) 2)
#define CPU_SUBTYPE_VAX750	((cpu_subtype_t) 3)
#define CPU_SUBTYPE_VAX730	((cpu_subtype_t) 4)
#define CPU_SUBTYPE_UVAXI	((cpu_subtype_t) 5)
#define CPU_SUBTYPE_UVAXII	((cpu_subtype_t) 6)
#define CPU_SUBTYPE_VAX8200	((cpu_subtype_t) 7)
#define CPU_SUBTYPE_VAX8500	((cpu_subtype_t) 8)
#define CPU_SUBTYPE_VAX8600	((cpu_subtype_t) 9)
#define CPU_SUBTYPE_VAX8650	((cpu_subtype_t) 10)
#define CPU_SUBTYPE_VAX8800	((cpu_subtype_t) 11)
#define CPU_SUBTYPE_UVAXIII	((cpu_subtype_t) 12)

/*
 * 	680x0 subtypes
 *
 * The subtype definitions here are unusual for historical reasons.
 * NeXT used to consider 68030 code as generic 68000 code.  For
 * backwards compatability:
 * 
 *	CPU_SUBTYPE_MC68030 symbol has been preserved for source code
 *	compatability.
 *
 *	CPU_SUBTYPE_MC680x0_ALL has been defined to be the same
 *	subtype as CPU_SUBTYPE_MC68030 for binary comatability.
 *
 *	CPU_SUBTYPE_MC68030_ONLY has been added to allow new object
 *	files to be tagged as containing 68030-specific instructions.
 */

#define	CPU_SUBTYPE_MC680x0_ALL		((cpu_subtype_t) 1)
#define CPU_SUBTYPE_MC68030		((cpu_subtype_t) 1) /* compat */
#define CPU_SUBTYPE_MC68040		((cpu_subtype_t) 2) 
#define	CPU_SUBTYPE_MC68030_ONLY	((cpu_subtype_t) 3)

/*
 *	I386 subtypes
 */

#define CPU_SUBTYPE_INTEL(f, m)	((cpu_subtype_t) (f) + ((m) << 4))

#define	CPU_SUBTYPE_I386_ALL			CPU_SUBTYPE_INTEL(3, 0)
#define CPU_SUBTYPE_386					CPU_SUBTYPE_INTEL(3, 0)
#define CPU_SUBTYPE_486					CPU_SUBTYPE_INTEL(4, 0)
#define CPU_SUBTYPE_486SX				CPU_SUBTYPE_INTEL(4, 8)	// 8 << 4 = 128
#define CPU_SUBTYPE_586					CPU_SUBTYPE_INTEL(5, 0)
#define CPU_SUBTYPE_PENT	CPU_SUBTYPE_INTEL(5, 0)
#define CPU_SUBTYPE_PENTPRO	CPU_SUBTYPE_INTEL(6, 1)
#define CPU_SUBTYPE_PENTII_M3	CPU_SUBTYPE_INTEL(6, 3)
#define CPU_SUBTYPE_PENTII_M5	CPU_SUBTYPE_INTEL(6, 5)
#define CPU_SUBTYPE_CELERON				CPU_SUBTYPE_INTEL(7, 6)
#define CPU_SUBTYPE_CELERON_MOBILE		CPU_SUBTYPE_INTEL(7, 7)
#define CPU_SUBTYPE_PENTIUM_3			CPU_SUBTYPE_INTEL(8, 0)
#define CPU_SUBTYPE_PENTIUM_3_M			CPU_SUBTYPE_INTEL(8, 1)
#define CPU_SUBTYPE_PENTIUM_3_XEON		CPU_SUBTYPE_INTEL(8, 2)
#define CPU_SUBTYPE_PENTIUM_M			CPU_SUBTYPE_INTEL(9, 0)
#define CPU_SUBTYPE_PENTIUM_4			CPU_SUBTYPE_INTEL(10, 0)
#define CPU_SUBTYPE_PENTIUM_4_M			CPU_SUBTYPE_INTEL(10, 1)
#define CPU_SUBTYPE_ITANIUM				CPU_SUBTYPE_INTEL(11, 0)
#define CPU_SUBTYPE_ITANIUM_2			CPU_SUBTYPE_INTEL(11, 1)
#define CPU_SUBTYPE_XEON				CPU_SUBTYPE_INTEL(12, 0)
#define CPU_SUBTYPE_XEON_MP				CPU_SUBTYPE_INTEL(12, 1)

#define CPU_SUBTYPE_INTEL_FAMILY(x)	((x) & 15)
#define CPU_SUBTYPE_INTEL_FAMILY_MAX	15

#define CPU_SUBTYPE_INTEL_MODEL(x)	((x) >> 4)
#define CPU_SUBTYPE_INTEL_MODEL_ALL	0

/*
 *	X86 subtypes.
 */

#define CPU_SUBTYPE_X86_ALL		((cpu_subtype_t)3)
#define CPU_SUBTYPE_X86_64_ALL		((cpu_subtype_t)3)
#define CPU_SUBTYPE_X86_ARCH1		((cpu_subtype_t)4)
#define CPU_SUBTYPE_X86_64_H		((cpu_subtype_t)8)	/* Haswell feature subset */


#define CPU_THREADTYPE_INTEL_HTT	((cpu_threadtype_t) 1)

/*
 *	Mips subtypes.
 */

#define	CPU_SUBTYPE_MIPS_ALL	((cpu_subtype_t) 0)
#define CPU_SUBTYPE_MIPS_R2300	((cpu_subtype_t) 1)
#define CPU_SUBTYPE_MIPS_R2600	((cpu_subtype_t) 2)
#define CPU_SUBTYPE_MIPS_R2800	((cpu_subtype_t) 3)
#define CPU_SUBTYPE_MIPS_R2000a	((cpu_subtype_t) 4)	/* pmax */
#define CPU_SUBTYPE_MIPS_R2000	((cpu_subtype_t) 5)
#define CPU_SUBTYPE_MIPS_R3000a	((cpu_subtype_t) 6)	/* 3max */
#define CPU_SUBTYPE_MIPS_R3000	((cpu_subtype_t) 7)

/*
 *	MC98000 (PowerPC) subtypes
 */
#define	CPU_SUBTYPE_MC98000_ALL	((cpu_subtype_t) 0)
#define CPU_SUBTYPE_MC98601	((cpu_subtype_t) 1)

/*
 *	HPPA subtypes for Hewlett-Packard HP-PA family of
 *	risc processors. Port by NeXT to 700 series. 
 */

#define	CPU_SUBTYPE_HPPA_ALL		((cpu_subtype_t) 0)
#define CPU_SUBTYPE_HPPA_7100		((cpu_subtype_t) 0) /* compat */
#define CPU_SUBTYPE_HPPA_7100LC		((cpu_subtype_t) 1)

/*
 *	MC88000 subtypes.
 */
#define	CPU_SUBTYPE_MC88000_ALL	((cpu_subtype_t) 0)
#define CPU_SUBTYPE_MC88100	((cpu_subtype_t) 1)
#define CPU_SUBTYPE_MC88110	((cpu_subtype_t) 2)

/*
 *	SPARC subtypes
 */
#define	CPU_SUBTYPE_SPARC_ALL		((cpu_subtype_t) 0)

/*
 *	I860 subtypes
 */
#define CPU_SUBTYPE_I860_ALL	((cpu_subtype_t) 0)
#define CPU_SUBTYPE_I860_860	((cpu_subtype_t) 1)

/*
 *	PowerPC subtypes
 */
#define CPU_SUBTYPE_POWERPC_ALL		((cpu_subtype_t) 0)
#define CPU_SUBTYPE_POWERPC_601		((cpu_subtype_t) 1)
#define CPU_SUBTYPE_POWERPC_602		((cpu_subtype_t) 2)
#define CPU_SUBTYPE_POWERPC_603		((cpu_subtype_t) 3)
#define CPU_SUBTYPE_POWERPC_603e	((cpu_subtype_t) 4)
#define CPU_SUBTYPE_POWERPC_603ev	((cpu_subtype_t) 5)
#define CPU_SUBTYPE_POWERPC_604		((cpu_subtype_t) 6)
#define CPU_SUBTYPE_POWERPC_604e	((cpu_subtype_t) 7)
#define CPU_SUBTYPE_POWERPC_620		((cpu_subtype_t) 8)
#define CPU_SUBTYPE_POWERPC_750		((cpu_subtype_t) 9)
#define CPU_SUBTYPE_POWERPC_7400	((cpu_subtype_t) 10)
#define CPU_SUBTYPE_POWERPC_7450	((cpu_subtype_t) 11)
#define CPU_SUBTYPE_POWERPC_970		((cpu_subtype_t) 100)

/*
 *	ARM subtypes
 */
#define CPU_SUBTYPE_ARM_ALL             ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_ARM_V4T             ((cpu_subtype_t) 5)
#define CPU_SUBTYPE_ARM_V6              ((cpu_subtype_t) 6)
#define CPU_SUBTYPE_ARM_V5TEJ           ((cpu_subtype_t) 7)
#define CPU_SUBTYPE_ARM_XSCALE		((cpu_subtype_t) 8)
#define CPU_SUBTYPE_ARM_V7		((cpu_subtype_t) 9)
#define CPU_SUBTYPE_ARM_V7F		((cpu_subtype_t) 10) /* Cortex A9 */
#define CPU_SUBTYPE_ARM_V7S		((cpu_subtype_t) 11) /* Swift */
#define CPU_SUBTYPE_ARM_V7K		((cpu_subtype_t) 12)
#define CPU_SUBTYPE_ARM_V6M		((cpu_subtype_t) 14) /* Not meant to be run under xnu */
#define CPU_SUBTYPE_ARM_V7M		((cpu_subtype_t) 15) /* Not meant to be run under xnu */
#define CPU_SUBTYPE_ARM_V7EM		((cpu_subtype_t) 16) /* Not meant to be run under xnu */

#define CPU_SUBTYPE_ARM_V8		((cpu_subtype_t) 13)

/*
 *  ARM64 subtypes
 */
#define CPU_SUBTYPE_ARM64_ALL           ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_ARM64_V8            ((cpu_subtype_t) 1)

#endif /* !__ASSEMBLER__ */

/*
 *	CPU families (sysctl hw.cpufamily)
 *
 * These are meant to identify the CPU's marketing name - an
 * application can map these to (possibly) localized strings.
 * NB: the encodings of the CPU families are intentionally arbitrary.
 * There is no ordering, and you should never try to deduce whether
 * or not some feature is available based on the family.
 * Use feature flags (eg, hw.optional.altivec) to test for optional
 * functionality.
 */
#define CPUFAMILY_UNKNOWN   		0
#define CPUFAMILY_POWERPC_G3		0xcee41549
#define CPUFAMILY_POWERPC_G4		0x77c184ae
#define CPUFAMILY_POWERPC_G5		0xed76d8aa
#define CPUFAMILY_INTEL_6_13		0xaa33392b
#define CPUFAMILY_INTEL_PENRYN		0x78ea4fbc
#define CPUFAMILY_INTEL_NEHALEM		0x6b5a4cd2
#define CPUFAMILY_INTEL_WESTMERE	0x573b5eec
#define CPUFAMILY_INTEL_SANDYBRIDGE	0x5490b78c
#define CPUFAMILY_INTEL_IVYBRIDGE	0x1f65e835
#define CPUFAMILY_INTEL_HASWELL		0x10b282dc
#define CPUFAMILY_INTEL_BROADWELL	0x582ed09c
#define CPUFAMILY_INTEL_SKYLAKE		0x37fc219f
#define CPUFAMILY_ARM_9			0xe73283ae
#define CPUFAMILY_ARM_11		0x8ff620d8
#define CPUFAMILY_ARM_XSCALE		0x53b005f5
#define CPUFAMILY_ARM_12                0xbd1b0ae9
#define CPUFAMILY_ARM_13		0x0cc90e64
#define CPUFAMILY_ARM_14		0x96077ef1
#define CPUFAMILY_ARM_15		0xa8511bca
#define CPUFAMILY_ARM_SWIFT 		0x1e2d6381
#define CPUFAMILY_ARM_CYCLONE		0x37a09642
#define CPUFAMILY_ARM_TYPHOON		0x2c91a47e
#define CPUFAMILY_ARM_TWISTER		0x92fb37c8
#define CPUFAMILY_ARM_HURRICANE		0x67ceee93

/* The following synonyms are deprecated: */
#define CPUFAMILY_INTEL_6_23	CPUFAMILY_INTEL_PENRYN
#define CPUFAMILY_INTEL_6_26	CPUFAMILY_INTEL_NEHALEM


#endif	/* _MACH_MACHINE_H_ */
Commit	Line	Data
1c79356b	1	/*
2d21ac55	2	* Copyright (c) 2000-2007 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* Mach Operating System
	30	* Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
	31	* All Rights Reserved.
	32	*
	33	* Permission to use, copy, modify and distribute this software and its
	34	* documentation is hereby granted, provided that both the copyright
	35	* notice and this permission notice appear in all copies of the
	36	* software, derivative works or modified versions, and any portions
	37	* thereof, and that both notices appear in supporting documentation.
	38	*
	39	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	40	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	41	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
	42	*
	43	* Carnegie Mellon requests users of this software to return to
	44	*
	45	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	46	* School of Computer Science
	47	* Carnegie Mellon University
	48	* Pittsburgh PA 15213-3890
	49	*
	50	* any improvements or extensions that they make and grant Carnegie Mellon
	51	* the rights to redistribute these changes.
	52	*/
	53	/* File: machine.h
	54	* Author: Avadis Tevanian, Jr.
	55	* Date: 1986
	56	*
	57	* Machine independent machine abstraction.
	58	*/
	59
	60	#ifndef _MACH_MACHINE_H_
	61	#define _MACH_MACHINE_H_
	62
316670eb A	63	#ifndef __ASSEMBLER__
316670eb A	64
91447636	65	#include <stdint.h>
1c79356b A	66	#include <mach/machine/vm_types.h>
	67	#include <mach/boolean.h>
	68
1c79356b A	69	typedef integer_t cpu_type_t;
1c79356b A	70	typedef integer_t cpu_subtype_t;
91447636	71	typedef integer_t cpu_threadtype_t;
1c79356b A	72
	73	#define CPU_STATE_MAX 4
	74
	75	#define CPU_STATE_USER 0
	76	#define CPU_STATE_SYSTEM 1
	77	#define CPU_STATE_IDLE 2
	78	#define CPU_STATE_NICE 3
	79
9bccf70c	80	#ifdef KERNEL_PRIVATE
91447636 A	81
	82	#include <sys/cdefs.h>
	83
	84	__BEGIN_DECLS
	85	cpu_type_t cpu_type(void);
	86
	87	cpu_subtype_t cpu_subtype(void);
	88
	89	cpu_threadtype_t cpu_threadtype(void);
	90	__END_DECLS
	91
	92	#ifdef MACH_KERNEL_PRIVATE
	93
	94	struct machine_info {
	95	integer_t major_version; /* kernel major version id */
	96	integer_t minor_version; /* kernel minor version id */
	97	integer_t max_cpus; /* max number of CPUs possible */
91447636 A	98	uint32_t memory_size; /* size of memory in bytes, capped at 2 GB */
91447636 A	99	uint64_t max_mem; /* actual size of physical memory */
2d21ac55	100	uint32_t physical_cpu; /* number of physical CPUs now available */
91447636	101	integer_t physical_cpu_max; /* max number of physical CPUs possible */
2d21ac55	102	uint32_t logical_cpu; /* number of logical cpu now available */
91447636	103	integer_t logical_cpu_max; /* max number of physical CPUs possible */
1c79356b A	104	};
1c79356b A	105
91447636 A	106	typedef struct machine_info *machine_info_t;
91447636 A	107	typedef struct machine_info machine_info_data_t;
1c79356b	108
1c79356b	109	extern struct machine_info machine_info;
9bccf70c	110
91447636 A	111	__BEGIN_DECLS
	112	cpu_type_t slot_type(
	113	int slot_num);
	114
	115	cpu_subtype_t slot_subtype(
	116	int slot_num);
	117
	118	cpu_threadtype_t slot_threadtype(
	119	int slot_num);
	120	__END_DECLS
	121
	122	#endif /* MACH_KERNEL_PRIVATE */
	123	#endif /* KERNEL_PRIVATE */
	124
	125
	126	/*
	127	* Capability bits used in the definition of cpu_type.
	128	*/
	129	#define CPU_ARCH_MASK 0xff000000 /* mask for architecture bits */
	130	#define CPU_ARCH_ABI64 0x01000000 /* 64 bit ABI */
1c79356b A	131
	132	/*
	133	* Machine types known by all.
	134	*/
	135
	136	#define CPU_TYPE_ANY ((cpu_type_t) -1)
	137
	138	#define CPU_TYPE_VAX ((cpu_type_t) 1)
	139	/* skip ((cpu_type_t) 2) */
	140	/* skip ((cpu_type_t) 3) */
	141	/* skip ((cpu_type_t) 4) */
	142	/* skip ((cpu_type_t) 5) */
	143	#define CPU_TYPE_MC680x0 ((cpu_type_t) 6)
c0fea474 A	144	#define CPU_TYPE_X86 ((cpu_type_t) 7)
	145	#define CPU_TYPE_I386 CPU_TYPE_X86 /* compatibility */
	146	#define CPU_TYPE_X86_64 (CPU_TYPE_X86 \| CPU_ARCH_ABI64)
	147
1c79356b A	148	/* skip CPU_TYPE_MIPS ((cpu_type_t) 8) */
	149	/* skip ((cpu_type_t) 9) */
	150	#define CPU_TYPE_MC98000 ((cpu_type_t) 10)
	151	#define CPU_TYPE_HPPA ((cpu_type_t) 11)
2d21ac55	152	#define CPU_TYPE_ARM ((cpu_type_t) 12)
fe8ab488	153	#define CPU_TYPE_ARM64 (CPU_TYPE_ARM \| CPU_ARCH_ABI64)
1c79356b A	154	#define CPU_TYPE_MC88000 ((cpu_type_t) 13)
	155	#define CPU_TYPE_SPARC ((cpu_type_t) 14)
	156	#define CPU_TYPE_I860 ((cpu_type_t) 15)
	157	/* skip CPU_TYPE_ALPHA ((cpu_type_t) 16) */
	158	/* skip ((cpu_type_t) 17) */
	159	#define CPU_TYPE_POWERPC ((cpu_type_t) 18)
91447636	160	#define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC \| CPU_ARCH_ABI64)
1c79356b A	161
	162	/*
	163	* Machine subtypes (these are defined here, instead of in a machine
	164	* dependent directory, so that any program can get all definitions
	165	* regardless of where is it compiled).
	166	*/
	167
2d21ac55 A	168	/*
	169	* Capability bits used in the definition of cpu_subtype.
	170	*/
	171	#define CPU_SUBTYPE_MASK 0xff000000 /* mask for feature flags */
	172	#define CPU_SUBTYPE_LIB64 0x80000000 /* 64 bit libraries */
	173
	174
1c79356b A	175	/*
	176	* Object files that are hand-crafted to run on any
	177	* implementation of an architecture are tagged with
	178	* CPU_SUBTYPE_MULTIPLE. This functions essentially the same as
	179	* the "ALL" subtype of an architecture except that it allows us
	180	* to easily find object files that may need to be modified
	181	* whenever a new implementation of an architecture comes out.
	182	*
	183	* It is the responsibility of the implementor to make sure the
	184	* software handles unsupported implementations elegantly.
	185	*/
	186	#define CPU_SUBTYPE_MULTIPLE ((cpu_subtype_t) -1)
	187	#define CPU_SUBTYPE_LITTLE_ENDIAN ((cpu_subtype_t) 0)
	188	#define CPU_SUBTYPE_BIG_ENDIAN ((cpu_subtype_t) 1)
	189
91447636 A	190	/*
	191	* Machine threadtypes.
	192	* This is none - not defined - for most machine types/subtypes.
	193	*/
	194	#define CPU_THREADTYPE_NONE ((cpu_threadtype_t) 0)
	195
1c79356b A	196	/*
	197	* VAX subtypes (these do not necessary conform to the actual cpu
	198	* ID assigned by DEC available via the SID register).
	199	*/
	200
	201	#define CPU_SUBTYPE_VAX_ALL ((cpu_subtype_t) 0)
	202	#define CPU_SUBTYPE_VAX780 ((cpu_subtype_t) 1)
	203	#define CPU_SUBTYPE_VAX785 ((cpu_subtype_t) 2)
	204	#define CPU_SUBTYPE_VAX750 ((cpu_subtype_t) 3)
	205	#define CPU_SUBTYPE_VAX730 ((cpu_subtype_t) 4)
	206	#define CPU_SUBTYPE_UVAXI ((cpu_subtype_t) 5)
	207	#define CPU_SUBTYPE_UVAXII ((cpu_subtype_t) 6)
	208	#define CPU_SUBTYPE_VAX8200 ((cpu_subtype_t) 7)
	209	#define CPU_SUBTYPE_VAX8500 ((cpu_subtype_t) 8)
	210	#define CPU_SUBTYPE_VAX8600 ((cpu_subtype_t) 9)
	211	#define CPU_SUBTYPE_VAX8650 ((cpu_subtype_t) 10)
	212	#define CPU_SUBTYPE_VAX8800 ((cpu_subtype_t) 11)
	213	#define CPU_SUBTYPE_UVAXIII ((cpu_subtype_t) 12)
	214
	215	/*
	216	* 680x0 subtypes
	217	*
	218	* The subtype definitions here are unusual for historical reasons.
	219	* NeXT used to consider 68030 code as generic 68000 code. For
	220	* backwards compatability:
	221	*
	222	* CPU_SUBTYPE_MC68030 symbol has been preserved for source code
	223	* compatability.
	224	*
	225	* CPU_SUBTYPE_MC680x0_ALL has been defined to be the same
	226	* subtype as CPU_SUBTYPE_MC68030 for binary comatability.
	227	*
	228	* CPU_SUBTYPE_MC68030_ONLY has been added to allow new object
	229	* files to be tagged as containing 68030-specific instructions.
	230	*/
	231
	232	#define CPU_SUBTYPE_MC680x0_ALL ((cpu_subtype_t) 1)
	233	#define CPU_SUBTYPE_MC68030 ((cpu_subtype_t) 1) /* compat */
	234	#define CPU_SUBTYPE_MC68040 ((cpu_subtype_t) 2)
	235	#define CPU_SUBTYPE_MC68030_ONLY ((cpu_subtype_t) 3)
	236
	237	/*
0c530ab8	238	* I386 subtypes
1c79356b A	239	*/
1c79356b A	240
1c79356b	241	#define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4))
c0fea474 A	242
	243	#define CPU_SUBTYPE_I386_ALL CPU_SUBTYPE_INTEL(3, 0)
	244	#define CPU_SUBTYPE_386 CPU_SUBTYPE_INTEL(3, 0)
	245	#define CPU_SUBTYPE_486 CPU_SUBTYPE_INTEL(4, 0)
	246	#define CPU_SUBTYPE_486SX CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128
	247	#define CPU_SUBTYPE_586 CPU_SUBTYPE_INTEL(5, 0)
1c79356b A	248	#define CPU_SUBTYPE_PENT CPU_SUBTYPE_INTEL(5, 0)
	249	#define CPU_SUBTYPE_PENTPRO CPU_SUBTYPE_INTEL(6, 1)
	250	#define CPU_SUBTYPE_PENTII_M3 CPU_SUBTYPE_INTEL(6, 3)
	251	#define CPU_SUBTYPE_PENTII_M5 CPU_SUBTYPE_INTEL(6, 5)
c0fea474 A	252	#define CPU_SUBTYPE_CELERON CPU_SUBTYPE_INTEL(7, 6)
	253	#define CPU_SUBTYPE_CELERON_MOBILE CPU_SUBTYPE_INTEL(7, 7)
	254	#define CPU_SUBTYPE_PENTIUM_3 CPU_SUBTYPE_INTEL(8, 0)
	255	#define CPU_SUBTYPE_PENTIUM_3_M CPU_SUBTYPE_INTEL(8, 1)
	256	#define CPU_SUBTYPE_PENTIUM_3_XEON CPU_SUBTYPE_INTEL(8, 2)
	257	#define CPU_SUBTYPE_PENTIUM_M CPU_SUBTYPE_INTEL(9, 0)
	258	#define CPU_SUBTYPE_PENTIUM_4 CPU_SUBTYPE_INTEL(10, 0)
	259	#define CPU_SUBTYPE_PENTIUM_4_M CPU_SUBTYPE_INTEL(10, 1)
	260	#define CPU_SUBTYPE_ITANIUM CPU_SUBTYPE_INTEL(11, 0)
	261	#define CPU_SUBTYPE_ITANIUM_2 CPU_SUBTYPE_INTEL(11, 1)
	262	#define CPU_SUBTYPE_XEON CPU_SUBTYPE_INTEL(12, 0)
	263	#define CPU_SUBTYPE_XEON_MP CPU_SUBTYPE_INTEL(12, 1)
1c79356b A	264
	265	#define CPU_SUBTYPE_INTEL_FAMILY(x) ((x) & 15)
	266	#define CPU_SUBTYPE_INTEL_FAMILY_MAX 15
	267
	268	#define CPU_SUBTYPE_INTEL_MODEL(x) ((x) >> 4)
	269	#define CPU_SUBTYPE_INTEL_MODEL_ALL 0
	270
c0fea474 A	271	/*
	272	* X86 subtypes.
	273	*/
	274
	275	#define CPU_SUBTYPE_X86_ALL ((cpu_subtype_t)3)
	276	#define CPU_SUBTYPE_X86_64_ALL ((cpu_subtype_t)3)
	277	#define CPU_SUBTYPE_X86_ARCH1 ((cpu_subtype_t)4)
fe8ab488	278	#define CPU_SUBTYPE_X86_64_H ((cpu_subtype_t)8) /* Haswell feature subset */
c0fea474	279
91447636 A	280
	281	#define CPU_THREADTYPE_INTEL_HTT ((cpu_threadtype_t) 1)
	282
1c79356b A	283	/*
	284	* Mips subtypes.
	285	*/
	286
	287	#define CPU_SUBTYPE_MIPS_ALL ((cpu_subtype_t) 0)
	288	#define CPU_SUBTYPE_MIPS_R2300 ((cpu_subtype_t) 1)
	289	#define CPU_SUBTYPE_MIPS_R2600 ((cpu_subtype_t) 2)
	290	#define CPU_SUBTYPE_MIPS_R2800 ((cpu_subtype_t) 3)
	291	#define CPU_SUBTYPE_MIPS_R2000a ((cpu_subtype_t) 4) /* pmax */
	292	#define CPU_SUBTYPE_MIPS_R2000 ((cpu_subtype_t) 5)
	293	#define CPU_SUBTYPE_MIPS_R3000a ((cpu_subtype_t) 6) /* 3max */
	294	#define CPU_SUBTYPE_MIPS_R3000 ((cpu_subtype_t) 7)
	295
	296	/*
	297	* MC98000 (PowerPC) subtypes
	298	*/
	299	#define CPU_SUBTYPE_MC98000_ALL ((cpu_subtype_t) 0)
	300	#define CPU_SUBTYPE_MC98601 ((cpu_subtype_t) 1)
	301
	302	/*
	303	* HPPA subtypes for Hewlett-Packard HP-PA family of
	304	* risc processors. Port by NeXT to 700 series.
	305	*/
	306
	307	#define CPU_SUBTYPE_HPPA_ALL ((cpu_subtype_t) 0)
	308	#define CPU_SUBTYPE_HPPA_7100 ((cpu_subtype_t) 0) /* compat */
	309	#define CPU_SUBTYPE_HPPA_7100LC ((cpu_subtype_t) 1)
	310
	311	/*
	312	* MC88000 subtypes.
	313	*/
	314	#define CPU_SUBTYPE_MC88000_ALL ((cpu_subtype_t) 0)
	315	#define CPU_SUBTYPE_MC88100 ((cpu_subtype_t) 1)
	316	#define CPU_SUBTYPE_MC88110 ((cpu_subtype_t) 2)
	317
	318	/*
	319	* SPARC subtypes
	320	*/
	321	#define CPU_SUBTYPE_SPARC_ALL ((cpu_subtype_t) 0)
	322
	323	/*
	324	* I860 subtypes
	325	*/
	326	#define CPU_SUBTYPE_I860_ALL ((cpu_subtype_t) 0)
	327	#define CPU_SUBTYPE_I860_860 ((cpu_subtype_t) 1)
	328
	329	/*
	330	* PowerPC subtypes
	331	*/
	332	#define CPU_SUBTYPE_POWERPC_ALL ((cpu_subtype_t) 0)
	333	#define CPU_SUBTYPE_POWERPC_601 ((cpu_subtype_t) 1)
	334	#define CPU_SUBTYPE_POWERPC_602 ((cpu_subtype_t) 2)
	335	#define CPU_SUBTYPE_POWERPC_603 ((cpu_subtype_t) 3)
	336	#define CPU_SUBTYPE_POWERPC_603e ((cpu_subtype_t) 4)
	337	#define CPU_SUBTYPE_POWERPC_603ev ((cpu_subtype_t) 5)
	338	#define CPU_SUBTYPE_POWERPC_604 ((cpu_subtype_t) 6)
	339	#define CPU_SUBTYPE_POWERPC_604e ((cpu_subtype_t) 7)
	340	#define CPU_SUBTYPE_POWERPC_620 ((cpu_subtype_t) 8)
	341	#define CPU_SUBTYPE_POWERPC_750 ((cpu_subtype_t) 9)
	342	#define CPU_SUBTYPE_POWERPC_7400 ((cpu_subtype_t) 10)
	343	#define CPU_SUBTYPE_POWERPC_7450 ((cpu_subtype_t) 11)
55e303ae	344	#define CPU_SUBTYPE_POWERPC_970 ((cpu_subtype_t) 100)
1c79356b	345
0c530ab8	346	/*
2d21ac55 A	347	* ARM subtypes
	348	*/
	349	#define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0)
	350	#define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5)
	351	#define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6)
4a3eedf9 A	352	#define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7)
4a3eedf9 A	353	#define CPU_SUBTYPE_ARM_XSCALE ((cpu_subtype_t) 8)
c910b4d9	354	#define CPU_SUBTYPE_ARM_V7 ((cpu_subtype_t) 9)
316670eb	355	#define CPU_SUBTYPE_ARM_V7F ((cpu_subtype_t) 10) /* Cortex A9 */
39236c6e	356	#define CPU_SUBTYPE_ARM_V7S ((cpu_subtype_t) 11) /* Swift */
fe8ab488	357	#define CPU_SUBTYPE_ARM_V7K ((cpu_subtype_t) 12)
39236c6e A	358	#define CPU_SUBTYPE_ARM_V6M ((cpu_subtype_t) 14) /* Not meant to be run under xnu */
	359	#define CPU_SUBTYPE_ARM_V7M ((cpu_subtype_t) 15) /* Not meant to be run under xnu */
	360	#define CPU_SUBTYPE_ARM_V7EM ((cpu_subtype_t) 16) /* Not meant to be run under xnu */
316670eb	361
fe8ab488 A	362	#define CPU_SUBTYPE_ARM_V8 ((cpu_subtype_t) 13)
	363
	364	/*
	365	* ARM64 subtypes
	366	*/
	367	#define CPU_SUBTYPE_ARM64_ALL ((cpu_subtype_t) 0)
	368	#define CPU_SUBTYPE_ARM64_V8 ((cpu_subtype_t) 1)
	369
316670eb	370	#endif /* !__ASSEMBLER__ */
2d21ac55 A	371
	372	/*
	373	* CPU families (sysctl hw.cpufamily)
0c530ab8	374	*
2d21ac55 A	375	* These are meant to identify the CPU's marketing name - an
2d21ac55 A	376	* application can map these to (possibly) localized strings.
0c530ab8 A	377	* NB: the encodings of the CPU families are intentionally arbitrary.
	378	* There is no ordering, and you should never try to deduce whether
	379	* or not some feature is available based on the family.
	380	* Use feature flags (eg, hw.optional.altivec) to test for optional
	381	* functionality.
	382	*/
7e4a7d39 A	383	#define CPUFAMILY_UNKNOWN 0
	384	#define CPUFAMILY_POWERPC_G3 0xcee41549
	385	#define CPUFAMILY_POWERPC_G4 0x77c184ae
	386	#define CPUFAMILY_POWERPC_G5 0xed76d8aa
	387	#define CPUFAMILY_INTEL_6_13 0xaa33392b
7e4a7d39 A	388	#define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc
7e4a7d39 A	389	#define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2
d1ecb069	390	#define CPUFAMILY_INTEL_WESTMERE 0x573b5eec
6d2010ae	391	#define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c
13f56ec4	392	#define CPUFAMILY_INTEL_IVYBRIDGE 0x1f65e835
bd504ef0	393	#define CPUFAMILY_INTEL_HASWELL 0x10b282dc
a1c7dba1	394	#define CPUFAMILY_INTEL_BROADWELL 0x582ed09c
2dced7af	395	#define CPUFAMILY_INTEL_SKYLAKE 0x37fc219f
7e4a7d39 A	396	#define CPUFAMILY_ARM_9 0xe73283ae
	397	#define CPUFAMILY_ARM_11 0x8ff620d8
	398	#define CPUFAMILY_ARM_XSCALE 0x53b005f5
39037602	399	#define CPUFAMILY_ARM_12 0xbd1b0ae9
7e4a7d39	400	#define CPUFAMILY_ARM_13 0x0cc90e64
6d2010ae	401	#define CPUFAMILY_ARM_14 0x96077ef1
fe8ab488	402	#define CPUFAMILY_ARM_15 0xa8511bca
39236c6e	403	#define CPUFAMILY_ARM_SWIFT 0x1e2d6381
fe8ab488	404	#define CPUFAMILY_ARM_CYCLONE 0x37a09642
3e170ce0	405	#define CPUFAMILY_ARM_TYPHOON 0x2c91a47e
490019cf	406	#define CPUFAMILY_ARM_TWISTER 0x92fb37c8
39037602	407	#define CPUFAMILY_ARM_HURRICANE 0x67ceee93
7e4a7d39 A	408
7e4a7d39 A	409	/* The following synonyms are deprecated: */
7e4a7d39 A	410	#define CPUFAMILY_INTEL_6_23 CPUFAMILY_INTEL_PENRYN
	411	#define CPUFAMILY_INTEL_6_26 CPUFAMILY_INTEL_NEHALEM
	412
0c530ab8	413
1c79356b	414	#endif /* _MACH_MACHINE_H_ */