[apple/xnu.git] / osfmk / ppc / ppc_init.c

/*
 * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#include <debug.h>
#include <mach_ldebug.h>
#include <mach_kdb.h>
#include <mach_kdp.h>

#include <kern/misc_protos.h>
#include <kern/thread.h>
#include <kern/processor.h>
#include <kern/startup.h>
#include <machine/machine_routines.h>
#include <ppc/boot.h>
#include <ppc/proc_reg.h>
#include <ppc/misc_protos.h>
#include <ppc/pmap.h>
#include <ppc/new_screen.h>
#include <ppc/exception.h>
#include <ppc/asm.h>
#include <ppc/Firmware.h>
#include <ppc/savearea.h>
#include <ppc/low_trace.h>
#include <ppc/Diagnostics.h>
#include <ppc/cpu_internal.h>
#include <ppc/mem.h>
#include <ppc/mappings.h>
#include <ppc/locks.h>
#include <ppc/pms.h>
#include <ppc/rtclock.h>

#include <pexpert/pexpert.h>

extern unsigned int mckFlags;
extern vm_offset_t	intstack;
extern vm_offset_t	debstack;  

int pc_trace_buf[1024] = {0};
int pc_trace_cnt = 1024;

extern unsigned int extPatchMCK;
extern unsigned int extPatch32;
extern unsigned int hwulckPatch_isync;
extern unsigned int hwulckPatch_eieio;
extern unsigned int hwulckbPatch_isync;
extern unsigned int hwulckbPatch_eieio;
extern unsigned int mulckPatch_isync;
extern unsigned int mulckPatch_eieio;
extern unsigned int mulckePatch_isync;
extern unsigned int mulckePatch_eieio;
extern unsigned int sulckPatch_isync;
extern unsigned int sulckPatch_eieio;
extern unsigned int rwlesPatch_isync;
extern unsigned int rwlesPatch_eieio;
extern unsigned int rwldPatch_isync;
extern unsigned int rwldPatch_eieio;
extern unsigned int retfsectPatch_eieio;
extern unsigned int retfsectPatch_isync;
extern unsigned int bcopy_nop_if_32bit;
extern unsigned int bcopy_nc_nop_if_32bit;
extern unsigned int memcpy_nop_if_32bit;
extern unsigned int xsum_nop_if_32bit;
extern unsigned int uft_nop_if_32bit;
extern unsigned int uft_uaw_nop_if_32bit;
extern unsigned int uft_cuttrace;

int forcenap = 0;
int wcte = 0;				/* Non-cache gather timer disabled */

patch_entry_t patch_table[] = {
	{&extPatch32,			0x60000000, PATCH_FEATURE,		PatchExt32},
	{&extPatchMCK,			0x60000000, PATCH_PROCESSOR,	CPU_SUBTYPE_POWERPC_970},
	{&hwulckPatch_isync,	0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&hwulckPatch_eieio,	0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&hwulckbPatch_isync,   0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&hwulckbPatch_eieio,   0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&mulckPatch_isync,		0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&mulckPatch_eieio,		0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&mulckePatch_isync,	0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&mulckePatch_eieio,	0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&sulckPatch_isync,		0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&sulckPatch_eieio,		0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&rwlesPatch_isync,		0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&rwlesPatch_eieio,		0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&rwldPatch_isync,		0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&rwldPatch_eieio,		0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
	{&bcopy_nop_if_32bit,	0x60000000, PATCH_FEATURE,		PatchExt32},
	{&bcopy_nc_nop_if_32bit,0x60000000, PATCH_FEATURE,		PatchExt32},
	{&memcpy_nop_if_32bit,	0x60000000, PATCH_FEATURE,		PatchExt32},
#if	!MACH_LDEBUG
	{&retfsectPatch_isync,	0x60000000, PATCH_FEATURE,		PatchLwsync},
	{&retfsectPatch_eieio,	0x7c2004ac, PATCH_FEATURE,		PatchLwsync},
#endif
	{&xsum_nop_if_32bit,	0x60000000,	PATCH_FEATURE,		PatchExt32},
	{&uft_nop_if_32bit,		0x60000000,	PATCH_FEATURE,		PatchExt32},
	{&uft_uaw_nop_if_32bit,	0x60000000,	PATCH_FEATURE,		PatchExt32},
	{&uft_cuttrace,			0x60000000,	PATCH_FEATURE,		PatchExt32},
    {NULL,                  0x00000000, PATCH_END_OF_TABLE, 0}
	};


/*
 * Forward definition
 */
void	ppc_init(
			boot_args	*args);

void	ppc_init_cpu(
			struct per_proc_info *proc_info);

/*
 *		Routine:		ppc_init
 *		Function:
 */
void
ppc_init(
		boot_args *args)
{
	unsigned int		maxmem;
	uint64_t			xmaxmem;
	uint64_t			newhid;
	unsigned int		cputrace;
	unsigned int		novmx;
	unsigned int		mcksoft;
	thread_t			thread;
	mapping_t			*mp;
	uint64_t 			scdata;


	/*
	 * Setup per_proc info for first cpu.
	 */

	BootProcInfo.cpu_number = 0;
	BootProcInfo.cpu_flags = 0;
	BootProcInfo.istackptr = 0;							/* we're on the interrupt stack */
	BootProcInfo.intstack_top_ss = (vm_offset_t)&intstack + INTSTACK_SIZE - FM_SIZE;
	BootProcInfo.debstack_top_ss = (vm_offset_t)&debstack + KERNEL_STACK_SIZE - FM_SIZE;
	BootProcInfo.debstackptr = BootProcInfo.debstack_top_ss;
	BootProcInfo.interrupts_enabled = 0;
	BootProcInfo.pending_ast = AST_NONE;
	BootProcInfo.FPU_owner = 0;
	BootProcInfo.VMX_owner = 0;
	BootProcInfo.pp_cbfr = console_per_proc_alloc(TRUE);
	BootProcInfo.rtcPop = EndOfAllTime;
	BootProcInfo.pp2ndPage = (addr64_t)&BootProcInfo;	/* Initial physical address of the second page */

 	BootProcInfo.pms.pmsStamp = 0;						/* Dummy transition time */
 	BootProcInfo.pms.pmsPop = EndOfAllTime;				/* Set the pop way into the future */
 	
 	BootProcInfo.pms.pmsState = pmsParked;				/* Park the power stepper */
	BootProcInfo.pms.pmsCSetCmd = pmsCInit;				/* Set dummy initial hardware state */
	
	mp = (mapping_t *)BootProcInfo.ppUMWmp;
	mp->mpFlags = 0x01000000 | mpLinkage | mpPerm | 1;
	mp->mpSpace = invalSpace;

	pmsInit();											/* Initialize the stepper */

	thread_bootstrap();

	thread = current_thread();
	thread->machine.curctx = &thread->machine.facctx;
	thread->machine.facctx.facAct = thread;
	thread->machine.umwSpace = invalSpace;				/* Initialize user memory window space to invalid */
	thread->machine.preemption_count = 1;

	cpu_bootstrap();
	cpu_init();

	master_cpu = 0;
	processor_bootstrap();

	timer_switch((uint32_t)mach_absolute_time(), &thread->system_timer);

	static_memory_end = round_page(args->topOfKernelData);;
      
	PE_init_platform(FALSE, args);						/* Get platform expert set up */

	if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0;	/* Special run without VMX? */
	if(novmx) {											/* Yeah, turn it off */
		BootProcInfo.pf.Available &= ~pfAltivec;		/* Turn off Altivec available */
		__asm__ volatile("mtsprg 2,%0" : : "r" (BootProcInfo.pf.Available));	/* Set live value */
	}

	if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0;	/* If force nap not set, make 0 */
	else {
		if(forcenap < 2) forcenap = forcenap + 1;		/* Else set 1 for off, 2 for on */
		else forcenap = 0;								/* Clear for error case */
	}
	
	if (!PE_parse_boot_arg("pmsx", &pmsExperimental)) pmsExperimental = 0;	/* Check if we should start in experimental power management stepper mode */
	if (!PE_parse_boot_arg("lcks", &LcksOpts)) LcksOpts = 0;	/* Set lcks options */
	if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags = 0;	/* Set diagnostic flags */
	if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF;	/* If tracing requested, enable it */

	if(PE_parse_boot_arg("ctrc", &cputrace)) {			/* See if tracing is limited to a specific cpu */
		trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) | (cputrace & 0xF);	/* Limit to 4 */
	}

	if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) {	/* See if non-default trace buffer size */
#if DEBUG
		trcWork.traceSize = 32;							/* Default 32 page trace table for DEBUG */
#else
		trcWork.traceSize = 8;							/* Default 8 page trace table for RELEASE */
#endif
	}

	if(trcWork.traceSize < 1) trcWork.traceSize = 1;	/* Minimum size of 1 page */
	if(trcWork.traceSize > 256) trcWork.traceSize = 256;	/* Maximum size of 256 pages */
	trcWork.traceSize = trcWork.traceSize * 4096;		/* Change page count to size */

	if (!PE_parse_boot_arg("maxmem", &maxmem))
		xmaxmem=0;
	else
		xmaxmem = (uint64_t)maxmem * (1024 * 1024);

	if (!PE_parse_boot_arg("wcte", &wcte)) wcte = 0;	/* If write combine timer enable not supplied, make 1 */
	else wcte = (wcte != 0);							/* Force to 0 or 1 */

	if (!PE_parse_boot_arg("mcklog", &mckFlags)) mckFlags = 0;	/* If machine check flags not specified, clear */
	else if(mckFlags > 1) mckFlags = 0;					/* If bogus, clear */
    
    if (!PE_parse_boot_arg("ht_shift", &hash_table_shift))  /* should we use a non-default hash table size? */
        hash_table_shift = 0;                           /* no, use default size */

	/*   
	 * VM initialization, after this we're using page tables...
	 */

	ppc_vm_init(xmaxmem, args);
	
	if(BootProcInfo.pf.Available & pf64Bit) {			/* Are we on a 64-bit machine */
		
		if(!wcte) {
			(void)ml_scom_read(GUSModeReg << 8, &scdata);	/* Get GUS mode register */
			scdata = scdata | GUSMstgttoff;					/* Disable the NCU store gather timer */
			(void)ml_scom_write(GUSModeReg << 8, scdata);	/* Get GUS mode register */
		}
		
		if(PE_parse_boot_arg("mcksoft", &mcksoft)) {	/* Have they supplied "machine check software recovery? */
			newhid = BootProcInfo.pf.pfHID5;			/* Get the old HID5 */
			if(mcksoft < 2) {
				newhid &= 0xFFFFFFFFFFFFDFFFULL;		/* Clear the old one */
				newhid |= (mcksoft & 1) << 13;			/* Set new value to enable machine check recovery */
				BootProcInfo.pf.pfHID5 = newhid;		/* Set the new one */
				hid5set64(newhid);						/* Set the hid for this processir */
			}
		}
	}
		
	machine_startup(args);
}

/*
 *		Routine:		ppc_init_cpu
 *		Function:
 */
void
ppc_init_cpu(
		struct per_proc_info	*proc_info) 
{
	uint64_t scdata;

	proc_info->cpu_flags &= ~SleepState;

	if((BootProcInfo.pf.Available & pf64Bit) && !wcte) {	/* Should we disable the store gather timer? */
		(void)ml_scom_read(GUSModeReg << 8, &scdata);	/* Get GUS mode register */
		scdata = scdata | GUSMstgttoff;					/* Disable the NCU store gather timer */
		(void)ml_scom_write(GUSModeReg << 8, scdata);	/* Get GUS mode register */
	}

	cpu_init();
	
	slave_main();
}
Commit	Line	Data
1c79356b	1	/*
3a60a9f5	2	* Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
8f6c56a5	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
8f6c56a5 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
	14	*
	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
8ad349bb	24	* limitations under the License.
8f6c56a5 A	25	*
8f6c56a5 A	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#include <debug.h>
55e303ae	33	#include <mach_ldebug.h>
1c79356b A	34	#include <mach_kdb.h>
	35	#include <mach_kdp.h>
	36
	37	#include <kern/misc_protos.h>
	38	#include <kern/thread.h>
	39	#include <kern/processor.h>
91447636	40	#include <kern/startup.h>
1c79356b A	41	#include <machine/machine_routines.h>
	42	#include <ppc/boot.h>
	43	#include <ppc/proc_reg.h>
	44	#include <ppc/misc_protos.h>
	45	#include <ppc/pmap.h>
	46	#include <ppc/new_screen.h>
	47	#include <ppc/exception.h>
91447636	48	#include <ppc/asm.h>
1c79356b A	49	#include <ppc/Firmware.h>
	50	#include <ppc/savearea.h>
	51	#include <ppc/low_trace.h>
	52	#include <ppc/Diagnostics.h>
91447636	53	#include <ppc/cpu_internal.h>
d52fe63f	54	#include <ppc/mem.h>
55e303ae	55	#include <ppc/mappings.h>
91447636	56	#include <ppc/locks.h>
8f6c56a5	57	#include <ppc/pms.h>
3a60a9f5	58	#include <ppc/rtclock.h>
1c79356b A	59
	60	#include <pexpert/pexpert.h>
	61
91447636 A	62	extern unsigned int mckFlags;
	63	extern vm_offset_t intstack;
	64	extern vm_offset_t debstack;
1c79356b	65
1c79356b A	66	int pc_trace_buf[1024] = {0};
	67	int pc_trace_cnt = 1024;
	68
55e303ae A	69	extern unsigned int extPatchMCK;
	70	extern unsigned int extPatch32;
	71	extern unsigned int hwulckPatch_isync;
	72	extern unsigned int hwulckPatch_eieio;
	73	extern unsigned int hwulckbPatch_isync;
	74	extern unsigned int hwulckbPatch_eieio;
	75	extern unsigned int mulckPatch_isync;
	76	extern unsigned int mulckPatch_eieio;
91447636 A	77	extern unsigned int mulckePatch_isync;
91447636 A	78	extern unsigned int mulckePatch_eieio;
55e303ae A	79	extern unsigned int sulckPatch_isync;
55e303ae A	80	extern unsigned int sulckPatch_eieio;
91447636 A	81	extern unsigned int rwlesPatch_isync;
	82	extern unsigned int rwlesPatch_eieio;
	83	extern unsigned int rwldPatch_isync;
	84	extern unsigned int rwldPatch_eieio;
55e303ae A	85	extern unsigned int retfsectPatch_eieio;
55e303ae A	86	extern unsigned int retfsectPatch_isync;
91447636 A	87	extern unsigned int bcopy_nop_if_32bit;
	88	extern unsigned int bcopy_nc_nop_if_32bit;
	89	extern unsigned int memcpy_nop_if_32bit;
	90	extern unsigned int xsum_nop_if_32bit;
	91	extern unsigned int uft_nop_if_32bit;
	92	extern unsigned int uft_uaw_nop_if_32bit;
b36670ce	93	extern unsigned int uft_cuttrace;
55e303ae A	94
55e303ae A	95	int forcenap = 0;
91447636	96	int wcte = 0; /* Non-cache gather timer disabled */
55e303ae	97
91447636 A	98	patch_entry_t patch_table[] = {
	99	{&extPatch32, 0x60000000, PATCH_FEATURE, PatchExt32},
	100	{&extPatchMCK, 0x60000000, PATCH_PROCESSOR, CPU_SUBTYPE_POWERPC_970},
	101	{&hwulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	102	{&hwulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	103	{&hwulckbPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	104	{&hwulckbPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	105	{&mulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	106	{&mulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	107	{&mulckePatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	108	{&mulckePatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	109	{&sulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	110	{&sulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	111	{&rwlesPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	112	{&rwlesPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	113	{&rwldPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
	114	{&rwldPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
	115	{&bcopy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
	116	{&bcopy_nc_nop_if_32bit,0x60000000, PATCH_FEATURE, PatchExt32},
	117	{&memcpy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
55e303ae	118	#if !MACH_LDEBUG
91447636 A	119	{&retfsectPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
91447636 A	120	{&retfsectPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
55e303ae	121	#endif
91447636 A	122	{&xsum_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
	123	{&uft_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
	124	{&uft_uaw_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
b36670ce	125	{&uft_cuttrace, 0x60000000, PATCH_FEATURE, PatchExt32},
91447636	126	{NULL, 0x00000000, PATCH_END_OF_TABLE, 0}
55e303ae A	127	};
55e303ae A	128
3a60a9f5	129
91447636 A	130	/*
	131	* Forward definition
	132	*/
	133	void ppc_init(
	134	boot_args *args);
	135
	136	void ppc_init_cpu(
	137	struct per_proc_info *proc_info);
	138
	139	/*
	140	* Routine: ppc_init
	141	* Function:
	142	*/
	143	void
	144	ppc_init(
	145	boot_args *args)
1c79356b	146	{
91447636 A	147	unsigned int maxmem;
	148	uint64_t xmaxmem;
	149	uint64_t newhid;
	150	unsigned int cputrace;
	151	unsigned int novmx;
	152	unsigned int mcksoft;
	153	thread_t thread;
	154	mapping_t *mp;
	155	uint64_t scdata;
	156
a3d08fcd A	157
a3d08fcd A	158
1c79356b A	159	/*
	160	* Setup per_proc info for first cpu.
	161	*/
	162
91447636 A	163	BootProcInfo.cpu_number = 0;
91447636 A	164	BootProcInfo.cpu_flags = 0;
3a60a9f5	165	BootProcInfo.istackptr = 0; /* we're on the interrupt stack */
91447636 A	166	BootProcInfo.intstack_top_ss = (vm_offset_t)&intstack + INTSTACK_SIZE - FM_SIZE;
	167	BootProcInfo.debstack_top_ss = (vm_offset_t)&debstack + KERNEL_STACK_SIZE - FM_SIZE;
	168	BootProcInfo.debstackptr = BootProcInfo.debstack_top_ss;
	169	BootProcInfo.interrupts_enabled = 0;
	170	BootProcInfo.pending_ast = AST_NONE;
	171	BootProcInfo.FPU_owner = 0;
	172	BootProcInfo.VMX_owner = 0;
	173	BootProcInfo.pp_cbfr = console_per_proc_alloc(TRUE);
3a60a9f5 A	174	BootProcInfo.rtcPop = EndOfAllTime;
	175	BootProcInfo.pp2ndPage = (addr64_t)&BootProcInfo; /* Initial physical address of the second page */
	176
	177	BootProcInfo.pms.pmsStamp = 0; /* Dummy transition time */
	178	BootProcInfo.pms.pmsPop = EndOfAllTime; /* Set the pop way into the future */
	179
	180	BootProcInfo.pms.pmsState = pmsParked; /* Park the power stepper */
	181	BootProcInfo.pms.pmsCSetCmd = pmsCInit; /* Set dummy initial hardware state */
	182
91447636 A	183	mp = (mapping_t *)BootProcInfo.ppUMWmp;
91447636 A	184	mp->mpFlags = 0x01000000 \| mpLinkage \| mpPerm \| 1;
55e303ae	185	mp->mpSpace = invalSpace;
1c79356b	186
3a60a9f5 A	187	pmsInit(); /* Initialize the stepper */
3a60a9f5 A	188
55e303ae A	189	thread_bootstrap();
55e303ae A	190
91447636 A	191	thread = current_thread();
	192	thread->machine.curctx = &thread->machine.facctx;
	193	thread->machine.facctx.facAct = thread;
3a60a9f5	194	thread->machine.umwSpace = invalSpace; /* Initialize user memory window space to invalid */
91447636	195	thread->machine.preemption_count = 1;
55e303ae	196
91447636	197	cpu_bootstrap();
1c79356b A	198	cpu_init();
1c79356b A	199
1c79356b	200	master_cpu = 0;
91447636 A	201	processor_bootstrap();
	202
	203	timer_switch((uint32_t)mach_absolute_time(), &thread->system_timer);
1c79356b	204
91447636	205	static_memory_end = round_page(args->topOfKernelData);;
55e303ae	206
3a60a9f5	207	PE_init_platform(FALSE, args); /* Get platform expert set up */
de355530	208
55e303ae	209	if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0; /* Special run without VMX? */
3a60a9f5 A	210	if(novmx) { /* Yeah, turn it off */
3a60a9f5 A	211	BootProcInfo.pf.Available &= ~pfAltivec; /* Turn off Altivec available */
91447636	212	__asm__ volatile("mtsprg 2,%0" : : "r" (BootProcInfo.pf.Available)); /* Set live value */
55e303ae	213	}
de355530	214
55e303ae A	215	if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0; /* If force nap not set, make 0 */
55e303ae A	216	else {
3a60a9f5 A	217	if(forcenap < 2) forcenap = forcenap + 1; /* Else set 1 for off, 2 for on */
3a60a9f5 A	218	else forcenap = 0; /* Clear for error case */
1c79356b A	219	}
1c79356b A	220
3a60a9f5 A	221	if (!PE_parse_boot_arg("pmsx", &pmsExperimental)) pmsExperimental = 0; /* Check if we should start in experimental power management stepper mode */
	222	if (!PE_parse_boot_arg("lcks", &LcksOpts)) LcksOpts = 0; /* Set lcks options */
	223	if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags = 0; /* Set diagnostic flags */
1c79356b A	224	if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF; /* If tracing requested, enable it */
1c79356b A	225
3a60a9f5	226	if(PE_parse_boot_arg("ctrc", &cputrace)) { /* See if tracing is limited to a specific cpu */
9bccf70c A	227	trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) \| (cputrace & 0xF); /* Limit to 4 */
	228	}
	229
55e303ae	230	if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) { /* See if non-default trace buffer size */
de355530	231	#if DEBUG
3a60a9f5	232	trcWork.traceSize = 32; /* Default 32 page trace table for DEBUG */
55e303ae	233	#else
3a60a9f5	234	trcWork.traceSize = 8; /* Default 8 page trace table for RELEASE */
55e303ae	235	#endif
de355530	236	}
de355530	237
55e303ae A	238	if(trcWork.traceSize < 1) trcWork.traceSize = 1; /* Minimum size of 1 page */
55e303ae A	239	if(trcWork.traceSize > 256) trcWork.traceSize = 256; /* Maximum size of 256 pages */
e5568f75	240	trcWork.traceSize = trcWork.traceSize * 4096; /* Change page count to size */
55e303ae	241
1c79356b	242	if (!PE_parse_boot_arg("maxmem", &maxmem))
55e303ae	243	xmaxmem=0;
1c79356b	244	else
55e303ae	245	xmaxmem = (uint64_t)maxmem * (1024 * 1024);
1c79356b	246
91447636 A	247	if (!PE_parse_boot_arg("wcte", &wcte)) wcte = 0; /* If write combine timer enable not supplied, make 1 */
	248	else wcte = (wcte != 0); /* Force to 0 or 1 */
	249
	250	if (!PE_parse_boot_arg("mcklog", &mckFlags)) mckFlags = 0; /* If machine check flags not specified, clear */
3a60a9f5	251	else if(mckFlags > 1) mckFlags = 0; /* If bogus, clear */
91447636 A	252
	253	if (!PE_parse_boot_arg("ht_shift", &hash_table_shift)) /* should we use a non-default hash table size? */
	254	hash_table_shift = 0; /* no, use default size */
	255
	256	/*
	257	* VM initialization, after this we're using page tables...
	258	*/
1c79356b	259
55e303ae A	260	ppc_vm_init(xmaxmem, args);
55e303ae A	261
91447636 A	262	if(BootProcInfo.pf.Available & pf64Bit) { /* Are we on a 64-bit machine */
	263
	264	if(!wcte) {
	265	(void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */
	266	scdata = scdata \| GUSMstgttoff; /* Disable the NCU store gather timer */
	267	(void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */
	268	}
	269
	270	if(PE_parse_boot_arg("mcksoft", &mcksoft)) { /* Have they supplied "machine check software recovery? */
	271	newhid = BootProcInfo.pf.pfHID5; /* Get the old HID5 */
	272	if(mcksoft < 2) {
e5568f75	273	newhid &= 0xFFFFFFFFFFFFDFFFULL; /* Clear the old one */
91447636 A	274	newhid \|= (mcksoft & 1) << 13; /* Set new value to enable machine check recovery */
91447636 A	275	BootProcInfo.pf.pfHID5 = newhid; /* Set the new one */
e5568f75 A	276	hid5set64(newhid); /* Set the hid for this processir */
	277	}
	278	}
	279	}
3a60a9f5	280
1c79356b A	281	machine_startup(args);
	282	}
	283
91447636 A	284	/*
	285	* Routine: ppc_init_cpu
	286	* Function:
	287	*/
	288	void
1c79356b	289	ppc_init_cpu(
91447636	290	struct per_proc_info *proc_info)
1c79356b	291	{
91447636	292	uint64_t scdata;
1c79356b	293
55e303ae A	294	proc_info->cpu_flags &= ~SleepState;
55e303ae A	295
91447636 A	296	if((BootProcInfo.pf.Available & pf64Bit) && !wcte) { /* Should we disable the store gather timer? */
	297	(void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */
	298	scdata = scdata \| GUSMstgttoff; /* Disable the NCU store gather timer */
	299	(void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */
	300	}
	301
1c79356b	302	cpu_init();
55e303ae	303
1c79356b A	304	slave_main();
1c79356b A	305	}