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1c79356b A |
1 | /* |
2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_LICENSE_HEADER_START@ | |
5 | * | |
43866e37 | 6 | * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved. |
1c79356b | 7 | * |
43866e37 A |
8 | * This file contains Original Code and/or Modifications of Original Code |
9 | * as defined in and that are subject to the Apple Public Source License | |
10 | * Version 2.0 (the 'License'). You may not use this file except in | |
11 | * compliance with the License. Please obtain a copy of the License at | |
12 | * http://www.opensource.apple.com/apsl/ and read it before using this | |
13 | * file. | |
14 | * | |
15 | * The Original Code and all software distributed under the License are | |
16 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
1c79356b A |
17 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
18 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
43866e37 A |
19 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. |
20 | * Please see the License for the specific language governing rights and | |
21 | * limitations under the License. | |
1c79356b A |
22 | * |
23 | * @APPLE_LICENSE_HEADER_END@ | |
24 | */ | |
25 | /* | |
26 | * @OSF_COPYRIGHT@ | |
27 | */ | |
28 | ||
29 | #include <debug.h> | |
55e303ae | 30 | #include <mach_ldebug.h> |
1c79356b A |
31 | #include <mach_kdb.h> |
32 | #include <mach_kdp.h> | |
33 | ||
34 | #include <kern/misc_protos.h> | |
35 | #include <kern/thread.h> | |
36 | #include <kern/processor.h> | |
37 | #include <machine/machine_routines.h> | |
38 | #include <ppc/boot.h> | |
39 | #include <ppc/proc_reg.h> | |
40 | #include <ppc/misc_protos.h> | |
41 | #include <ppc/pmap.h> | |
42 | #include <ppc/new_screen.h> | |
43 | #include <ppc/exception.h> | |
44 | #include <ppc/Firmware.h> | |
45 | #include <ppc/savearea.h> | |
46 | #include <ppc/low_trace.h> | |
47 | #include <ppc/Diagnostics.h> | |
d52fe63f | 48 | #include <ppc/mem.h> |
55e303ae | 49 | #include <ppc/mappings.h> |
1c79356b A |
50 | |
51 | #include <pexpert/pexpert.h> | |
52 | ||
1c79356b | 53 | extern unsigned int intstack_top_ss; /* declared in start.s */ |
55e303ae | 54 | extern unsigned int debstackptr; /* declared in start.s */ |
1c79356b | 55 | extern unsigned int debstack_top_ss; /* declared in start.s */ |
1c79356b | 56 | |
1c79356b A |
57 | int pc_trace_buf[1024] = {0}; |
58 | int pc_trace_cnt = 1024; | |
59 | ||
55e303ae A |
60 | extern unsigned int extPatchMCK; |
61 | extern unsigned int extPatch32; | |
62 | extern unsigned int hwulckPatch_isync; | |
63 | extern unsigned int hwulckPatch_eieio; | |
64 | extern unsigned int hwulckbPatch_isync; | |
65 | extern unsigned int hwulckbPatch_eieio; | |
66 | extern unsigned int mulckPatch_isync; | |
67 | extern unsigned int mulckPatch_eieio; | |
68 | extern unsigned int sulckPatch_isync; | |
69 | extern unsigned int sulckPatch_eieio; | |
70 | extern unsigned int retfsectPatch_eieio; | |
71 | extern unsigned int retfsectPatch_isync; | |
72 | ||
73 | int forcenap = 0; | |
74 | ||
75 | patch_entry_t patch_table[PATCH_TABLE_SIZE] = { | |
76 | &extPatch32, 0x60000000, PATCH_FEATURE, PatchExt32, | |
77 | &extPatchMCK, 0x60000000, PATCH_PROCESSOR, CPU_SUBTYPE_POWERPC_970, | |
78 | &hwulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync, | |
79 | &hwulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync, | |
80 | &hwulckbPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync, | |
81 | &hwulckbPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync, | |
82 | &mulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync, | |
83 | &mulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync, | |
84 | &sulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync, | |
85 | &sulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync, | |
86 | #if !MACH_LDEBUG | |
87 | &retfsectPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync, | |
88 | &retfsectPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync | |
89 | #else | |
90 | 0, 0, PATCH_INVALID, 0, | |
91 | 0, 0, PATCH_INVALID, 0 | |
92 | #endif | |
93 | }; | |
94 | ||
1c79356b A |
95 | void ppc_init(boot_args *args) |
96 | { | |
97 | int i; | |
98 | unsigned long *src,*dst; | |
99 | char *str; | |
100 | unsigned long addr, videoAddr; | |
101 | unsigned int maxmem; | |
55e303ae | 102 | uint64_t xmaxmem; |
9bccf70c | 103 | unsigned int cputrace; |
55e303ae | 104 | unsigned int novmx; |
1c79356b | 105 | extern vm_offset_t static_memory_end; |
55e303ae A |
106 | thread_t thread; |
107 | mapping *mp; | |
1c79356b A |
108 | |
109 | /* | |
110 | * Setup per_proc info for first cpu. | |
111 | */ | |
112 | ||
113 | per_proc_info[0].cpu_number = 0; | |
114 | per_proc_info[0].cpu_flags = 0; | |
115 | per_proc_info[0].istackptr = 0; /* we're on the interrupt stack */ | |
116 | per_proc_info[0].intstack_top_ss = intstack_top_ss; | |
1c79356b A |
117 | per_proc_info[0].debstackptr = debstackptr; |
118 | per_proc_info[0].debstack_top_ss = debstack_top_ss; | |
0b4e3aa0 | 119 | per_proc_info[0].interrupts_enabled = 0; |
55e303ae | 120 | per_proc_info[0].pp_preemption_count = -1; |
9bccf70c A |
121 | per_proc_info[0].pp_simple_lock_count = 0; |
122 | per_proc_info[0].pp_interrupt_level = 0; | |
55e303ae | 123 | per_proc_info[0].need_ast = (unsigned int)&need_ast[0]; |
9bccf70c A |
124 | per_proc_info[0].FPU_owner = 0; |
125 | per_proc_info[0].VMX_owner = 0; | |
55e303ae A |
126 | mp = (mapping *)per_proc_info[0].ppCIOmp; |
127 | mp->mpFlags = 0x01000000 | mpSpecial | 1; | |
128 | mp->mpSpace = invalSpace; | |
1c79356b A |
129 | |
130 | machine_slot[0].is_cpu = TRUE; | |
131 | ||
55e303ae A |
132 | thread_bootstrap(); |
133 | ||
134 | thread = current_act(); | |
135 | thread->mact.curctx = &thread->mact.facctx; | |
136 | thread->mact.facctx.facAct = thread; | |
137 | thread->mact.cioSpace = invalSpace; /* Initialize copyin/out space to invalid */ | |
138 | thread->mact.preemption_count = 1; | |
139 | ||
1c79356b A |
140 | cpu_init(); |
141 | ||
142 | /* | |
143 | * Setup some processor related structures to satisfy funnels. | |
144 | * Must be done before using unparallelized device drivers. | |
145 | */ | |
146 | processor_ptr[0] = &processor_array[0]; | |
147 | master_cpu = 0; | |
148 | master_processor = cpu_to_processor(master_cpu); | |
149 | ||
55e303ae A |
150 | static_memory_end = round_page_32(args->topOfKernelData);; |
151 | ||
152 | PE_init_platform(FALSE, args); /* Get platform expert set up */ | |
de355530 | 153 | |
55e303ae A |
154 | if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0; /* Special run without VMX? */ |
155 | if(novmx) { /* Yeah, turn it off */ | |
156 | for(i = 0; i < NCPUS; i++) { /* Cycle through all potential processors */ | |
157 | per_proc_info[i].pf.Available &= ~pfAltivec; /* Turn off Altivec available */ | |
158 | } | |
159 | __asm__ volatile("mtsprg 2,%0" : : "r" (per_proc_info[0].pf.Available)); /* Set live value */ | |
160 | } | |
de355530 | 161 | |
55e303ae A |
162 | if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0; /* If force nap not set, make 0 */ |
163 | else { | |
164 | if(forcenap < 2) forcenap = forcenap + 1; /* Else set 1 for off, 2 for on */ | |
165 | else forcenap = 0; /* Clear for error case */ | |
1c79356b A |
166 | } |
167 | ||
1c79356b A |
168 | if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags=0; /* Set diagnostic flags */ |
169 | if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF; /* If tracing requested, enable it */ | |
170 | ||
9bccf70c A |
171 | if(PE_parse_boot_arg("ctrc", &cputrace)) { /* See if tracing is limited to a specific cpu */ |
172 | trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) | (cputrace & 0xF); /* Limit to 4 */ | |
173 | } | |
174 | ||
55e303ae | 175 | if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) { /* See if non-default trace buffer size */ |
de355530 | 176 | #if DEBUG |
55e303ae A |
177 | trcWork.traceSize = 32; /* Default 32 page trace table for DEBUG */ |
178 | #else | |
179 | trcWork.traceSize = 8; /* Default 8 page trace table for RELEASE */ | |
180 | #endif | |
de355530 | 181 | } |
de355530 | 182 | |
55e303ae A |
183 | if(trcWork.traceSize < 1) trcWork.traceSize = 1; /* Minimum size of 1 page */ |
184 | if(trcWork.traceSize > 256) trcWork.traceSize = 256; /* Maximum size of 256 pages */ | |
185 | trcWork.traceSize = trcWork.traceSize * 4096; /* Change page count to size */ | |
186 | ||
1c79356b | 187 | if (!PE_parse_boot_arg("maxmem", &maxmem)) |
55e303ae | 188 | xmaxmem=0; |
1c79356b | 189 | else |
55e303ae | 190 | xmaxmem = (uint64_t)maxmem * (1024 * 1024); |
1c79356b | 191 | |
55e303ae A |
192 | /* |
193 | * VM initialization, after this we're using page tables... | |
194 | */ | |
1c79356b | 195 | |
55e303ae A |
196 | ppc_vm_init(xmaxmem, args); |
197 | ||
1c79356b A |
198 | PE_init_platform(TRUE, args); |
199 | ||
200 | machine_startup(args); | |
201 | } | |
202 | ||
203 | ppc_init_cpu( | |
204 | struct per_proc_info *proc_info) | |
205 | { | |
206 | int i; | |
1c79356b | 207 | |
55e303ae A |
208 | proc_info->cpu_flags &= ~SleepState; |
209 | ||
9bccf70c | 210 | if(!(proc_info->next_savearea)) /* Do we have a savearea set up already? */ |
55e303ae | 211 | proc_info->next_savearea = (uint64_t)save_get_init(); /* Get a savearea */ |
1c79356b A |
212 | |
213 | cpu_init(); | |
55e303ae | 214 | |
1c79356b A |
215 | ppc_vm_cpu_init(proc_info); |
216 | ||
217 | ml_thrm_init(); /* Start thermal monitoring on this processor */ | |
218 | ||
219 | slave_main(); | |
220 | } |