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1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
43866e37 6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
1c79356b 7 *
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8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
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22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25/*
26 * @OSF_COPYRIGHT@
27 */
28/*
29 * Mach Operating System
30 * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
31 * All Rights Reserved.
32 *
33 * Permission to use, copy, modify and distribute this software and its
34 * documentation is hereby granted, provided that both the copyright
35 * notice and this permission notice appear in all copies of the
36 * software, derivative works or modified versions, and any portions
37 * thereof, and that both notices appear in supporting documentation.
38 *
39 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
40 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
41 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
42 *
43 * Carnegie Mellon requests users of this software to return to
44 *
45 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
46 * School of Computer Science
47 * Carnegie Mellon University
48 * Pittsburgh PA 15213-3890
49 *
50 * any improvements or extensions that they make and grant Carnegie Mellon
51 * the rights to redistribute these changes.
52 */
53/*
54 */
55
56/*
57 *
58 * This file contains routines to check whether an ast is needed.
59 *
60 * ast_check() - check whether ast is needed for interrupt or context
61 * switch. Usually called by clock interrupt handler.
62 *
63 */
64
65#include <cputypes.h>
66#include <cpus.h>
67#include <platforms.h>
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68
69#include <kern/ast.h>
70#include <kern/counters.h>
71#include <kern/cpu_number.h>
72#include <kern/misc_protos.h>
73#include <kern/queue.h>
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74#include <kern/sched_prim.h>
75#include <kern/thread.h>
76#include <kern/thread_act.h>
77#include <kern/thread_swap.h>
78#include <kern/processor.h>
79#include <kern/spl.h>
80#include <mach/policy.h>
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81
82volatile ast_t need_ast[NCPUS];
83
84void
85ast_init(void)
86{
87#ifndef MACHINE_AST
88 register int i;
89
90 for (i=0; i<NCPUS; i++) {
91 need_ast[i] = AST_NONE;
92 }
93#endif /* MACHINE_AST */
94}
95
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96/*
97 * Called at splsched.
98 */
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99void
100ast_taken(
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101 ast_t reasons,
102 boolean_t enable
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103)
104{
0b4e3aa0 105 register thread_t self = current_thread();
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106 register int mycpu = cpu_number();
107 boolean_t preempt_trap = (reasons == AST_PREEMPTION);
1c79356b 108
0b4e3aa0 109 reasons &= need_ast[mycpu];
1c79356b 110 need_ast[mycpu] &= ~reasons;
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111
112 /*
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113 * Handle ASTs for all threads
114 * except idle processor threads.
1c79356b 115 */
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116 if (!(self->state & TH_IDLE)) {
117 /*
118 * Check for urgent preemption.
119 */
120 if ( (reasons & AST_URGENT) &&
121 wait_queue_assert_possible(self) ) {
122 if (reasons & AST_PREEMPT) {
123 counter(c_ast_taken_block++);
124 thread_block_reason(THREAD_CONTINUE_NULL,
125 AST_PREEMPT | AST_URGENT);
126 }
127
128 reasons &= ~AST_PREEMPTION;
1c79356b 129 }
0b4e3aa0 130
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131 /*
132 * The kernel preempt traps
133 * skip all other ASTs.
134 */
135 if (!preempt_trap) {
136 ml_set_interrupts_enabled(enable);
0b4e3aa0 137
1c79356b 138#ifdef MACH_BSD
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139 /*
140 * Handle BSD hook.
141 */
142 if (reasons & AST_BSD) {
143 extern void bsd_ast(thread_act_t act);
144 thread_act_t act = self->top_act;
145
146 thread_ast_clear(act, AST_BSD);
147 bsd_ast(act);
148 }
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149#endif
150
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151 /*
152 * Thread APC hook.
153 */
154 if (reasons & AST_APC)
155 act_execute_returnhandlers();
156
157 ml_set_interrupts_enabled(FALSE);
158
159 /*
160 * Check for preemption.
161 */
162 if (reasons & AST_PREEMPT) {
163 processor_t myprocessor = current_processor();
164
165 if (csw_needed(self, myprocessor))
166 reasons = AST_PREEMPT;
167 else
168 reasons = AST_NONE;
169 }
170 if ( (reasons & AST_PREEMPT) &&
171 wait_queue_assert_possible(self) ) {
172 counter(c_ast_taken_block++);
173 thread_block_reason(thread_exception_return, AST_PREEMPT);
174 }
175 }
1c79356b 176 }
0b4e3aa0 177
55e303ae 178 ml_set_interrupts_enabled(enable);
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179}
180
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181/*
182 * Called at splsched.
183 */
1c79356b 184void
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185ast_check(
186 processor_t processor)
1c79356b 187{
55e303ae 188 register thread_t self = processor->active_thread;
1c79356b 189
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190 processor->current_pri = self->sched_pri;
191 if (processor->state == PROCESSOR_RUNNING) {
192 register ast_t preempt;
193processor_running:
1c79356b 194
1c79356b 195 /*
0b4e3aa0 196 * Propagate thread ast to processor.
1c79356b 197 */
0b4e3aa0 198 ast_propagate(self->top_act->ast);
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199
200 /*
201 * Context switch check.
202 */
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203 if ((preempt = csw_check(self, processor)) != AST_NONE)
204 ast_on(preempt);
1c79356b 205 }
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206 else
207 if ( processor->state == PROCESSOR_DISPATCHING ||
208 processor->state == PROCESSOR_IDLE ) {
209 return;
210 }
211 else
212 if (processor->state == PROCESSOR_SHUTDOWN)
213 goto processor_running;
1c79356b 214}