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1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25/*
26 * @OSF_COPYRIGHT@
27 */
28
29#include <mach_kdb.h>
30#include <mach_kgdb.h>
31#include <mach_debug.h>
32#include <assym.s>
33#include <ppc/asm.h>
34#include <ppc/proc_reg.h>
35#include <mach/ppc/vm_param.h>
36
37/*
38 * vm_offset_t getrpc(void) - Return address of the function
39 * that called the current function
40 */
41
42/* By using this function, we force the caller to save its LR in a known
43 * location, which we can pick up and return. See PowerPC ELF specs.
44 */
45ENTRY(getrpc, TAG_NO_FRAME_USED)
46 lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */
47 lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */
48 blr /* And return */
49
50
51/* Mask and unmask interrupts at the processor level */
52ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
53 mfmsr r0
54 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
55 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
56 rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
57 mtmsr r0
58 isync
59 blr
60
61ENTRY(interrupt_enable, TAG_NO_FRAME_USED)
62
63 mfmsr r0
64 ori r0, r0, MASK(MSR_EE)
65 mtmsr r0
66 blr
67
68#if MACH_KDB
69/*
70 * Kernel debugger versions of the spl*() functions. This allows breakpoints
71 * in the spl*() functions.
72 */
73
74/* Mask and unmask interrupts at the processor level */
75ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
76 mfmsr r0
77 rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
78 rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
79 rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
80 mtmsr r0
81 isync
82 blr
83
84ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
85 mfmsr r0
86 ori r0, r0, MASK(MSR_EE)
87 mtmsr r0
88 blr
89#endif /* MACH_KDB */
90
91/*
92 * General entry for all debuggers. This gets us onto the debug stack and
93 * then back off at exit. We need to pass back R3 to caller.
94 */
95
96ENTRY(Call_Debugger, TAG_NO_FRAME_USED)
97
98 mfmsr r7 ; Get the current MSR
99 rlwinm r7,r7,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off
100 rlwinm r7,r7,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off
101 mflr r0 ; Save the return
102 rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions
103 mtmsr r7 ; Do it
104 isync
105 mfsprg r8,0 ; Get the per_proc block
106 stw r0,FM_LR_SAVE(r1) ; Save return on current stack
107
108 lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack
109 cmpwi r9,0 ; Are we already on it?
110 bne cdNewDeb ; No...
111
112 mr r9,r1 ; We are already on the stack, so use the current value
113 subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here
114
115cdNewDeb: li r0,0 ; Clear this out
116 stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg
117
118 stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy
119
120 subi r1,r9,FM_SIZE ; Carve a new frame
121 stw r0,FM_BACKPTR(r1) ; Chain back
122
123 bl EXT(Call_DebuggerC) ; Call the "C" phase of this
124
125 mfmsr r0 ; Get the MSR just in case it was enabled
126 addi r1,r1,FM_SIZE ; Pop off first stack frame
127 rlwinm r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions enable bit
128 mtmsr r0
129
130 mfsprg r8,0 ; Get the per_proc block address
131
132 lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack
133 cmplw r1,r9 ; Have we hit the bottom of the debug stack?
134 lwz r1,FM_ARG0(r1) ; Get previous stack frame
135 lwz r0,FM_LR_SAVE(r1) ; Get return address
136 mtlr r0 ; Set the return point
137 bnelr ; Return if still on debug stack
138
139 stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free
140 blr
141
142
143/* The following routines are for C-support. They are usually
144 * inlined into the C using the specifications in proc_reg.h,
145 * but if optimisation is switched off, the inlining doesn't work
146 */
147
148ENTRY(get_got, TAG_NO_FRAME_USED)
149 mr ARG0, r2
150 blr
151
152ENTRY(mflr, TAG_NO_FRAME_USED)
153 mflr ARG0
154 blr
155
156ENTRY(mfpvr, TAG_NO_FRAME_USED)
157 mfpvr ARG0
158 blr
159
160ENTRY(mtmsr, TAG_NO_FRAME_USED)
161 mtmsr ARG0
162 isync
163 blr
164
165ENTRY(mfmsr, TAG_NO_FRAME_USED)
166 mfmsr ARG0
167 blr
168
169ENTRY(mtsrin, TAG_NO_FRAME_USED)
170 isync
171 mtsrin ARG0, ARG1
172 isync
173 blr
174
175ENTRY(mfsrin, TAG_NO_FRAME_USED)
176 mfsrin ARG0, ARG0
177 blr
178
179ENTRY(mtsdr1, TAG_NO_FRAME_USED)
180 mtsdr1 ARG0
181 blr
182
183ENTRY(mtdar, TAG_NO_FRAME_USED)
184 mtdar ARG0
185 blr
186
187ENTRY(mfdar, TAG_NO_FRAME_USED)
188 mfdar ARG0
189 blr
190
191ENTRY(mtdec, TAG_NO_FRAME_USED)
192 mtdec ARG0
193 blr
194
195/* Decrementer frequency and realtime|timebase processor registers
196 * are different between ppc601 and ppc603/4, we define them all.
197 */
198
199ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
200 isync
201 mfdec ARG0
202 blr
203
204
205ENTRY(mftb, TAG_NO_FRAME_USED)
206 mftb ARG0
207 blr
208
209ENTRY(mftbu, TAG_NO_FRAME_USED)
210 mftbu ARG0
211 blr
212
213ENTRY(mfrtcl, TAG_NO_FRAME_USED)
214 mfspr ARG0, 5
215 blr
216
217ENTRY(mfrtcu, TAG_NO_FRAME_USED)
218 mfspr ARG0, 4
219 blr
220
221ENTRY(tlbie, TAG_NO_FRAME_USED)
222 tlbie ARG0
223 blr
224
225
226/*
227 * Performance Monitor Register Support
228 */
229
230ENTRY(mfmmcr0, TAG_NO_FRAME_USED)
231 mfspr r3,mmcr0
232 blr
233
234ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
235 mtspr mmcr0,r3
236 blr
237
238ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
239 mfspr r3,mmcr1
240 blr
241
242ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
243 mtspr mmcr1,r3
244 blr
245
246ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
247 mfspr r3,mmcr2
248 blr
249
250ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
251 mtspr mmcr2,r3
252 blr
253
254ENTRY(mfpmc1, TAG_NO_FRAME_USED)
255 mfspr r3,pmc1
256 blr
257
258ENTRY(mtpmc1, TAG_NO_FRAME_USED)
259 mtspr pmc1,r3
260 blr
261
262ENTRY(mfpmc2, TAG_NO_FRAME_USED)
263 mfspr r3,pmc2
264 blr
265
266ENTRY(mtpmc2, TAG_NO_FRAME_USED)
267 mtspr pmc2,r3
268 blr
269
270ENTRY(mfpmc3, TAG_NO_FRAME_USED)
271 mfspr r3,pmc3
272 blr
273
274ENTRY(mtpmc3, TAG_NO_FRAME_USED)
275 mtspr pmc3,r3
276 blr
277
278ENTRY(mfpmc4, TAG_NO_FRAME_USED)
279 mfspr r3,pmc4
280 blr
281
282ENTRY(mtpmc4, TAG_NO_FRAME_USED)
283 mtspr pmc4,r3
284 blr
285
286ENTRY(mfsia, TAG_NO_FRAME_USED)
287 mfspr r3,sia
288 blr
289
290ENTRY(mfsda, TAG_NO_FRAME_USED)
291 mfspr r3,sda
292 blr
293