[apple/xnu.git] / osfmk / mach / i386 / fp_reg.h

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
/* 
 * Mach Operating System
 * Copyright (c) 1992-1989 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */
/*
 */

#ifndef	_I386_FP_SAVE_H_
#define	_I386_FP_SAVE_H_

/*
 *	Floating point registers and status, as saved
 *	and restored by FP save/restore instructions.
 */
struct i386_fp_save	{
	unsigned short	fp_control;	/* control */
	unsigned short	fp_unused_1;
	unsigned short	fp_status;	/* status */
	unsigned short	fp_unused_2;
	unsigned short	fp_tag;		/* register tags */
	unsigned short	fp_unused_3;
	unsigned int	fp_eip;		/* eip at failed instruction */
	unsigned short	fp_cs;		/* cs at failed instruction */
	unsigned short	fp_opcode;	/* opcode of failed instruction */
	unsigned int	fp_dp;		/* data address */
	unsigned short	fp_ds;		/* data segment */
	unsigned short	fp_unused_4;
};

struct i386_fp_regs {
	unsigned short	fp_reg_word[5][8];
					/* space for 8 80-bit FP registers */
};

/* note when allocating this data structure, it must be 16 byte aligned. */
struct i386_fx_save {
        unsigned short  fx_control;     /* control */
        unsigned short  fx_status;      /* status */
        unsigned char  	fx_tag;         /* register tags */
        unsigned char	fx_bbz1;	/* better be zero when calling fxrtstor */
        unsigned short  fx_opcode;
        unsigned int    fx_eip;         /* eip  instruction */
        unsigned short  fx_cs;          /* cs instruction */
        unsigned short  fx_bbz2;	/* better be zero when calling fxrtstor */ 
        unsigned int    fx_dp;          /* data address */
        unsigned short  fx_ds;          /* data segment */
        unsigned short  fx_bbz3;	/* better be zero when calling fxrtstor */
        unsigned int  	fx_MXCSR;
        unsigned int  	fx_MXCSR_MASK;
        unsigned short  fx_reg_word[8][8];      /* STx/MMx registers */
        unsigned short  fx_XMM_reg[8][8];       /* XMM0-XMM7 */
        unsigned char 	fx_reserved[16*14];     /* reserved by intel for future expansion */
};


/*
 * Control register
 */
#define	FPC_IE		0x0001		/* enable invalid operation
					   exception */
#define FPC_IM		FPC_IE
#define	FPC_DE		0x0002		/* enable denormalized operation
					   exception */
#define FPC_DM		FPC_DE
#define	FPC_ZE		0x0004		/* enable zero-divide exception */
#define FPC_ZM		FPC_ZE
#define	FPC_OE		0x0008		/* enable overflow exception */
#define FPC_OM		FPC_OE
#define	FPC_UE		0x0010		/* enable underflow exception */
#define	FPC_PE		0x0020		/* enable precision exception */
#define	FPC_PC		0x0300		/* precision control: */
#define	FPC_PC_24	0x0000			/* 24 bits */
#define	FPC_PC_53	0x0200			/* 53 bits */
#define	FPC_PC_64	0x0300			/* 64 bits */
#define	FPC_RC		0x0c00		/* rounding control: */
#define	FPC_RC_RN	0x0000			/* round to nearest or even */
#define	FPC_RC_RD	0x0400			/* round down */
#define	FPC_RC_RU	0x0800			/* round up */
#define	FPC_RC_CHOP	0x0c00			/* chop */
#define	FPC_IC		0x1000		/* infinity control (obsolete) */
#define	FPC_IC_PROJ	0x0000			/* projective infinity */
#define	FPC_IC_AFF	0x1000			/* affine infinity (std) */

/*
 * Status register
 */
#define	FPS_IE		0x0001		/* invalid operation */
#define	FPS_DE		0x0002		/* denormalized operand */
#define	FPS_ZE		0x0004		/* divide by zero */
#define	FPS_OE		0x0008		/* overflow */
#define	FPS_UE		0x0010		/* underflow */
#define	FPS_PE		0x0020		/* precision */
#define	FPS_SF		0x0040		/* stack flag */
#define	FPS_ES		0x0080		/* error summary */
#define	FPS_C0		0x0100		/* condition code bit 0 */
#define	FPS_C1		0x0200		/* condition code bit 1 */
#define	FPS_C2		0x0400		/* condition code bit 2 */
#define	FPS_TOS		0x3800		/* top-of-stack pointer */
#define	FPS_TOS_SHIFT	11
#define	FPS_C3		0x4000		/* condition code bit 3 */
#define	FPS_BUSY	0x8000		/* FPU busy */

/*
 * Kind of floating-point support provided by kernel.
 */
#define	FP_NO		0		/* no floating point */
#define	FP_SOFT		1		/* software FP emulator */
#define	FP_287		2		/* 80287 */
#define	FP_387		3		/* 80387 or 80486 */
#define FP_FXSR		4		/* Fast save/restore SIMD Extension */

#endif	/* _I386_FP_SAVE_H_ */
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
37839358 A	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
1c79356b	11	*
37839358 A	12	* This Original Code and all software distributed under the License are
37839358 A	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
1c79356b A	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
1c79356b A	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
37839358 A	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
1c79356b A	19	*
	20	* @APPLE_LICENSE_HEADER_END@
	21	*/
	22	/*
	23	* @OSF_COPYRIGHT@
	24	*/
1c79356b A	25	/*
	26	* Mach Operating System
	27	* Copyright (c) 1992-1989 Carnegie Mellon University
	28	* All Rights Reserved.
	29	*
	30	* Permission to use, copy, modify and distribute this software and its
	31	* documentation is hereby granted, provided that both the copyright
	32	* notice and this permission notice appear in all copies of the
	33	* software, derivative works or modified versions, and any portions
	34	* thereof, and that both notices appear in supporting documentation.
	35	*
	36	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	37	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	38	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
	39	*
	40	* Carnegie Mellon requests users of this software to return to
	41	*
	42	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	43	* School of Computer Science
	44	* Carnegie Mellon University
	45	* Pittsburgh PA 15213-3890
	46	*
	47	* any improvements or extensions that they make and grant Carnegie Mellon
	48	* the rights to redistribute these changes.
	49	*/
	50	/*
	51	*/
	52
	53	#ifndef _I386_FP_SAVE_H_
	54	#define _I386_FP_SAVE_H_
91447636	55
1c79356b A	56	/*
	57	* Floating point registers and status, as saved
	58	* and restored by FP save/restore instructions.
	59	*/
	60	struct i386_fp_save {
	61	unsigned short fp_control; /* control */
	62	unsigned short fp_unused_1;
	63	unsigned short fp_status; /* status */
	64	unsigned short fp_unused_2;
	65	unsigned short fp_tag; /* register tags */
	66	unsigned short fp_unused_3;
	67	unsigned int fp_eip; /* eip at failed instruction */
	68	unsigned short fp_cs; /* cs at failed instruction */
	69	unsigned short fp_opcode; /* opcode of failed instruction */
	70	unsigned int fp_dp; /* data address */
	71	unsigned short fp_ds; /* data segment */
	72	unsigned short fp_unused_4;
	73	};
	74
	75	struct i386_fp_regs {
	76	unsigned short fp_reg_word[5][8];
	77	/* space for 8 80-bit FP registers */
	78	};
	79
55e303ae A	80	/* note when allocating this data structure, it must be 16 byte aligned. */
	81	struct i386_fx_save {
	82	unsigned short fx_control; /* control */
	83	unsigned short fx_status; /* status */
	84	unsigned char fx_tag; /* register tags */
	85	unsigned char fx_bbz1; /* better be zero when calling fxrtstor */
	86	unsigned short fx_opcode;
	87	unsigned int fx_eip; /* eip instruction */
	88	unsigned short fx_cs; /* cs instruction */
	89	unsigned short fx_bbz2; /* better be zero when calling fxrtstor */
	90	unsigned int fx_dp; /* data address */
	91	unsigned short fx_ds; /* data segment */
	92	unsigned short fx_bbz3; /* better be zero when calling fxrtstor */
	93	unsigned int fx_MXCSR;
	94	unsigned int fx_MXCSR_MASK;
	95	unsigned short fx_reg_word[8][8]; /* STx/MMx registers */
	96	unsigned short fx_XMM_reg[8][8]; /* XMM0-XMM7 */
	97	unsigned char fx_reserved[1614]; / reserved by intel for future expansion */
	98	};
	99
	100
1c79356b A	101	/*
	102	* Control register
	103	*/
	104	#define FPC_IE 0x0001 /* enable invalid operation
	105	exception */
	106	#define FPC_IM FPC_IE
	107	#define FPC_DE 0x0002 /* enable denormalized operation
	108	exception */
	109	#define FPC_DM FPC_DE
	110	#define FPC_ZE 0x0004 /* enable zero-divide exception */
	111	#define FPC_ZM FPC_ZE
	112	#define FPC_OE 0x0008 /* enable overflow exception */
	113	#define FPC_OM FPC_OE
	114	#define FPC_UE 0x0010 /* enable underflow exception */
	115	#define FPC_PE 0x0020 /* enable precision exception */
	116	#define FPC_PC 0x0300 /* precision control: */
	117	#define FPC_PC_24 0x0000 /* 24 bits */
	118	#define FPC_PC_53 0x0200 /* 53 bits */
	119	#define FPC_PC_64 0x0300 /* 64 bits */
	120	#define FPC_RC 0x0c00 /* rounding control: */
	121	#define FPC_RC_RN 0x0000 /* round to nearest or even */
	122	#define FPC_RC_RD 0x0400 /* round down */
	123	#define FPC_RC_RU 0x0800 /* round up */
	124	#define FPC_RC_CHOP 0x0c00 /* chop */
	125	#define FPC_IC 0x1000 /* infinity control (obsolete) */
	126	#define FPC_IC_PROJ 0x0000 /* projective infinity */
	127	#define FPC_IC_AFF 0x1000 /* affine infinity (std) */
	128
	129	/*
	130	* Status register
	131	*/
	132	#define FPS_IE 0x0001 /* invalid operation */
	133	#define FPS_DE 0x0002 /* denormalized operand */
	134	#define FPS_ZE 0x0004 /* divide by zero */
	135	#define FPS_OE 0x0008 /* overflow */
	136	#define FPS_UE 0x0010 /* underflow */
	137	#define FPS_PE 0x0020 /* precision */
	138	#define FPS_SF 0x0040 /* stack flag */
	139	#define FPS_ES 0x0080 /* error summary */
	140	#define FPS_C0 0x0100 /* condition code bit 0 */
	141	#define FPS_C1 0x0200 /* condition code bit 1 */
	142	#define FPS_C2 0x0400 /* condition code bit 2 */
	143	#define FPS_TOS 0x3800 /* top-of-stack pointer */
	144	#define FPS_TOS_SHIFT 11
	145	#define FPS_C3 0x4000 /* condition code bit 3 */
	146	#define FPS_BUSY 0x8000 /* FPU busy */
	147
	148	/*
	149	* Kind of floating-point support provided by kernel.
	150	*/
	151	#define FP_NO 0 /* no floating point */
	152	#define FP_SOFT 1 /* software FP emulator */
	153	#define FP_287 2 /* 80287 */
	154	#define FP_387 3 /* 80387 or 80486 */
55e303ae	155	#define FP_FXSR 4 /* Fast save/restore SIMD Extension */
1c79356b A	156
1c79356b A	157	#endif /* _I386_FP_SAVE_H_ */