[apple/xnu.git] / osfmk / ppc / machine_routines.h

/*
 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_PPC_MACHINE_ROUTINES_H_
#define	_PPC_MACHINE_ROUTINES_H_

#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/kern_types.h>
#include <pexpert/pexpert.h>

/* Get Interrupts Enabled */
extern boolean_t	ml_get_interrupts_enabled(
						void);

/* Set Interrupts Enabled */
extern boolean_t	ml_set_interrupts_enabled(
						boolean_t				enable);

/* Check if running at interrupt context */
extern boolean_t	ml_at_interrupt_context(
						void);

#ifdef KERNEL_PRIVATE

/* Generate a fake interrupt */
extern void			ml_cause_interrupt(
						void);

/* Type for the IPI Hander */
typedef void (*ipi_handler_t)(void);

/* Type for the Time Base Enable function */
typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);

/* enables (or disables) the processor nap mode the function returns the previous value*/
extern boolean_t	ml_enable_nap(
						int						target_cpu,
						boolean_t				nap_enabled);

/* Put the processor to sleep */
extern void			ml_ppc_sleep(
						void);

extern void			ml_get_timebase(
						unsigned long long		*timstamp);

extern int			ml_enable_cache_level(
						int						cache_level,
						int						enable);

extern void			ml_static_mfree(
						vm_offset_t				vaddr,
						vm_size_t				size);
        
/* Init Interrupts */
extern void			ml_install_interrupt_handler(
						void					*nub,
						int						source,
						void					*target,
						IOInterruptHandler		handler,
						void					*refCon);
               
extern vm_offset_t		ml_static_ptovirt(
							vm_offset_t			paddr);

/* virtual to physical on wired pages */
extern vm_offset_t		ml_vtophys(
							vm_offset_t			vaddr);

vm_size_t ml_nofault_copy(
	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);

/* PCI config cycle probing */
extern boolean_t		ml_probe_read(
							vm_offset_t			paddr,
							unsigned int		*val);

extern boolean_t		ml_probe_read_64(
							addr64_t			paddr,
							unsigned int		*val);

/* Read physical address byte */
extern unsigned int		ml_phys_read_byte(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_byte_64(
							addr64_t			paddr);

/* Read physical address half word */
extern unsigned int		ml_phys_read_half(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_half_64(
							addr64_t			paddr);

/* Read physical address word*/
extern unsigned int		ml_phys_read(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_64(
							addr64_t			paddr);

extern unsigned int		ml_phys_read_word(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_word_64(
							addr64_t			paddr);

/* Read physical address double word */
extern unsigned long long ml_phys_read_double(
							vm_offset_t			paddr);

extern unsigned long long ml_phys_read_double_64(
							addr64_t			paddr);

/* Write physical address byte */
extern void				ml_phys_write_byte(
							vm_offset_t			paddr,
							unsigned	int		data);

extern void				ml_phys_write_byte_64(
								addr64_t		paddr,
								unsigned int	data);

/* Write physical address half word */
extern void				ml_phys_write_half(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_half_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address word */
extern void				ml_phys_write(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_64(
							addr64_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address double word */
extern void				 ml_phys_write_double(
							vm_offset_t			paddr,
							unsigned long long	data);

extern void				ml_phys_write_double_64(
							addr64_t paddr,
							unsigned long long	 data);

/* Struct for ml_processor_register */
struct ml_processor_info {
	cpu_id_t			cpu_id;
	boolean_t			boot_cpu;
	vm_offset_t			start_paddr;
	boolean_t			supports_nap;
	unsigned long			l2cr_value;
	time_base_enable_t		time_base_enable;
	uint32_t			power_mode_0;
	uint32_t			power_mode_1;
};

typedef struct ml_processor_info ml_processor_info_t;

/* Register a processor */
extern kern_return_t	ml_processor_register(
							ml_processor_info_t *ml_processor_info,
							processor_t			*processor,
							ipi_handler_t		*ipi_handler);

/* Zero bytes starting at a physical address */
extern void				bzero_phys(
							addr64_t			phys_address,
							uint32_t			length);

/* Zero bytes starting at a physical address that's uncacheable */
extern void				bzero_phys_nc(
							addr64_t			phys_address,
							uint32_t			length);

#endif /* KERNEL_PRIVATE */

#ifdef	XNU_KERNEL_PRIVATE
#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)

/* Map memory map IO space */
extern vm_offset_t		ml_io_map(
							vm_offset_t			phys_addr, 
							vm_size_t			size);

void	ml_get_bouncepool_info(
        vm_offset_t *phys_addr,
	vm_size_t   *size);


/* boot memory allocation */
extern vm_offset_t		ml_static_malloc(
							vm_size_t			size);

#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */


#ifdef	MACH_KERNEL_PRIVATE
extern void				ml_init_interrupt(
							void);

extern void				cacheInit(
							void);

extern void				cacheDisable(
							void);

extern void				ml_init_lock_timeout(
							void);

void ml_ppc_do_sleep(void);

#endif /* MACH_KERNEL_PRIVATE */
#endif /* XNU_KERNEL_PRIVATE */

#ifdef  KERNEL_PRIVATE
extern void		ml_thread_policy(
				thread_t	thread,
				unsigned	policy_id,
				unsigned	policy_info);

#define MACHINE_GROUP				0x00000001
#define MACHINE_NETWORK_GROUP		0x10000000 
#define MACHINE_NETWORK_WORKLOOP	0x00000001
#define MACHINE_NETWORK_NETISR		0x00000002

/* Initialize the maximum number of CPUs */
extern void				ml_init_max_cpus(
							unsigned int		max_cpus);

/* Return the maximum number of CPUs set by ml_init_max_cpus() */
extern unsigned int		ml_get_max_cpus(
							void);

extern void			ml_cpu_up(void);
extern void			ml_cpu_down(void);

/* Struct for ml_cpu_get_info */
struct ml_cpu_info {
	unsigned long		vector_unit;
	unsigned long		cache_line_size;
	unsigned long		l1_icache_size;
	unsigned long		l1_dcache_size;
	unsigned long		l2_settings;
	unsigned long		l2_cache_size;
	unsigned long		l3_settings;
	unsigned long		l3_cache_size;
};

typedef struct ml_cpu_info ml_cpu_info_t;

/* Get processor info */
extern void				ml_cpu_get_info(
							ml_cpu_info_t		*ml_cpu_info);

extern void				ml_set_processor_speed(
							unsigned long		speed);
extern void				ml_set_processor_speed_slave(
							unsigned long		speed);
extern void				ml_set_processor_speed_dpll(
							unsigned long		speed);
extern void				ml_set_processor_speed_dfs(
							unsigned long		speed);
extern void				ml_set_processor_speed_powertune(
							unsigned long		speed);

extern void				ml_set_processor_voltage(
							unsigned long		voltage);

extern unsigned int		ml_scom_write(
							uint32_t			reg,
							uint64_t			data);

extern unsigned int		ml_scom_read(
							uint32_t			reg,
							uint64_t			*data);

extern uint32_t 		ml_hdec_ratio(void);

extern int boffSettingsInit;

#endif /* KERNEL_PRIVATE */

#endif /* _PPC_MACHINE_ROUTINES_H_ */
Commit	Line	Data
1c79356b	1	/*
2d21ac55	2	* Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#ifndef _PPC_MACHINE_ROUTINES_H_
	33	#define _PPC_MACHINE_ROUTINES_H_
	34
	35	#include <mach/mach_types.h>
	36	#include <mach/boolean.h>
	37	#include <kern/kern_types.h>
	38	#include <pexpert/pexpert.h>
	39
9bccf70c	40	/* Get Interrupts Enabled */
91447636 A	41	extern boolean_t ml_get_interrupts_enabled(
91447636 A	42	void);
1c79356b	43
9bccf70c	44	/* Set Interrupts Enabled */
91447636 A	45	extern boolean_t ml_set_interrupts_enabled(
91447636 A	46	boolean_t enable);
1c79356b	47
9bccf70c	48	/* Check if running at interrupt context */
91447636 A	49	extern boolean_t ml_at_interrupt_context(
	50	void);
	51
	52	#ifdef KERNEL_PRIVATE
1c79356b	53
9bccf70c	54	/* Generate a fake interrupt */
91447636 A	55	extern void ml_cause_interrupt(
91447636 A	56	void);
9bccf70c A	57
	58	/* Type for the IPI Hander */
	59	typedef void (*ipi_handler_t)(void);
	60
	61	/* Type for the Time Base Enable function */
	62	typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
	63
	64	/* enables (or disables) the processor nap mode the function returns the previous value*/
91447636 A	65	extern boolean_t ml_enable_nap(
	66	int target_cpu,
	67	boolean_t nap_enabled);
9bccf70c A	68
9bccf70c A	69	/* Put the processor to sleep */
91447636 A	70	extern void ml_ppc_sleep(
	71	void);
	72
	73	extern void ml_get_timebase(
	74	unsigned long long *timstamp);
9bccf70c	75
91447636 A	76	extern int ml_enable_cache_level(
	77	int cache_level,
	78	int enable);
1c79356b	79
91447636 A	80	extern void ml_static_mfree(
	81	vm_offset_t vaddr,
	82	vm_size_t size);
1c79356b	83
1c79356b	84	/* Init Interrupts */
91447636 A	85	extern void ml_install_interrupt_handler(
	86	void *nub,
	87	int source,
	88	void *target,
	89	IOInterruptHandler handler,
	90	void *refCon);
1c79356b	91
91447636 A	92	extern vm_offset_t ml_static_ptovirt(
91447636 A	93	vm_offset_t paddr);
1c79356b	94
9bccf70c	95	/* virtual to physical on wired pages */
91447636 A	96	extern vm_offset_t ml_vtophys(
91447636 A	97	vm_offset_t vaddr);
1c79356b	98
2d21ac55 A	99	vm_size_t ml_nofault_copy(
	100	vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);
	101
1c79356b	102	/* PCI config cycle probing */
91447636 A	103	extern boolean_t ml_probe_read(
	104	vm_offset_t paddr,
	105	unsigned int *val);
	106
	107	extern boolean_t ml_probe_read_64(
	108	addr64_t paddr,
	109	unsigned int *val);
1c79356b A	110
1c79356b A	111	/* Read physical address byte */
91447636 A	112	extern unsigned int ml_phys_read_byte(
	113	vm_offset_t paddr);
	114
	115	extern unsigned int ml_phys_read_byte_64(
	116	addr64_t paddr);
55e303ae A	117
55e303ae A	118	/* Read physical address half word */
91447636 A	119	extern unsigned int ml_phys_read_half(
	120	vm_offset_t paddr);
	121
	122	extern unsigned int ml_phys_read_half_64(
	123	addr64_t paddr);
1c79356b	124
55e303ae	125	/* Read physical address word*/
91447636 A	126	extern unsigned int ml_phys_read(
	127	vm_offset_t paddr);
	128
	129	extern unsigned int ml_phys_read_64(
	130	addr64_t paddr);
	131
	132	extern unsigned int ml_phys_read_word(
	133	vm_offset_t paddr);
	134
	135	extern unsigned int ml_phys_read_word_64(
	136	addr64_t paddr);
55e303ae A	137
55e303ae A	138	/* Read physical address double word */
91447636 A	139	extern unsigned long long ml_phys_read_double(
	140	vm_offset_t paddr);
	141
	142	extern unsigned long long ml_phys_read_double_64(
	143	addr64_t paddr);
1c79356b A	144
1c79356b A	145	/* Write physical address byte */
91447636 A	146	extern void ml_phys_write_byte(
	147	vm_offset_t paddr,
	148	unsigned int data);
	149
	150	extern void ml_phys_write_byte_64(
	151	addr64_t paddr,
	152	unsigned int data);
1c79356b	153
55e303ae	154	/* Write physical address half word */
91447636 A	155	extern void ml_phys_write_half(
	156	vm_offset_t paddr,
	157	unsigned int data);
	158
	159	extern void ml_phys_write_half_64(
	160	addr64_t paddr,
	161	unsigned int data);
55e303ae A	162
55e303ae A	163	/* Write physical address word */
91447636 A	164	extern void ml_phys_write(
	165	vm_offset_t paddr,
	166	unsigned int data);
	167
	168	extern void ml_phys_write_64(
	169	addr64_t paddr,
	170	unsigned int data);
	171
	172	extern void ml_phys_write_word(
	173	vm_offset_t paddr,
	174	unsigned int data);
	175
	176	extern void ml_phys_write_word_64(
	177	addr64_t paddr,
	178	unsigned int data);
55e303ae A	179
55e303ae A	180	/* Write physical address double word */
91447636 A	181	extern void ml_phys_write_double(
	182	vm_offset_t paddr,
	183	unsigned long long data);
	184
	185	extern void ml_phys_write_double_64(
	186	addr64_t paddr,
	187	unsigned long long data);
1c79356b	188
1c79356b	189	/* Struct for ml_processor_register */
55e303ae	190	struct ml_processor_info {
1c79356b A	191	cpu_id_t cpu_id;
	192	boolean_t boot_cpu;
	193	vm_offset_t start_paddr;
	194	boolean_t supports_nap;
91447636 A	195	unsigned long l2cr_value;
91447636 A	196	time_base_enable_t time_base_enable;
483a1d10 A	197	uint32_t power_mode_0;
483a1d10 A	198	uint32_t power_mode_1;
1c79356b A	199	};
1c79356b A	200
55e303ae	201	typedef struct ml_processor_info ml_processor_info_t;
1c79356b A	202
1c79356b A	203	/* Register a processor */
91447636 A	204	extern kern_return_t ml_processor_register(
	205	ml_processor_info_t *ml_processor_info,
	206	processor_t *processor,
	207	ipi_handler_t *ipi_handler);
1c79356b	208
55e303ae	209	/* Zero bytes starting at a physical address */
91447636 A	210	extern void bzero_phys(
	211	addr64_t phys_address,
	212	uint32_t length);
55e303ae	213
2d21ac55 A	214	/* Zero bytes starting at a physical address that's uncacheable */
	215	extern void bzero_phys_nc(
	216	addr64_t phys_address,
	217	uint32_t length);
	218
91447636	219	#endif /* KERNEL_PRIVATE */
1c79356b	220
91447636	221	#ifdef XNU_KERNEL_PRIVATE
9bccf70c	222	#if defined(PEXPERT_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
1c79356b	223
9bccf70c	224	/* Map memory map IO space */
91447636 A	225	extern vm_offset_t ml_io_map(
	226	vm_offset_t phys_addr,
	227	vm_size_t size);
1c79356b	228
0c530ab8 A	229	void ml_get_bouncepool_info(
	230	vm_offset_t *phys_addr,
	231	vm_size_t *size);
	232
	233
9bccf70c	234	/* boot memory allocation */
91447636 A	235	extern vm_offset_t ml_static_malloc(
91447636 A	236	vm_size_t size);
1c79356b	237
9bccf70c	238	#endif /* PEXPERT_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
1c79356b	239
1c79356b	240
91447636 A	241	#ifdef MACH_KERNEL_PRIVATE
	242	extern void ml_init_interrupt(
	243	void);
1c79356b	244
91447636 A	245	extern void cacheInit(
91447636 A	246	void);
1c79356b	247
91447636 A	248	extern void cacheDisable(
91447636 A	249	void);
1c79356b	250
91447636 A	251	extern void ml_init_lock_timeout(
91447636 A	252	void);
1c79356b	253
91447636	254	void ml_ppc_do_sleep(void);
ab86ba33	255
9bccf70c	256	#endif /* MACH_KERNEL_PRIVATE */
91447636	257	#endif /* XNU_KERNEL_PRIVATE */
9bccf70c	258
91447636 A	259	#ifdef KERNEL_PRIVATE
	260	extern void ml_thread_policy(
	261	thread_t thread,
	262	unsigned policy_id,
	263	unsigned policy_info);
9bccf70c A	264
	265	#define MACHINE_GROUP 0x00000001
	266	#define MACHINE_NETWORK_GROUP 0x10000000
	267	#define MACHINE_NETWORK_WORKLOOP 0x00000001
	268	#define MACHINE_NETWORK_NETISR 0x00000002
	269
43866e37	270	/* Initialize the maximum number of CPUs */
91447636 A	271	extern void ml_init_max_cpus(
91447636 A	272	unsigned int max_cpus);
43866e37 A	273
43866e37 A	274	/* Return the maximum number of CPUs set by ml_init_max_cpus() */
91447636 A	275	extern unsigned int ml_get_max_cpus(
91447636 A	276	void);
43866e37	277
91447636 A	278	extern void ml_cpu_up(void);
91447636 A	279	extern void ml_cpu_down(void);
43866e37 A	280
	281	/* Struct for ml_cpu_get_info */
	282	struct ml_cpu_info {
9bccf70c A	283	unsigned long vector_unit;
	284	unsigned long cache_line_size;
	285	unsigned long l1_icache_size;
	286	unsigned long l1_dcache_size;
	287	unsigned long l2_settings;
	288	unsigned long l2_cache_size;
	289	unsigned long l3_settings;
	290	unsigned long l3_cache_size;
	291	};
	292
43866e37	293	typedef struct ml_cpu_info ml_cpu_info_t;
9bccf70c A	294
9bccf70c A	295	/* Get processor info */
91447636 A	296	extern void ml_cpu_get_info(
	297	ml_cpu_info_t *ml_cpu_info);
	298
	299	extern void ml_set_processor_speed(
	300	unsigned long speed);
	301	extern void ml_set_processor_speed_slave(
	302	unsigned long speed);
	303	extern void ml_set_processor_speed_dpll(
	304	unsigned long speed);
	305	extern void ml_set_processor_speed_dfs(
	306	unsigned long speed);
	307	extern void ml_set_processor_speed_powertune(
	308	unsigned long speed);
	309
	310	extern void ml_set_processor_voltage(
	311	unsigned long voltage);
	312
	313	extern unsigned int ml_scom_write(
	314	uint32_t reg,
	315	uint64_t data);
	316
	317	extern unsigned int ml_scom_read(
	318	uint32_t reg,
	319	uint64_t *data);
	320
	321	extern uint32_t ml_hdec_ratio(void);
	322
2d21ac55 A	323	extern int boffSettingsInit;
2d21ac55 A	324
91447636	325	#endif /* KERNEL_PRIVATE */
9bccf70c	326
1c79356b	327	#endif /* _PPC_MACHINE_ROUTINES_H_ */