[apple/xnu.git] / osfmk / mach / i386 / _structs.h

/*
 * Copyright (c) 2004-2006 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_MACH_I386__STRUCTS_H_
#define	_MACH_I386__STRUCTS_H_

/*
 * i386 is the structure that is exported to user threads for 
 * use in status/mutate calls.  This structure should never change.
 *
 */

#if __DARWIN_UNIX03
#define	_STRUCT_X86_THREAD_STATE32	struct __darwin_i386_thread_state
_STRUCT_X86_THREAD_STATE32
{
    unsigned int	__eax;
    unsigned int	__ebx;
    unsigned int	__ecx;
    unsigned int	__edx;
    unsigned int	__edi;
    unsigned int	__esi;
    unsigned int	__ebp;
    unsigned int	__esp;
    unsigned int	__ss;
    unsigned int	__eflags;
    unsigned int	__eip;
    unsigned int	__cs;
    unsigned int	__ds;
    unsigned int	__es;
    unsigned int	__fs;
    unsigned int	__gs;
};
#else /* !__DARWIN_UNIX03 */
#define	_STRUCT_X86_THREAD_STATE32	struct i386_thread_state
_STRUCT_X86_THREAD_STATE32
{
    unsigned int	eax;
    unsigned int	ebx;
    unsigned int	ecx;
    unsigned int	edx;
    unsigned int	edi;
    unsigned int	esi;
    unsigned int	ebp;
    unsigned int	esp;
    unsigned int	ss;
    unsigned int	eflags;
    unsigned int	eip;
    unsigned int	cs;
    unsigned int	ds;
    unsigned int	es;
    unsigned int	fs;
    unsigned int	gs;
};
#endif /* !__DARWIN_UNIX03 */

/* This structure should be double-word aligned for performance */

#if __DARWIN_UNIX03
#define _STRUCT_FP_CONTROL	struct __darwin_fp_control
_STRUCT_FP_CONTROL
{
    unsigned short		__invalid	:1,
    				__denorm	:1,
				__zdiv		:1,
				__ovrfl		:1,
				__undfl		:1,
				__precis	:1,
						:2,
				__pc		:2,
#if !defined(_POSIX_C_SOURCE) || defined(_DARWIN_C_SOURCE)
#define FP_PREC_24B		0
#define	FP_PREC_53B		2
#define FP_PREC_64B		3
#endif /* !_POSIX_C_SOURCE || _DARWIN_C_SOURCE */
				__rc		:2,
#if !defined(_POSIX_C_SOURCE) || defined(_DARWIN_C_SOURCE)
#define FP_RND_NEAR		0
#define FP_RND_DOWN		1
#define FP_RND_UP		2
#define FP_CHOP			3
#endif /* !_POSIX_C_SOURCE || _DARWIN_C_SOURCE */
					/*inf*/	:1,
						:3;
};
typedef _STRUCT_FP_CONTROL	__darwin_fp_control_t;
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_FP_CONTROL	struct fp_control
_STRUCT_FP_CONTROL
{
    unsigned short		invalid	:1,
    				denorm	:1,
				zdiv	:1,
				ovrfl	:1,
				undfl	:1,
				precis	:1,
					:2,
				pc	:2,
#define FP_PREC_24B		0
#define	FP_PREC_53B		2
#define FP_PREC_64B		3
				rc	:2,
#define FP_RND_NEAR		0
#define FP_RND_DOWN		1
#define FP_RND_UP		2
#define FP_CHOP			3
				/*inf*/	:1,
					:3;
};
typedef _STRUCT_FP_CONTROL	fp_control_t;
#endif /* !__DARWIN_UNIX03 */

/*
 * Status word.
 */

#if __DARWIN_UNIX03
#define _STRUCT_FP_STATUS	struct __darwin_fp_status
_STRUCT_FP_STATUS
{
    unsigned short		__invalid	:1,
    				__denorm	:1,
				__zdiv		:1,
				__ovrfl		:1,
				__undfl		:1,
				__precis	:1,
				__stkflt	:1,
				__errsumm	:1,
				__c0		:1,
				__c1		:1,
				__c2		:1,
				__tos		:3,
				__c3		:1,
				__busy		:1;
};
typedef _STRUCT_FP_STATUS	__darwin_fp_status_t;
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_FP_STATUS	struct fp_status
_STRUCT_FP_STATUS
{
    unsigned short		invalid	:1,
    				denorm	:1,
				zdiv	:1,
				ovrfl	:1,
				undfl	:1,
				precis	:1,
				stkflt	:1,
				errsumm	:1,
				c0	:1,
				c1	:1,
				c2	:1,
				tos	:3,
				c3	:1,
				busy	:1;
};
typedef _STRUCT_FP_STATUS	fp_status_t;
#endif /* !__DARWIN_UNIX03 */
				
/* defn of 80bit x87 FPU or MMX register  */

#if __DARWIN_UNIX03
#define _STRUCT_MMST_REG	struct __darwin_mmst_reg
_STRUCT_MMST_REG
{
	char	__mmst_reg[10];
	char	__mmst_rsrv[6];
};
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_MMST_REG	struct mmst_reg
_STRUCT_MMST_REG
{
	char	mmst_reg[10];
	char	mmst_rsrv[6];
};
#endif /* !__DARWIN_UNIX03 */


/* defn of 128 bit XMM regs */

#if __DARWIN_UNIX03
#define _STRUCT_XMM_REG		struct __darwin_xmm_reg
_STRUCT_XMM_REG
{
	char		__xmm_reg[16];
};
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_XMM_REG		struct xmm_reg
_STRUCT_XMM_REG
{
	char		xmm_reg[16];
};
#endif /* !__DARWIN_UNIX03 */

/* 
 * Floating point state.
 */

#if !defined(_POSIX_C_SOURCE) || defined(_DARWIN_C_SOURCE)
#define FP_STATE_BYTES		512	/* number of chars worth of data from fpu_fcw */
#endif /* !_POSIX_C_SOURCE || _DARWIN_C_SOURCE */

#if __DARWIN_UNIX03
#define	_STRUCT_X86_FLOAT_STATE32	struct __darwin_i386_float_state
_STRUCT_X86_FLOAT_STATE32
{
	int 			__fpu_reserved[2];
	_STRUCT_FP_CONTROL	__fpu_fcw;		/* x87 FPU control word */
	_STRUCT_FP_STATUS	__fpu_fsw;		/* x87 FPU status word */
	__uint8_t		__fpu_ftw;		/* x87 FPU tag word */
	__uint8_t		__fpu_rsrv1;		/* reserved */ 
	__uint16_t		__fpu_fop;		/* x87 FPU Opcode */
	__uint32_t		__fpu_ip;		/* x87 FPU Instruction Pointer offset */
	__uint16_t		__fpu_cs;		/* x87 FPU Instruction Pointer Selector */
	__uint16_t		__fpu_rsrv2;		/* reserved */
	__uint32_t		__fpu_dp;		/* x87 FPU Instruction Operand(Data) Pointer offset */
	__uint16_t		__fpu_ds;		/* x87 FPU Instruction Operand(Data) Pointer Selector */
	__uint16_t		__fpu_rsrv3;		/* reserved */
	__uint32_t		__fpu_mxcsr;		/* MXCSR Register state */
	__uint32_t		__fpu_mxcsrmask;	/* MXCSR mask */
	_STRUCT_MMST_REG	__fpu_stmm0;		/* ST0/MM0   */
	_STRUCT_MMST_REG	__fpu_stmm1;		/* ST1/MM1  */
	_STRUCT_MMST_REG	__fpu_stmm2;		/* ST2/MM2  */
	_STRUCT_MMST_REG	__fpu_stmm3;		/* ST3/MM3  */
	_STRUCT_MMST_REG	__fpu_stmm4;		/* ST4/MM4  */
	_STRUCT_MMST_REG	__fpu_stmm5;		/* ST5/MM5  */
	_STRUCT_MMST_REG	__fpu_stmm6;		/* ST6/MM6  */
	_STRUCT_MMST_REG	__fpu_stmm7;		/* ST7/MM7  */
	_STRUCT_XMM_REG		__fpu_xmm0;		/* XMM 0  */
	_STRUCT_XMM_REG		__fpu_xmm1;		/* XMM 1  */
	_STRUCT_XMM_REG		__fpu_xmm2;		/* XMM 2  */
	_STRUCT_XMM_REG		__fpu_xmm3;		/* XMM 3  */
	_STRUCT_XMM_REG		__fpu_xmm4;		/* XMM 4  */
	_STRUCT_XMM_REG		__fpu_xmm5;		/* XMM 5  */
	_STRUCT_XMM_REG		__fpu_xmm6;		/* XMM 6  */
	_STRUCT_XMM_REG		__fpu_xmm7;		/* XMM 7  */
	char			__fpu_rsrv4[14*16];	/* reserved */
	int 			__fpu_reserved1;
};
#else /* !__DARWIN_UNIX03 */
#define	_STRUCT_X86_FLOAT_STATE32	struct i386_float_state
_STRUCT_X86_FLOAT_STATE32
{
	int 			fpu_reserved[2];
	_STRUCT_FP_CONTROL	fpu_fcw;		/* x87 FPU control word */
	_STRUCT_FP_STATUS	fpu_fsw;		/* x87 FPU status word */
	__uint8_t		fpu_ftw;		/* x87 FPU tag word */
	__uint8_t		fpu_rsrv1;		/* reserved */ 
	__uint16_t		fpu_fop;		/* x87 FPU Opcode */
	__uint32_t		fpu_ip;			/* x87 FPU Instruction Pointer offset */
	__uint16_t		fpu_cs;			/* x87 FPU Instruction Pointer Selector */
	__uint16_t		fpu_rsrv2;		/* reserved */
	__uint32_t		fpu_dp;			/* x87 FPU Instruction Operand(Data) Pointer offset */
	__uint16_t		fpu_ds;			/* x87 FPU Instruction Operand(Data) Pointer Selector */
	__uint16_t		fpu_rsrv3;		/* reserved */
	__uint32_t		fpu_mxcsr;		/* MXCSR Register state */
	__uint32_t		fpu_mxcsrmask;		/* MXCSR mask */
	_STRUCT_MMST_REG	fpu_stmm0;		/* ST0/MM0   */
	_STRUCT_MMST_REG	fpu_stmm1;		/* ST1/MM1  */
	_STRUCT_MMST_REG	fpu_stmm2;		/* ST2/MM2  */
	_STRUCT_MMST_REG	fpu_stmm3;		/* ST3/MM3  */
	_STRUCT_MMST_REG	fpu_stmm4;		/* ST4/MM4  */
	_STRUCT_MMST_REG	fpu_stmm5;		/* ST5/MM5  */
	_STRUCT_MMST_REG	fpu_stmm6;		/* ST6/MM6  */
	_STRUCT_MMST_REG	fpu_stmm7;		/* ST7/MM7  */
	_STRUCT_XMM_REG		fpu_xmm0;		/* XMM 0  */
	_STRUCT_XMM_REG		fpu_xmm1;		/* XMM 1  */
	_STRUCT_XMM_REG		fpu_xmm2;		/* XMM 2  */
	_STRUCT_XMM_REG		fpu_xmm3;		/* XMM 3  */
	_STRUCT_XMM_REG		fpu_xmm4;		/* XMM 4  */
	_STRUCT_XMM_REG		fpu_xmm5;		/* XMM 5  */
	_STRUCT_XMM_REG		fpu_xmm6;		/* XMM 6  */
	_STRUCT_XMM_REG		fpu_xmm7;		/* XMM 7  */
	char			fpu_rsrv4[14*16];	/* reserved */
	int 			fpu_reserved1;
};
#endif /* !__DARWIN_UNIX03 */

#if __DARWIN_UNIX03
#define _STRUCT_X86_EXCEPTION_STATE32	struct __darwin_i386_exception_state
_STRUCT_X86_EXCEPTION_STATE32
{
    unsigned int	__trapno;
    unsigned int	__err;
    unsigned int	__faultvaddr;
};
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_X86_EXCEPTION_STATE32	struct i386_exception_state
_STRUCT_X86_EXCEPTION_STATE32
{
    unsigned int	trapno;
    unsigned int	err;
    unsigned int	faultvaddr;
};
#endif /* !__DARWIN_UNIX03 */

#if __DARWIN_UNIX03
#define _STRUCT_X86_DEBUG_STATE32	struct __darwin_x86_debug_state32
_STRUCT_X86_DEBUG_STATE32
{
	unsigned int	__dr0;
	unsigned int	__dr1;
	unsigned int	__dr2;
	unsigned int	__dr3;
	unsigned int	__dr4;
	unsigned int	__dr5;
	unsigned int	__dr6;
	unsigned int	__dr7;
};
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_X86_DEBUG_STATE32	struct x86_debug_state32
_STRUCT_X86_DEBUG_STATE32
{
	unsigned int	dr0;
	unsigned int	dr1;
	unsigned int	dr2;
	unsigned int	dr3;
	unsigned int	dr4;
	unsigned int	dr5;
	unsigned int	dr6;
	unsigned int	dr7;
};
#endif /* !__DARWIN_UNIX03 */

/*
 * 64 bit versions of the above
 */

#if __DARWIN_UNIX03
#define	_STRUCT_X86_THREAD_STATE64	struct __darwin_x86_thread_state64
_STRUCT_X86_THREAD_STATE64
{
	__uint64_t	__rax;
	__uint64_t	__rbx;
	__uint64_t	__rcx;
	__uint64_t	__rdx;
	__uint64_t	__rdi;
	__uint64_t	__rsi;
	__uint64_t	__rbp;
	__uint64_t	__rsp;
	__uint64_t	__r8;
	__uint64_t	__r9;
	__uint64_t	__r10;
	__uint64_t	__r11;
	__uint64_t	__r12;
	__uint64_t	__r13;
	__uint64_t	__r14;
	__uint64_t	__r15;
	__uint64_t	__rip;
	__uint64_t	__rflags;
	__uint64_t	__cs;
	__uint64_t	__fs;
	__uint64_t	__gs;
};
#else /* !__DARWIN_UNIX03 */
#define	_STRUCT_X86_THREAD_STATE64	struct x86_thread_state64
_STRUCT_X86_THREAD_STATE64
{
	__uint64_t	rax;
	__uint64_t	rbx;
	__uint64_t	rcx;
	__uint64_t	rdx;
	__uint64_t	rdi;
	__uint64_t	rsi;
	__uint64_t	rbp;
	__uint64_t	rsp;
	__uint64_t	r8;
	__uint64_t	r9;
	__uint64_t	r10;
	__uint64_t	r11;
	__uint64_t	r12;
	__uint64_t	r13;
	__uint64_t	r14;
	__uint64_t	r15;
	__uint64_t	rip;
	__uint64_t	rflags;
	__uint64_t	cs;
	__uint64_t	fs;
	__uint64_t	gs;
};
#endif /* !__DARWIN_UNIX03 */


#if __DARWIN_UNIX03
#define	_STRUCT_X86_FLOAT_STATE64	struct __darwin_x86_float_state64
_STRUCT_X86_FLOAT_STATE64
{
	int 			__fpu_reserved[2];
	_STRUCT_FP_CONTROL	__fpu_fcw;		/* x87 FPU control word */
	_STRUCT_FP_STATUS	__fpu_fsw;		/* x87 FPU status word */
	__uint8_t		__fpu_ftw;		/* x87 FPU tag word */
	__uint8_t		__fpu_rsrv1;		/* reserved */ 
	__uint16_t		__fpu_fop;		/* x87 FPU Opcode */

	/* x87 FPU Instruction Pointer */
	__uint32_t		__fpu_ip;		/* offset */
	__uint16_t		__fpu_cs;		/* Selector */

	__uint16_t		__fpu_rsrv2;		/* reserved */

	/* x87 FPU Instruction Operand(Data) Pointer */
	__uint32_t		__fpu_dp;		/* offset */
	__uint16_t		__fpu_ds;		/* Selector */

	__uint16_t		__fpu_rsrv3;		/* reserved */
	__uint32_t		__fpu_mxcsr;		/* MXCSR Register state */
	__uint32_t		__fpu_mxcsrmask;	/* MXCSR mask */
	_STRUCT_MMST_REG	__fpu_stmm0;		/* ST0/MM0   */
	_STRUCT_MMST_REG	__fpu_stmm1;		/* ST1/MM1  */
	_STRUCT_MMST_REG	__fpu_stmm2;		/* ST2/MM2  */
	_STRUCT_MMST_REG	__fpu_stmm3;		/* ST3/MM3  */
	_STRUCT_MMST_REG	__fpu_stmm4;		/* ST4/MM4  */
	_STRUCT_MMST_REG	__fpu_stmm5;		/* ST5/MM5  */
	_STRUCT_MMST_REG	__fpu_stmm6;		/* ST6/MM6  */
	_STRUCT_MMST_REG	__fpu_stmm7;		/* ST7/MM7  */
	_STRUCT_XMM_REG		__fpu_xmm0;		/* XMM 0  */
	_STRUCT_XMM_REG		__fpu_xmm1;		/* XMM 1  */
	_STRUCT_XMM_REG		__fpu_xmm2;		/* XMM 2  */
	_STRUCT_XMM_REG		__fpu_xmm3;		/* XMM 3  */
	_STRUCT_XMM_REG		__fpu_xmm4;		/* XMM 4  */
	_STRUCT_XMM_REG		__fpu_xmm5;		/* XMM 5  */
	_STRUCT_XMM_REG		__fpu_xmm6;		/* XMM 6  */
	_STRUCT_XMM_REG		__fpu_xmm7;		/* XMM 7  */
	_STRUCT_XMM_REG		__fpu_xmm8;		/* XMM 8  */
	_STRUCT_XMM_REG		__fpu_xmm9;		/* XMM 9  */
	_STRUCT_XMM_REG		__fpu_xmm10;		/* XMM 10  */
	_STRUCT_XMM_REG		__fpu_xmm11;		/* XMM 11 */
	_STRUCT_XMM_REG		__fpu_xmm12;		/* XMM 12  */
	_STRUCT_XMM_REG		__fpu_xmm13;		/* XMM 13  */
	_STRUCT_XMM_REG		__fpu_xmm14;		/* XMM 14  */
	_STRUCT_XMM_REG		__fpu_xmm15;		/* XMM 15  */
	char			__fpu_rsrv4[6*16];	/* reserved */
	int 			__fpu_reserved1;
};
#else /* !__DARWIN_UNIX03 */
#define	_STRUCT_X86_FLOAT_STATE64	struct x86_float_state64
_STRUCT_X86_FLOAT_STATE64
{
	int 			fpu_reserved[2];
	_STRUCT_FP_CONTROL	fpu_fcw;		/* x87 FPU control word */
	_STRUCT_FP_STATUS	fpu_fsw;		/* x87 FPU status word */
	__uint8_t		fpu_ftw;		/* x87 FPU tag word */
	__uint8_t		fpu_rsrv1;		/* reserved */ 
	__uint16_t		fpu_fop;		/* x87 FPU Opcode */

	/* x87 FPU Instruction Pointer */
	__uint32_t		fpu_ip;			/* offset */
	__uint16_t		fpu_cs;			/* Selector */

	__uint16_t		fpu_rsrv2;		/* reserved */

	/* x87 FPU Instruction Operand(Data) Pointer */
	__uint32_t		fpu_dp;			/* offset */
	__uint16_t		fpu_ds;			/* Selector */

	__uint16_t		fpu_rsrv3;		/* reserved */
	__uint32_t		fpu_mxcsr;		/* MXCSR Register state */
	__uint32_t		fpu_mxcsrmask;		/* MXCSR mask */
	_STRUCT_MMST_REG	fpu_stmm0;		/* ST0/MM0   */
	_STRUCT_MMST_REG	fpu_stmm1;		/* ST1/MM1  */
	_STRUCT_MMST_REG	fpu_stmm2;		/* ST2/MM2  */
	_STRUCT_MMST_REG	fpu_stmm3;		/* ST3/MM3  */
	_STRUCT_MMST_REG	fpu_stmm4;		/* ST4/MM4  */
	_STRUCT_MMST_REG	fpu_stmm5;		/* ST5/MM5  */
	_STRUCT_MMST_REG	fpu_stmm6;		/* ST6/MM6  */
	_STRUCT_MMST_REG	fpu_stmm7;		/* ST7/MM7  */
	_STRUCT_XMM_REG		fpu_xmm0;		/* XMM 0  */
	_STRUCT_XMM_REG		fpu_xmm1;		/* XMM 1  */
	_STRUCT_XMM_REG		fpu_xmm2;		/* XMM 2  */
	_STRUCT_XMM_REG		fpu_xmm3;		/* XMM 3  */
	_STRUCT_XMM_REG		fpu_xmm4;		/* XMM 4  */
	_STRUCT_XMM_REG		fpu_xmm5;		/* XMM 5  */
	_STRUCT_XMM_REG		fpu_xmm6;		/* XMM 6  */
	_STRUCT_XMM_REG		fpu_xmm7;		/* XMM 7  */
	_STRUCT_XMM_REG		fpu_xmm8;		/* XMM 8  */
	_STRUCT_XMM_REG		fpu_xmm9;		/* XMM 9  */
	_STRUCT_XMM_REG		fpu_xmm10;		/* XMM 10  */
	_STRUCT_XMM_REG		fpu_xmm11;		/* XMM 11 */
	_STRUCT_XMM_REG		fpu_xmm12;		/* XMM 12  */
	_STRUCT_XMM_REG		fpu_xmm13;		/* XMM 13  */
	_STRUCT_XMM_REG		fpu_xmm14;		/* XMM 14  */
	_STRUCT_XMM_REG		fpu_xmm15;		/* XMM 15  */
	char			fpu_rsrv4[6*16];	/* reserved */
	int 			fpu_reserved1;
};
#endif /* !__DARWIN_UNIX03 */

#if __DARWIN_UNIX03
#define _STRUCT_X86_EXCEPTION_STATE64	struct __darwin_x86_exception_state64
_STRUCT_X86_EXCEPTION_STATE64
{
    unsigned int	__trapno;
    unsigned int	__err;
    __uint64_t		__faultvaddr;
};
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_X86_EXCEPTION_STATE64	struct x86_exception_state64
_STRUCT_X86_EXCEPTION_STATE64
{
    unsigned int	trapno;
    unsigned int	err;
    __uint64_t		faultvaddr;
};
#endif /* !__DARWIN_UNIX03 */

#if __DARWIN_UNIX03
#define _STRUCT_X86_DEBUG_STATE64	struct __darwin_x86_debug_state64
_STRUCT_X86_DEBUG_STATE64
{
	__uint64_t	__dr0;
	__uint64_t	__dr1;
	__uint64_t	__dr2;
	__uint64_t	__dr3;
	__uint64_t	__dr4;
	__uint64_t	__dr5;
	__uint64_t	__dr6;
	__uint64_t	__dr7;
};
#else /* !__DARWIN_UNIX03 */
#define _STRUCT_X86_DEBUG_STATE64	struct x86_debug_state64
_STRUCT_X86_DEBUG_STATE64
{
	__uint64_t	dr0;
	__uint64_t	dr1;
	__uint64_t	dr2;
	__uint64_t	dr3;
	__uint64_t	dr4;
	__uint64_t	dr5;
	__uint64_t	dr6;
	__uint64_t	dr7;
};
#endif /* !__DARWIN_UNIX03 */

#endif /* _MACH_I386__STRUCTS_H_ */
Commit	Line	Data
2d21ac55 A	1	/*
	2	* Copyright (c) 2004-2006 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
	5	*
	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
	14	*
	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
	25	*
	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#ifndef _MACH_I386__STRUCTS_H_
	33	#define _MACH_I386__STRUCTS_H_
	34
	35	/*
	36	* i386 is the structure that is exported to user threads for
	37	* use in status/mutate calls. This structure should never change.
	38	*
	39	*/
	40
	41	#if __DARWIN_UNIX03
	42	#define _STRUCT_X86_THREAD_STATE32 struct __darwin_i386_thread_state
	43	_STRUCT_X86_THREAD_STATE32
	44	{
	45	unsigned int __eax;
	46	unsigned int __ebx;
	47	unsigned int __ecx;
	48	unsigned int __edx;
	49	unsigned int __edi;
	50	unsigned int __esi;
	51	unsigned int __ebp;
	52	unsigned int __esp;
	53	unsigned int __ss;
	54	unsigned int __eflags;
	55	unsigned int __eip;
	56	unsigned int __cs;
	57	unsigned int __ds;
	58	unsigned int __es;
	59	unsigned int __fs;
	60	unsigned int __gs;
	61	};
	62	#else /* !__DARWIN_UNIX03 */
	63	#define _STRUCT_X86_THREAD_STATE32 struct i386_thread_state
	64	_STRUCT_X86_THREAD_STATE32
65	{
66	unsigned int eax;
67	unsigned int ebx;
68	unsigned int ecx;
69	unsigned int edx;
70	unsigned int edi;
71	unsigned int esi;
72	unsigned int ebp;
73	unsigned int esp;
74	unsigned int ss;
75	unsigned int eflags;
76	unsigned int eip;
77	unsigned int cs;
78	unsigned int ds;
79	unsigned int es;
80	unsigned int fs;
81	unsigned int gs;
82	};
83	#endif /* !__DARWIN_UNIX03 */
84
85	/* This structure should be double-word aligned for performance */
86
87	#if __DARWIN_UNIX03
88	#define _STRUCT_FP_CONTROL struct __darwin_fp_control
89	_STRUCT_FP_CONTROL
90	{
91	unsigned short __invalid :1,
92	__denorm :1,
93	__zdiv :1,
94	__ovrfl :1,
95	__undfl :1,
96	__precis :1,
97	:2,
98	__pc :2,
99	#if !defined(_POSIX_C_SOURCE) \|\| defined(_DARWIN_C_SOURCE)
100	#define FP_PREC_24B 0
101	#define FP_PREC_53B 2
102	#define FP_PREC_64B 3
103	#endif /* !_POSIX_C_SOURCE \|\| _DARWIN_C_SOURCE */
104	__rc :2,
105	#if !defined(_POSIX_C_SOURCE) \|\| defined(_DARWIN_C_SOURCE)
106	#define FP_RND_NEAR 0
107	#define FP_RND_DOWN 1
108	#define FP_RND_UP 2
109	#define FP_CHOP 3
110	#endif /* !_POSIX_C_SOURCE \|\| _DARWIN_C_SOURCE */
111	/inf/ :1,
112	:3;
113	};
114	typedef _STRUCT_FP_CONTROL __darwin_fp_control_t;
115	#else /* !__DARWIN_UNIX03 */
116	#define _STRUCT_FP_CONTROL struct fp_control
117	_STRUCT_FP_CONTROL
118	{
119	unsigned short invalid :1,
120	denorm :1,
121	zdiv :1,
122	ovrfl :1,
123	undfl :1,
124	precis :1,
125	:2,
126	pc :2,
127	#define FP_PREC_24B 0
128	#define FP_PREC_53B 2
129	#define FP_PREC_64B 3
130	rc :2,
131	#define FP_RND_NEAR 0
132	#define FP_RND_DOWN 1
133	#define FP_RND_UP 2
134	#define FP_CHOP 3
135	/inf/ :1,
136	:3;
137	};
138	typedef _STRUCT_FP_CONTROL fp_control_t;
139	#endif /* !__DARWIN_UNIX03 */
140
141	/*
142	* Status word.
143	*/
144
145	#if __DARWIN_UNIX03
146	#define _STRUCT_FP_STATUS struct __darwin_fp_status
147	_STRUCT_FP_STATUS
148	{
149	unsigned short __invalid :1,
150	__denorm :1,
151	__zdiv :1,
152	__ovrfl :1,
153	__undfl :1,
154	__precis :1,
155	__stkflt :1,
156	__errsumm :1,
157	__c0 :1,
158	__c1 :1,
159	__c2 :1,
160	__tos :3,
161	__c3 :1,
162	__busy :1;
163	};
164	typedef _STRUCT_FP_STATUS __darwin_fp_status_t;
165	#else /* !__DARWIN_UNIX03 */
166	#define _STRUCT_FP_STATUS struct fp_status
167	_STRUCT_FP_STATUS
168	{
169	unsigned short invalid :1,
170	denorm :1,
171	zdiv :1,
172	ovrfl :1,
173	undfl :1,
174	precis :1,
175	stkflt :1,
176	errsumm :1,
177	c0 :1,
178	c1 :1,
179	c2 :1,
180	tos :3,
181	c3 :1,
182	busy :1;
183	};
184	typedef _STRUCT_FP_STATUS fp_status_t;
185	#endif /* !__DARWIN_UNIX03 */
186
187	/* defn of 80bit x87 FPU or MMX register */
188
189	#if __DARWIN_UNIX03
190	#define _STRUCT_MMST_REG struct __darwin_mmst_reg
191	_STRUCT_MMST_REG
192	{
193	char __mmst_reg[10];
194	char __mmst_rsrv[6];
195	};
196	#else /* !__DARWIN_UNIX03 */
197	#define _STRUCT_MMST_REG struct mmst_reg
198	_STRUCT_MMST_REG
199	{
200	char mmst_reg[10];
201	char mmst_rsrv[6];
202	};
203	#endif /* !__DARWIN_UNIX03 */
204
205
206	/* defn of 128 bit XMM regs */
207
208	#if __DARWIN_UNIX03
209	#define _STRUCT_XMM_REG struct __darwin_xmm_reg
210	_STRUCT_XMM_REG
211	{
212	char __xmm_reg[16];
213	};
214	#else /* !__DARWIN_UNIX03 */
215	#define _STRUCT_XMM_REG struct xmm_reg
216	_STRUCT_XMM_REG
217	{
218	char xmm_reg[16];
219	};
220	#endif /* !__DARWIN_UNIX03 */
221
222	/*
223	* Floating point state.
224	*/
225
226	#if !defined(_POSIX_C_SOURCE) \|\| defined(_DARWIN_C_SOURCE)
227	#define FP_STATE_BYTES 512 /* number of chars worth of data from fpu_fcw */
228	#endif /* !_POSIX_C_SOURCE \|\| _DARWIN_C_SOURCE */
229
230	#if __DARWIN_UNIX03
231	#define _STRUCT_X86_FLOAT_STATE32 struct __darwin_i386_float_state
232	_STRUCT_X86_FLOAT_STATE32
233	{
234	int __fpu_reserved[2];
235	_STRUCT_FP_CONTROL __fpu_fcw; /* x87 FPU control word */
236	_STRUCT_FP_STATUS __fpu_fsw; /* x87 FPU status word */
237	__uint8_t __fpu_ftw; /* x87 FPU tag word */
238	__uint8_t __fpu_rsrv1; /* reserved */
239	__uint16_t __fpu_fop; /* x87 FPU Opcode */
240	__uint32_t __fpu_ip; /* x87 FPU Instruction Pointer offset */
241	__uint16_t __fpu_cs; /* x87 FPU Instruction Pointer Selector */
242	__uint16_t __fpu_rsrv2; /* reserved */
243	__uint32_t __fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */
244	__uint16_t __fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */
245	__uint16_t __fpu_rsrv3; /* reserved */
246	__uint32_t __fpu_mxcsr; /* MXCSR Register state */
247	__uint32_t __fpu_mxcsrmask; /* MXCSR mask */
248	_STRUCT_MMST_REG __fpu_stmm0; /* ST0/MM0 */
249	_STRUCT_MMST_REG __fpu_stmm1; /* ST1/MM1 */
250	_STRUCT_MMST_REG __fpu_stmm2; /* ST2/MM2 */
251	_STRUCT_MMST_REG __fpu_stmm3; /* ST3/MM3 */
252	_STRUCT_MMST_REG __fpu_stmm4; /* ST4/MM4 */
253	_STRUCT_MMST_REG __fpu_stmm5; /* ST5/MM5 */
254	_STRUCT_MMST_REG __fpu_stmm6; /* ST6/MM6 */
255	_STRUCT_MMST_REG __fpu_stmm7; /* ST7/MM7 */
256	_STRUCT_XMM_REG __fpu_xmm0; /* XMM 0 */
257	_STRUCT_XMM_REG __fpu_xmm1; /* XMM 1 */
258	_STRUCT_XMM_REG __fpu_xmm2; /* XMM 2 */
259	_STRUCT_XMM_REG __fpu_xmm3; /* XMM 3 */
260	_STRUCT_XMM_REG __fpu_xmm4; /* XMM 4 */
261	_STRUCT_XMM_REG __fpu_xmm5; /* XMM 5 */
262	_STRUCT_XMM_REG __fpu_xmm6; /* XMM 6 */
263	_STRUCT_XMM_REG __fpu_xmm7; /* XMM 7 */
264	char __fpu_rsrv4[1416]; / reserved */
265	int __fpu_reserved1;
266	};
267	#else /* !__DARWIN_UNIX03 */
268	#define _STRUCT_X86_FLOAT_STATE32 struct i386_float_state
269	_STRUCT_X86_FLOAT_STATE32
270	{
271	int fpu_reserved[2];
272	_STRUCT_FP_CONTROL fpu_fcw; /* x87 FPU control word */
273	_STRUCT_FP_STATUS fpu_fsw; /* x87 FPU status word */
274	__uint8_t fpu_ftw; /* x87 FPU tag word */
275	__uint8_t fpu_rsrv1; /* reserved */
276	__uint16_t fpu_fop; /* x87 FPU Opcode */
277	__uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */
278	__uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */
279	__uint16_t fpu_rsrv2; /* reserved */
280	__uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */
281	__uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */
282	__uint16_t fpu_rsrv3; /* reserved */
283	__uint32_t fpu_mxcsr; /* MXCSR Register state */
284	__uint32_t fpu_mxcsrmask; /* MXCSR mask */
285	_STRUCT_MMST_REG fpu_stmm0; /* ST0/MM0 */
286	_STRUCT_MMST_REG fpu_stmm1; /* ST1/MM1 */
287	_STRUCT_MMST_REG fpu_stmm2; /* ST2/MM2 */
288	_STRUCT_MMST_REG fpu_stmm3; /* ST3/MM3 */
289	_STRUCT_MMST_REG fpu_stmm4; /* ST4/MM4 */
290	_STRUCT_MMST_REG fpu_stmm5; /* ST5/MM5 */
291	_STRUCT_MMST_REG fpu_stmm6; /* ST6/MM6 */
292	_STRUCT_MMST_REG fpu_stmm7; /* ST7/MM7 */
293	_STRUCT_XMM_REG fpu_xmm0; /* XMM 0 */
294	_STRUCT_XMM_REG fpu_xmm1; /* XMM 1 */
295	_STRUCT_XMM_REG fpu_xmm2; /* XMM 2 */
296	_STRUCT_XMM_REG fpu_xmm3; /* XMM 3 */
297	_STRUCT_XMM_REG fpu_xmm4; /* XMM 4 */
298	_STRUCT_XMM_REG fpu_xmm5; /* XMM 5 */
299	_STRUCT_XMM_REG fpu_xmm6; /* XMM 6 */
300	_STRUCT_XMM_REG fpu_xmm7; /* XMM 7 */
301	char fpu_rsrv4[1416]; / reserved */
302	int fpu_reserved1;
303	};
304	#endif /* !__DARWIN_UNIX03 */
305
306	#if __DARWIN_UNIX03
307	#define _STRUCT_X86_EXCEPTION_STATE32 struct __darwin_i386_exception_state
308	_STRUCT_X86_EXCEPTION_STATE32
309	{
310	unsigned int __trapno;
311	unsigned int __err;
312	unsigned int __faultvaddr;
313	};
314	#else /* !__DARWIN_UNIX03 */
315	#define _STRUCT_X86_EXCEPTION_STATE32 struct i386_exception_state
316	_STRUCT_X86_EXCEPTION_STATE32
317	{
318	unsigned int trapno;
319	unsigned int err;
320	unsigned int faultvaddr;
321	};
322	#endif /* !__DARWIN_UNIX03 */
323
324	#if __DARWIN_UNIX03
325	#define _STRUCT_X86_DEBUG_STATE32 struct __darwin_x86_debug_state32
326	_STRUCT_X86_DEBUG_STATE32
327	{
328	unsigned int __dr0;
329	unsigned int __dr1;
330	unsigned int __dr2;
331	unsigned int __dr3;
332	unsigned int __dr4;
333	unsigned int __dr5;
334	unsigned int __dr6;
335	unsigned int __dr7;
336	};
337	#else /* !__DARWIN_UNIX03 */
338	#define _STRUCT_X86_DEBUG_STATE32 struct x86_debug_state32
339	_STRUCT_X86_DEBUG_STATE32
340	{
341	unsigned int dr0;
342	unsigned int dr1;
343	unsigned int dr2;
344	unsigned int dr3;
345	unsigned int dr4;
346	unsigned int dr5;
347	unsigned int dr6;
348	unsigned int dr7;
349	};
350	#endif /* !__DARWIN_UNIX03 */
351
352	/*
353	* 64 bit versions of the above
354	*/
355
356	#if __DARWIN_UNIX03
357	#define _STRUCT_X86_THREAD_STATE64 struct __darwin_x86_thread_state64
358	_STRUCT_X86_THREAD_STATE64
359	{
360	__uint64_t __rax;
361	__uint64_t __rbx;
362	__uint64_t __rcx;
363	__uint64_t __rdx;
364	__uint64_t __rdi;
365	__uint64_t __rsi;
366	__uint64_t __rbp;
367	__uint64_t __rsp;
368	__uint64_t __r8;
369	__uint64_t __r9;
370	__uint64_t __r10;
371	__uint64_t __r11;
372	__uint64_t __r12;
373	__uint64_t __r13;
374	__uint64_t __r14;
375	__uint64_t __r15;
376	__uint64_t __rip;
377	__uint64_t __rflags;
378	__uint64_t __cs;
379	__uint64_t __fs;
380	__uint64_t __gs;
381	};
382	#else /* !__DARWIN_UNIX03 */
383	#define _STRUCT_X86_THREAD_STATE64 struct x86_thread_state64
384	_STRUCT_X86_THREAD_STATE64
385	{
386	__uint64_t rax;
387	__uint64_t rbx;
388	__uint64_t rcx;
389	__uint64_t rdx;
390	__uint64_t rdi;
391	__uint64_t rsi;
392	__uint64_t rbp;
393	__uint64_t rsp;
394	__uint64_t r8;
395	__uint64_t r9;
396	__uint64_t r10;
397	__uint64_t r11;
398	__uint64_t r12;
399	__uint64_t r13;
400	__uint64_t r14;
401	__uint64_t r15;
402	__uint64_t rip;
403	__uint64_t rflags;
404	__uint64_t cs;
405	__uint64_t fs;
406	__uint64_t gs;
407	};
408	#endif /* !__DARWIN_UNIX03 */
409
410
411	#if __DARWIN_UNIX03
412	#define _STRUCT_X86_FLOAT_STATE64 struct __darwin_x86_float_state64
413	_STRUCT_X86_FLOAT_STATE64
414	{
415	int __fpu_reserved[2];
416	_STRUCT_FP_CONTROL __fpu_fcw; /* x87 FPU control word */
417	_STRUCT_FP_STATUS __fpu_fsw; /* x87 FPU status word */
418	__uint8_t __fpu_ftw; /* x87 FPU tag word */
419	__uint8_t __fpu_rsrv1; /* reserved */
420	__uint16_t __fpu_fop; /* x87 FPU Opcode */
421
422	/* x87 FPU Instruction Pointer */
423	__uint32_t __fpu_ip; /* offset */
424	__uint16_t __fpu_cs; /* Selector */
425
426	__uint16_t __fpu_rsrv2; /* reserved */
427
428	/* x87 FPU Instruction Operand(Data) Pointer */
429	__uint32_t __fpu_dp; /* offset */
430	__uint16_t __fpu_ds; /* Selector */
431
432	__uint16_t __fpu_rsrv3; /* reserved */
433	__uint32_t __fpu_mxcsr; /* MXCSR Register state */
434	__uint32_t __fpu_mxcsrmask; /* MXCSR mask */
435	_STRUCT_MMST_REG __fpu_stmm0; /* ST0/MM0 */
436	_STRUCT_MMST_REG __fpu_stmm1; /* ST1/MM1 */
437	_STRUCT_MMST_REG __fpu_stmm2; /* ST2/MM2 */
438	_STRUCT_MMST_REG __fpu_stmm3; /* ST3/MM3 */
439	_STRUCT_MMST_REG __fpu_stmm4; /* ST4/MM4 */
440	_STRUCT_MMST_REG __fpu_stmm5; /* ST5/MM5 */
441	_STRUCT_MMST_REG __fpu_stmm6; /* ST6/MM6 */
442	_STRUCT_MMST_REG __fpu_stmm7; /* ST7/MM7 */
443	_STRUCT_XMM_REG __fpu_xmm0; /* XMM 0 */
444	_STRUCT_XMM_REG __fpu_xmm1; /* XMM 1 */
445	_STRUCT_XMM_REG __fpu_xmm2; /* XMM 2 */
446	_STRUCT_XMM_REG __fpu_xmm3; /* XMM 3 */
447	_STRUCT_XMM_REG __fpu_xmm4; /* XMM 4 */
448	_STRUCT_XMM_REG __fpu_xmm5; /* XMM 5 */
449	_STRUCT_XMM_REG __fpu_xmm6; /* XMM 6 */
450	_STRUCT_XMM_REG __fpu_xmm7; /* XMM 7 */
451	_STRUCT_XMM_REG __fpu_xmm8; /* XMM 8 */
452	_STRUCT_XMM_REG __fpu_xmm9; /* XMM 9 */
453	_STRUCT_XMM_REG __fpu_xmm10; /* XMM 10 */
454	_STRUCT_XMM_REG __fpu_xmm11; /* XMM 11 */
455	_STRUCT_XMM_REG __fpu_xmm12; /* XMM 12 */
456	_STRUCT_XMM_REG __fpu_xmm13; /* XMM 13 */
457	_STRUCT_XMM_REG __fpu_xmm14; /* XMM 14 */
458	_STRUCT_XMM_REG __fpu_xmm15; /* XMM 15 */
459	char __fpu_rsrv4[616]; / reserved */
460	int __fpu_reserved1;
461	};
462	#else /* !__DARWIN_UNIX03 */
463	#define _STRUCT_X86_FLOAT_STATE64 struct x86_float_state64
464	_STRUCT_X86_FLOAT_STATE64
465	{
466	int fpu_reserved[2];
467	_STRUCT_FP_CONTROL fpu_fcw; /* x87 FPU control word */
468	_STRUCT_FP_STATUS fpu_fsw; /* x87 FPU status word */
469	__uint8_t fpu_ftw; /* x87 FPU tag word */
470	__uint8_t fpu_rsrv1; /* reserved */
471	__uint16_t fpu_fop; /* x87 FPU Opcode */
472
473	/* x87 FPU Instruction Pointer */
474	__uint32_t fpu_ip; /* offset */
475	__uint16_t fpu_cs; /* Selector */
476
477	__uint16_t fpu_rsrv2; /* reserved */
478
479	/* x87 FPU Instruction Operand(Data) Pointer */
480	__uint32_t fpu_dp; /* offset */
481	__uint16_t fpu_ds; /* Selector */
482
483	__uint16_t fpu_rsrv3; /* reserved */
484	__uint32_t fpu_mxcsr; /* MXCSR Register state */
485	__uint32_t fpu_mxcsrmask; /* MXCSR mask */
486	_STRUCT_MMST_REG fpu_stmm0; /* ST0/MM0 */
487	_STRUCT_MMST_REG fpu_stmm1; /* ST1/MM1 */
488	_STRUCT_MMST_REG fpu_stmm2; /* ST2/MM2 */
489	_STRUCT_MMST_REG fpu_stmm3; /* ST3/MM3 */
490	_STRUCT_MMST_REG fpu_stmm4; /* ST4/MM4 */
491	_STRUCT_MMST_REG fpu_stmm5; /* ST5/MM5 */
492	_STRUCT_MMST_REG fpu_stmm6; /* ST6/MM6 */
493	_STRUCT_MMST_REG fpu_stmm7; /* ST7/MM7 */
494	_STRUCT_XMM_REG fpu_xmm0; /* XMM 0 */
495	_STRUCT_XMM_REG fpu_xmm1; /* XMM 1 */
496	_STRUCT_XMM_REG fpu_xmm2; /* XMM 2 */
497	_STRUCT_XMM_REG fpu_xmm3; /* XMM 3 */
498	_STRUCT_XMM_REG fpu_xmm4; /* XMM 4 */
499	_STRUCT_XMM_REG fpu_xmm5; /* XMM 5 */
500	_STRUCT_XMM_REG fpu_xmm6; /* XMM 6 */
501	_STRUCT_XMM_REG fpu_xmm7; /* XMM 7 */
502	_STRUCT_XMM_REG fpu_xmm8; /* XMM 8 */
503	_STRUCT_XMM_REG fpu_xmm9; /* XMM 9 */
504	_STRUCT_XMM_REG fpu_xmm10; /* XMM 10 */
505	_STRUCT_XMM_REG fpu_xmm11; /* XMM 11 */
506	_STRUCT_XMM_REG fpu_xmm12; /* XMM 12 */
507	_STRUCT_XMM_REG fpu_xmm13; /* XMM 13 */
508	_STRUCT_XMM_REG fpu_xmm14; /* XMM 14 */
509	_STRUCT_XMM_REG fpu_xmm15; /* XMM 15 */
510	char fpu_rsrv4[616]; / reserved */
511	int fpu_reserved1;
512	};
513	#endif /* !__DARWIN_UNIX03 */
514
515	#if __DARWIN_UNIX03
516	#define _STRUCT_X86_EXCEPTION_STATE64 struct __darwin_x86_exception_state64
517	_STRUCT_X86_EXCEPTION_STATE64
518	{
519	unsigned int __trapno;
520	unsigned int __err;
521	__uint64_t __faultvaddr;
522	};
523	#else /* !__DARWIN_UNIX03 */
524	#define _STRUCT_X86_EXCEPTION_STATE64 struct x86_exception_state64
525	_STRUCT_X86_EXCEPTION_STATE64
526	{
527	unsigned int trapno;
528	unsigned int err;
529	__uint64_t faultvaddr;
530	};
531	#endif /* !__DARWIN_UNIX03 */
532
533	#if __DARWIN_UNIX03
534	#define _STRUCT_X86_DEBUG_STATE64 struct __darwin_x86_debug_state64
535	_STRUCT_X86_DEBUG_STATE64
536	{
537	__uint64_t __dr0;
538	__uint64_t __dr1;
539	__uint64_t __dr2;
540	__uint64_t __dr3;
541	__uint64_t __dr4;
542	__uint64_t __dr5;
543	__uint64_t __dr6;
544	__uint64_t __dr7;
545	};
546	#else /* !__DARWIN_UNIX03 */
547	#define _STRUCT_X86_DEBUG_STATE64 struct x86_debug_state64
548	_STRUCT_X86_DEBUG_STATE64
549	{
550	__uint64_t dr0;
551	__uint64_t dr1;
552	__uint64_t dr2;
553	__uint64_t dr3;
554	__uint64_t dr4;
555	__uint64_t dr5;
556	__uint64_t dr6;
557	__uint64_t dr7;
558	};
559	#endif /* !__DARWIN_UNIX03 */
560
561	#endif /* _MACH_I386__STRUCTS_H_ */