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1 | /* |
2 | * Copyright (c) 2006 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | ||
29 | #ifndef _I386_VMX_ASM_H_ | |
30 | #define _I386_VMX_ASM_H_ | |
31 | ||
32 | #include <mach/machine/vm_types.h> | |
33 | #include <mach/boolean.h> | |
34 | #include <kern/assert.h> | |
35 | #include <i386/eflags.h> | |
36 | #include <i386/seg.h> | |
37 | ||
38 | #ifndef DEBUG | |
39 | #include <debug.h> | |
40 | #endif | |
41 | ||
42 | #define VMX_FAIL_INVALID -1 | |
43 | #define VMX_FAIL_VALID -2 | |
44 | #define VMX_SUCCEED 0 | |
45 | ||
46 | static inline void enter_64bit_mode(void) { | |
47 | __asm__ __volatile__ ( | |
48 | ".byte 0xea /* far jump longmode */ \n\t" | |
49 | ".long 1f \n\t" | |
50 | ".word %P0 \n\t" | |
51 | ".code64 \n\t" | |
52 | "1:" | |
53 | :: "i" (KERNEL64_CS) | |
54 | ); | |
55 | } | |
56 | static inline void enter_compat_mode(void) { | |
57 | asm( | |
58 | "ljmp *4f \n\t" | |
59 | "4: \n\t" | |
60 | ".long 5f \n\t" | |
61 | ".word %P0 \n\t" | |
62 | ".code32 \n\t" | |
63 | "5:" | |
64 | :: "i" (KERNEL_CS) | |
65 | ); | |
66 | } | |
67 | ||
68 | #define __VMXOFF(res) \ | |
69 | __asm__ __volatile__ ( \ | |
70 | "vmxoff \n\t" \ | |
71 | "cmovcl %2, %0 \n\t" /* CF = 1, ZF = 0 */ \ | |
72 | "cmovzl %3, %0" /* CF = 0, ZF = 1 */ \ | |
73 | : "=&r" (res) \ | |
74 | : "0" (VMX_SUCCEED), \ | |
75 | "r" (VMX_FAIL_INVALID), \ | |
76 | "r" (VMX_FAIL_VALID) \ | |
77 | : "memory", "cc" \ | |
78 | ) | |
79 | ||
80 | #define __VMXON(addr, res) \ | |
81 | __asm__ __volatile__ ( \ | |
82 | "vmxon %4 \n\t" \ | |
83 | "cmovcl %2, %0 \n\t" /* CF = 1, ZF = 0 */ \ | |
84 | "cmovzl %3, %0" /* CF = 0, ZF = 1 */ \ | |
85 | : "=&r" (res) \ | |
86 | : "0" (VMX_SUCCEED), \ | |
87 | "r" (VMX_FAIL_INVALID), \ | |
88 | "r" (VMX_FAIL_VALID), \ | |
89 | "m" (*addr) \ | |
90 | : "memory", "cc" \ | |
91 | ); | |
92 | ||
93 | ||
94 | /* | |
95 | * __vmxoff -- Leave VMX Operation | |
96 | * | |
97 | */ | |
98 | static inline int | |
99 | __vmxoff(void) | |
100 | { | |
101 | int result; | |
102 | if (ml_is64bit()) { | |
103 | /* don't put anything between these lines! */ | |
104 | enter_64bit_mode(); | |
105 | __VMXOFF(result); | |
106 | enter_compat_mode(); | |
107 | } else { | |
108 | __VMXOFF(result); | |
109 | } | |
110 | return result; | |
111 | } | |
112 | ||
113 | /* | |
114 | * __vmxon -- Enter VMX Operation | |
115 | * | |
116 | */ | |
117 | static inline int | |
118 | __vmxon(addr64_t *v) | |
119 | { | |
120 | int result; | |
121 | if (ml_is64bit()) { | |
122 | /* don't put anything between these lines! */ | |
123 | enter_64bit_mode(); | |
124 | __VMXON(v, result); | |
125 | enter_compat_mode(); | |
126 | } else { | |
127 | __VMXON(v, result); | |
128 | } | |
129 | return result; | |
130 | } | |
131 | ||
132 | /* | |
133 | * VMX Capability Registers (VCR) | |
134 | * | |
135 | */ | |
136 | #define VMX_VCR_VMCS_MEM_TYPE_BIT 50 | |
137 | #define VMX_VCR_VMCS_MEM_TYPE_MASK 0xF | |
138 | ||
139 | #define VMX_VCR_VMCS_SIZE_BIT 32 | |
140 | #define VMX_VCR_VMCS_SIZE_MASK 0x01FFF | |
141 | #define VMX_VCR_VMCS_REV_ID 0x00000000FFFFFFFFLL | |
142 | ||
143 | #define VMX_VCR_ACT_HLT_BIT 6 | |
144 | #define VMX_VCR_ACT_HLT_MASK 0x1 | |
145 | #define VMX_VCR_ACT_SHUTDOWN_BIT 7 | |
146 | #define VMX_VCR_ACT_SHUTDOWN_MASK 0x1 | |
147 | #define VMX_VCR_ACT_SIPI_BIT 8 | |
148 | #define VMX_VCR_ACT_SIPI_MASK 0x1 | |
149 | #define VMX_VCR_ACT_CSTATE_BIT 9 | |
150 | #define VMX_VCR_ACT_CSTATE_MASK 0x1 | |
151 | #define VMX_VCR_CR3_TARGS_BIT 16 | |
152 | #define VMX_VCR_CR3_TARGS_MASK 0xFF | |
153 | #define VMX_VCR_MAX_MSRS_BIT 25 | |
154 | #define VMX_VCR_MAX_MSRS_MASK 0x7 | |
155 | #define VMX_VCR_MSEG_ID_BIT 32 | |
156 | #define VMX_VCR_MSEG_ID_MASK 0xFFFFFFFF | |
157 | ||
158 | #endif /* _I386_VMX_H_ */ |