[apple/xnu.git] / osfmk / arm64 / genassym.c

/*
 * Copyright (c) 2007 Apple Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 *
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 *
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 *
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
/*
 * Mach Operating System
 * Copyright (c) 1991,1990 Carnegie Mellon University
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */

#include <stddef.h>

#include <mach_ldebug.h>

/*
 * Pass field offsets to assembly code.
 */
#include <kern/ast.h>
#include <kern/thread.h>
#include <kern/task.h>
#include <kern/locks.h>
#include <ipc/ipc_space.h>
#include <ipc/ipc_port.h>
#include <ipc/ipc_pset.h>
#include <kern/host.h>
#include <kern/misc_protos.h>
#include <kern/syscall_sw.h>
#include <arm/thread.h>
#include <mach/arm/vm_param.h>
#include <arm/misc_protos.h>
#include <arm/pmap.h>
#include <arm/trap.h>
#include <arm/cpu_data_internal.h>
#include <arm/cpu_capabilities.h>
#include <arm/cpu_internal.h>
#include <arm/rtclock.h>
#include <machine/commpage.h>
#include <vm/vm_map.h>
#include <pexpert/arm64/boot.h>
#include <arm64/proc_reg.h>
#include <prng/random.h>

/*
 * genassym.c is used to produce an
 * assembly file which, intermingled with unuseful assembly code,
 * has all the necessary definitions emitted. This assembly file is
 * then postprocessed with sed to extract only these definitions
 * and thus the final assyms.s is created.
 *
 * This convoluted means is necessary since the structure alignment
 * and packing may be different between the host machine and the
 * target so we are forced into using the cross compiler to generate
 * the values, but we cannot run anything on the target machine.
 */

#define DECLARE(SYM, VAL) \
	__asm("DEFINITION__define__" SYM ":\t .ascii \"%0\"" : : "n"  ((u_long)(VAL)))


int     main(
	int             argc,
	char            ** argv);

int
main(
	int     argc,
	char    **argv)
{
	DECLARE("T_PREFETCH_ABT", T_PREFETCH_ABT);
	DECLARE("T_DATA_ABT", T_DATA_ABT);

	DECLARE("AST_URGENT", AST_URGENT);
	DECLARE("AST_PREEMPTION", AST_PREEMPTION);

	DECLARE("TH_RECOVER", offsetof(struct thread, recover));
	DECLARE("TH_CONTINUATION", offsetof(struct thread, continuation));
	DECLARE("TH_KERNEL_STACK", offsetof(struct thread, kernel_stack));
	DECLARE("TH_KSTACKPTR", offsetof(struct thread, machine.kstackptr));
	DECLARE("THREAD_UTHREAD", offsetof(struct thread, uthread));

	DECLARE("TASK_MACH_EXC_PORT",
	    offsetof(struct task, exc_actions[EXC_MACH_SYSCALL].port));

	/* These fields are being added on demand */
	DECLARE("ACT_TASK", offsetof(struct thread, task));
	DECLARE("ACT_CONTEXT", offsetof(struct thread, machine.contextData));
	DECLARE("ACT_UPCB", offsetof(struct thread, machine.upcb));
//	DECLARE("ACT_PCBDATA",	offsetof(struct thread, machine.contextData.ss));
	DECLARE("ACT_UNEON", offsetof(struct thread, machine.uNeon));
//	DECLARE("ACT_NEONDATA", offsetof(struct thread, machine.contextData.ns));
	DECLARE("TH_CTH_SELF", offsetof(struct thread, machine.cthread_self));
	DECLARE("TH_CTH_DATA", offsetof(struct thread, machine.cthread_data));
	DECLARE("ACT_PREEMPT_CNT", offsetof(struct thread, machine.preemption_count));
	DECLARE("ACT_CPUDATAP", offsetof(struct thread, machine.CpuDatap));
	DECLARE("ACT_MAP", offsetof(struct thread, map));
	DECLARE("ACT_DEBUGDATA", offsetof(struct thread, machine.DebugData));
	DECLARE("TH_IOTIER_OVERRIDE", offsetof(struct thread, iotier_override));
	DECLARE("TH_RWLOCK_CNT", offsetof(struct thread, rwlock_count));
	DECLARE("TH_SCHED_FLAGS", offsetof(struct thread, sched_flags));
	DECLARE("TH_SFLAG_RW_PROMOTED_BIT", TH_SFLAG_RW_PROMOTED_BIT);

	DECLARE("TH_MACH_SYSCALLS", offsetof(struct thread, syscalls_mach));
	DECLARE("TH_UNIX_SYSCALLS", offsetof(struct thread, syscalls_unix));
	DECLARE("TASK_BSD_INFO", offsetof(struct task, bsd_info));

	DECLARE("MACH_TRAP_TABLE_COUNT", MACH_TRAP_TABLE_COUNT);
	DECLARE("MACH_TRAP_TABLE_ENTRY_SIZE", sizeof(mach_trap_t));

	DECLARE("MAP_PMAP", offsetof(struct _vm_map, pmap));

	DECLARE("ARM_CONTEXT_SIZE", sizeof(arm_context_t));

	DECLARE("CONTEXT_SS", offsetof(arm_context_t, ss));
	DECLARE("SS_FLAVOR", offsetof(arm_context_t, ss.ash.flavor));
	DECLARE("ARM_SAVED_STATE32", ARM_SAVED_STATE32);
	DECLARE("ARM_SAVED_STATE64", ARM_SAVED_STATE64);
	DECLARE("ARM_SAVED_STATE64_COUNT", ARM_SAVED_STATE64_COUNT);

	DECLARE("SS32_W0", offsetof(arm_context_t, ss.ss_32.r[0]));
	DECLARE("SS32_W2", offsetof(arm_context_t, ss.ss_32.r[2]));
	DECLARE("SS32_W4", offsetof(arm_context_t, ss.ss_32.r[4]));
	DECLARE("SS32_W6", offsetof(arm_context_t, ss.ss_32.r[6]));
	DECLARE("SS32_W8", offsetof(arm_context_t, ss.ss_32.r[8]));
	DECLARE("SS32_W10", offsetof(arm_context_t, ss.ss_32.r[10]));
	DECLARE("SS32_W12", offsetof(arm_context_t, ss.ss_32.r[12]));
	DECLARE("SS32_SP", offsetof(arm_context_t, ss.ss_32.sp));
	DECLARE("SS32_LR", offsetof(arm_context_t, ss.ss_32.lr));
	DECLARE("SS32_PC", offsetof(arm_context_t, ss.ss_32.pc));
	DECLARE("SS32_CPSR", offsetof(arm_context_t, ss.ss_32.cpsr));
	DECLARE("SS32_VADDR", offsetof(arm_context_t, ss.ss_32.far));
	DECLARE("SS32_STATUS", offsetof(arm_context_t, ss.ss_32.esr));

	DECLARE("SS64_X0", offsetof(arm_context_t, ss.ss_64.x[0]));
	DECLARE("SS64_X2", offsetof(arm_context_t, ss.ss_64.x[2]));
	DECLARE("SS64_X4", offsetof(arm_context_t, ss.ss_64.x[4]));
	DECLARE("SS64_X6", offsetof(arm_context_t, ss.ss_64.x[6]));
	DECLARE("SS64_X8", offsetof(arm_context_t, ss.ss_64.x[8]));
	DECLARE("SS64_X10", offsetof(arm_context_t, ss.ss_64.x[10]));
	DECLARE("SS64_X12", offsetof(arm_context_t, ss.ss_64.x[12]));
	DECLARE("SS64_X14", offsetof(arm_context_t, ss.ss_64.x[14]));
	DECLARE("SS64_X16", offsetof(arm_context_t, ss.ss_64.x[16]));
	DECLARE("SS64_X18", offsetof(arm_context_t, ss.ss_64.x[18]));
	DECLARE("SS64_X19", offsetof(arm_context_t, ss.ss_64.x[19]));
	DECLARE("SS64_X20", offsetof(arm_context_t, ss.ss_64.x[20]));
	DECLARE("SS64_X21", offsetof(arm_context_t, ss.ss_64.x[21]));
	DECLARE("SS64_X22", offsetof(arm_context_t, ss.ss_64.x[22]));
	DECLARE("SS64_X23", offsetof(arm_context_t, ss.ss_64.x[23]));
	DECLARE("SS64_X24", offsetof(arm_context_t, ss.ss_64.x[24]));
	DECLARE("SS64_X25", offsetof(arm_context_t, ss.ss_64.x[25]));
	DECLARE("SS64_X26", offsetof(arm_context_t, ss.ss_64.x[26]));
	DECLARE("SS64_X27", offsetof(arm_context_t, ss.ss_64.x[27]));
	DECLARE("SS64_X28", offsetof(arm_context_t, ss.ss_64.x[28]));
	DECLARE("SS64_FP", offsetof(arm_context_t, ss.ss_64.fp));
	DECLARE("SS64_LR", offsetof(arm_context_t, ss.ss_64.lr));
	DECLARE("SS64_SP", offsetof(arm_context_t, ss.ss_64.sp));
	DECLARE("SS64_PC", offsetof(arm_context_t, ss.ss_64.pc));
	DECLARE("SS64_CPSR", offsetof(arm_context_t, ss.ss_64.cpsr));
	DECLARE("SS64_FAR", offsetof(arm_context_t, ss.ss_64.far));
	DECLARE("SS64_ESR", offsetof(arm_context_t, ss.ss_64.esr));

	DECLARE("CONTEXT_NS", offsetof(arm_context_t, ns));
	DECLARE("NS_FLAVOR", offsetof(arm_context_t, ns.nsh.flavor));
	DECLARE("NS_COUNT", offsetof(arm_context_t, ns.nsh.count));
	DECLARE("ARM_NEON_SAVED_STATE32", ARM_NEON_SAVED_STATE32);
	DECLARE("ARM_NEON_SAVED_STATE64", ARM_NEON_SAVED_STATE64);
	DECLARE("ARM_NEON_SAVED_STATE64_COUNT", ARM_NEON_SAVED_STATE64_COUNT);

	DECLARE("NS32_Q0", offsetof(arm_context_t, ns.ns_32.v.q[0]));
	DECLARE("NS32_Q2", offsetof(arm_context_t, ns.ns_32.v.q[2]));
	DECLARE("NS32_Q4", offsetof(arm_context_t, ns.ns_32.v.q[4]));
	DECLARE("NS32_Q6", offsetof(arm_context_t, ns.ns_32.v.q[6]));
	DECLARE("NS32_Q8", offsetof(arm_context_t, ns.ns_32.v.q[8]));
	DECLARE("NS32_Q10", offsetof(arm_context_t, ns.ns_32.v.q[10]));
	DECLARE("NS32_Q12", offsetof(arm_context_t, ns.ns_32.v.q[12]));
	DECLARE("NS32_Q14", offsetof(arm_context_t, ns.ns_32.v.q[14]));
	DECLARE("NS32_FPSR", offsetof(arm_context_t, ns.ns_32.fpsr));
	DECLARE("NS32_FPCR", offsetof(arm_context_t, ns.ns_32.fpcr));

	DECLARE("NS64_D8", offsetof(arm_context_t, ns.ns_64.v.d[8]));
	DECLARE("NS64_D9", offsetof(arm_context_t, ns.ns_64.v.d[9]));
	DECLARE("NS64_D10", offsetof(arm_context_t, ns.ns_64.v.d[10]));
	DECLARE("NS64_D11", offsetof(arm_context_t, ns.ns_64.v.d[11]));
	DECLARE("NS64_D12", offsetof(arm_context_t, ns.ns_64.v.d[12]));
	DECLARE("NS64_D13", offsetof(arm_context_t, ns.ns_64.v.d[13]));
	DECLARE("NS64_D14", offsetof(arm_context_t, ns.ns_64.v.d[14]));
	DECLARE("NS64_D15", offsetof(arm_context_t, ns.ns_64.v.d[15]));

	DECLARE("NS64_Q0", offsetof(arm_context_t, ns.ns_64.v.q[0]));
	DECLARE("NS64_Q2", offsetof(arm_context_t, ns.ns_64.v.q[2]));
	DECLARE("NS64_Q4", offsetof(arm_context_t, ns.ns_64.v.q[4]));
	DECLARE("NS64_Q6", offsetof(arm_context_t, ns.ns_64.v.q[6]));
	DECLARE("NS64_Q8", offsetof(arm_context_t, ns.ns_64.v.q[8]));
	DECLARE("NS64_Q10", offsetof(arm_context_t, ns.ns_64.v.q[10]));
	DECLARE("NS64_Q12", offsetof(arm_context_t, ns.ns_64.v.q[12]));
	DECLARE("NS64_Q14", offsetof(arm_context_t, ns.ns_64.v.q[14]));
	DECLARE("NS64_Q16", offsetof(arm_context_t, ns.ns_64.v.q[16]));
	DECLARE("NS64_Q18", offsetof(arm_context_t, ns.ns_64.v.q[18]));
	DECLARE("NS64_Q20", offsetof(arm_context_t, ns.ns_64.v.q[20]));
	DECLARE("NS64_Q22", offsetof(arm_context_t, ns.ns_64.v.q[22]));
	DECLARE("NS64_Q24", offsetof(arm_context_t, ns.ns_64.v.q[24]));
	DECLARE("NS64_Q26", offsetof(arm_context_t, ns.ns_64.v.q[26]));
	DECLARE("NS64_Q28", offsetof(arm_context_t, ns.ns_64.v.q[28]));
	DECLARE("NS64_Q30", offsetof(arm_context_t, ns.ns_64.v.q[30]));
	DECLARE("NS64_FPSR", offsetof(arm_context_t, ns.ns_64.fpsr));
	DECLARE("NS64_FPCR", offsetof(arm_context_t, ns.ns_64.fpcr));

	DECLARE("PGBYTES", ARM_PGBYTES);
	DECLARE("PGSHIFT", ARM_PGSHIFT);
	DECLARE("PGMASK", ARM_PGMASK);

	DECLARE("VM_MIN_ADDRESS", VM_MIN_ADDRESS);
	DECLARE("VM_MAX_ADDRESS", VM_MAX_ADDRESS);
	DECLARE("VM_MIN_KERNEL_ADDRESS", VM_MIN_KERNEL_ADDRESS);
	DECLARE("VM_MAX_KERNEL_ADDRESS", VM_MAX_KERNEL_ADDRESS);
	DECLARE("KERNELBASE", VM_MIN_KERNEL_ADDRESS);
	DECLARE("KERNEL_STACK_SIZE", KERNEL_STACK_SIZE);
	DECLARE("TBI_MASK", TBI_MASK);

	DECLARE("KERN_INVALID_ADDRESS", KERN_INVALID_ADDRESS);


	DECLARE("MAX_CPUS", MAX_CPUS);

	DECLARE("cdeSize",
	    sizeof(struct cpu_data_entry));

	DECLARE("cdSize",
	    sizeof(struct cpu_data));

	DECLARE("CPU_ACTIVE_THREAD",
	    offsetof(cpu_data_t, cpu_active_thread));
	DECLARE("CPU_ACTIVE_STACK",
	    offsetof(cpu_data_t, cpu_active_stack));
	DECLARE("CPU_ISTACKPTR",
	    offsetof(cpu_data_t, istackptr));
	DECLARE("CPU_INTSTACK_TOP",
	    offsetof(cpu_data_t, intstack_top));
	DECLARE("CPU_EXCEPSTACKPTR",
	    offsetof(cpu_data_t, excepstackptr));
	DECLARE("CPU_EXCEPSTACK_TOP",
	    offsetof(cpu_data_t, excepstack_top));
#if __ARM_KERNEL_PROTECT__
	DECLARE("CPU_EXC_VECTORS",
	    offsetof(cpu_data_t, cpu_exc_vectors));
#endif /* __ARM_KERNEL_PROTECT__ */
	DECLARE("CPU_NUMBER_GS",
	    offsetof(cpu_data_t, cpu_number));
	DECLARE("CPU_IDENT",
	    offsetof(cpu_data_t, cpu_ident));
	DECLARE("CPU_RUNNING",
	    offsetof(cpu_data_t, cpu_running));
	DECLARE("CPU_MCOUNT_OFF",
	    offsetof(cpu_data_t, cpu_mcount_off));
	DECLARE("CPU_PENDING_AST",
	    offsetof(cpu_data_t, cpu_pending_ast));
	DECLARE("CPU_PROCESSOR",
	    offsetof(cpu_data_t, cpu_processor));
	DECLARE("CPU_CACHE_DISPATCH",
	    offsetof(cpu_data_t, cpu_cache_dispatch));
	DECLARE("CPU_BASE_TIMEBASE",
	    offsetof(cpu_data_t, cpu_base_timebase));
	DECLARE("CPU_DECREMENTER",
	    offsetof(cpu_data_t, cpu_decrementer));
	DECLARE("CPU_GET_DECREMENTER_FUNC",
	    offsetof(cpu_data_t, cpu_get_decrementer_func));
	DECLARE("CPU_SET_DECREMENTER_FUNC",
	    offsetof(cpu_data_t, cpu_set_decrementer_func));
	DECLARE("CPU_GET_FIQ_HANDLER",
	    offsetof(cpu_data_t, cpu_get_fiq_handler));
	DECLARE("CPU_TBD_HARDWARE_ADDR",
	    offsetof(cpu_data_t, cpu_tbd_hardware_addr));
	DECLARE("CPU_TBD_HARDWARE_VAL",
	    offsetof(cpu_data_t, cpu_tbd_hardware_val));
	DECLARE("CPU_INT_STATE",
	    offsetof(cpu_data_t, cpu_int_state));
	DECLARE("INTERRUPT_HANDLER",
	    offsetof(cpu_data_t, interrupt_handler));
	DECLARE("INTERRUPT_TARGET",
	    offsetof(cpu_data_t, interrupt_target));
	DECLARE("INTERRUPT_REFCON",
	    offsetof(cpu_data_t, interrupt_refCon));
	DECLARE("INTERRUPT_NUB",
	    offsetof(cpu_data_t, interrupt_nub));
	DECLARE("INTERRUPT_SOURCE",
	    offsetof(cpu_data_t, interrupt_source));
	DECLARE("CPU_USER_DEBUG",
	    offsetof(cpu_data_t, cpu_user_debug));
	DECLARE("CPU_STAT_IRQ",
	    offsetof(cpu_data_t, cpu_stat.irq_ex_cnt));
	DECLARE("CPU_STAT_IRQ_WAKE",
	    offsetof(cpu_data_t, cpu_stat.irq_ex_cnt_wake));
	DECLARE("CPU_RESET_HANDLER",
	    offsetof(cpu_data_t, cpu_reset_handler));
	DECLARE("CPU_RESET_ASSIST",
	    offsetof(cpu_data_t, cpu_reset_assist));
	DECLARE("CPU_REGMAP_PADDR",
	    offsetof(cpu_data_t, cpu_regmap_paddr));
	DECLARE("CPU_PHYS_ID",
	    offsetof(cpu_data_t, cpu_phys_id));
	DECLARE("RTCLOCK_DATAP",
	    offsetof(cpu_data_t, rtclock_datap));
	DECLARE("CLUSTER_MASTER",
	    offsetof(cpu_data_t, cluster_master));

	DECLARE("RTCLOCKDataSize",
	    sizeof(rtclock_data_t));
	DECLARE("RTCLOCK_ADJ_ABSTIME_LOW",
	    offsetof(rtclock_data_t, rtc_adj.abstime_val.low));
	DECLARE("RTCLOCK_ADJ_ABSTIME_HIGH",
	    offsetof(rtclock_data_t, rtc_adj.abstime_val.high));
	DECLARE("RTCLOCK_BASE_ABSTIME_LOW",
	    offsetof(rtclock_data_t, rtc_base.abstime_val.low));
	DECLARE("RTCLOCK_BASE_ABSTIME_HIGH",
	    offsetof(rtclock_data_t, rtc_base.abstime_val.high));

	DECLARE("SIGPdec", SIGPdec);

	DECLARE("rhdSize",
	    sizeof(struct reset_handler_data));
#if WITH_CLASSIC_S2R || !__arm64__
	DECLARE("stSize",
	    sizeof(SleepToken));
#endif

	DECLARE("CPU_DATA_ENTRIES", offsetof(struct reset_handler_data, cpu_data_entries));
	DECLARE("ASSIST_RESET_HANDLER", offsetof(struct reset_handler_data, assist_reset_handler));

	DECLARE("CPU_DATA_PADDR", offsetof(struct cpu_data_entry, cpu_data_paddr));

	DECLARE("INTSTACK_SIZE", INTSTACK_SIZE);
	DECLARE("EXCEPSTACK_SIZE", EXCEPSTACK_SIZE);

	DECLARE("PAGE_MAX_SIZE", PAGE_MAX_SIZE);

	DECLARE("TIMER_TSTAMP",
	    offsetof(struct timer, tstamp));
	DECLARE("THREAD_TIMER",
	    offsetof(struct processor, processor_data.thread_timer));
	DECLARE("KERNEL_TIMER",
	    offsetof(struct processor, processor_data.kernel_timer));
	DECLARE("SYSTEM_STATE",
	    offsetof(struct processor, processor_data.system_state));
	DECLARE("USER_STATE",
	    offsetof(struct processor, processor_data.user_state));
	DECLARE("CURRENT_STATE",
	    offsetof(struct processor, processor_data.current_state));

	DECLARE("SYSTEM_TIMER",
	    offsetof(struct thread, system_timer));
	DECLARE("USER_TIMER",
	    offsetof(struct thread, user_timer));

#if !CONFIG_SKIP_PRECISE_USER_KERNEL_TIME
	DECLARE("PRECISE_USER_KERNEL_TIME",
	    offsetof(struct thread, precise_user_kernel_time));
#endif

	DECLARE("BA_VIRT_BASE",
	    offsetof(struct boot_args, virtBase));
	DECLARE("BA_PHYS_BASE",
	    offsetof(struct boot_args, physBase));
	DECLARE("BA_MEM_SIZE",
	    offsetof(struct boot_args, memSize));
	DECLARE("BA_TOP_OF_KERNEL_DATA",
	    offsetof(struct boot_args, topOfKernelData));
	DECLARE("BA_DEVICE_TREE",
	    offsetof(struct boot_args, deviceTreeP));
	DECLARE("BA_DEVICE_TREE_LENGTH",
	    offsetof(struct boot_args, deviceTreeLength));
	DECLARE("BA_BOOT_FLAGS",
	    offsetof(struct boot_args, bootFlags));

	DECLARE("ENTROPY_INDEX_PTR",
	    offsetof(entropy_data_t, index_ptr));
	DECLARE("ENTROPY_BUFFER",
	    offsetof(entropy_data_t, buffer));
	DECLARE("ENTROPY_DATA_SIZE", sizeof(struct entropy_data));

	DECLARE("SR_RESTORE_TCR_EL1", offsetof(struct sysreg_restore, tcr_el1));


	return 0;
}
Commit	Line	Data
5ba3f43e A	1	/*
	2	* Copyright (c) 2007 Apple Inc. All rights reserved.
	3	*
	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
	5	*
	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
	14	*
	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
	25	*
	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
0a7de745	31	/*
5ba3f43e A	32	* Mach Operating System
	33	* Copyright (c) 1991,1990 Carnegie Mellon University
	34	* All Rights Reserved.
0a7de745	35	*
5ba3f43e A	36	* Permission to use, copy, modify and distribute this software and its
	37	* documentation is hereby granted, provided that both the copyright
	38	* notice and this permission notice appear in all copies of the
	39	* software, derivative works or modified versions, and any portions
	40	* thereof, and that both notices appear in supporting documentation.
0a7de745	41	*
5ba3f43e A	42	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	43	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	44	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
0a7de745	45	*
5ba3f43e	46	* Carnegie Mellon requests users of this software to return to
0a7de745	47	*
5ba3f43e A	48	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	49	* School of Computer Science
	50	* Carnegie Mellon University
	51	* Pittsburgh PA 15213-3890
0a7de745	52	*
5ba3f43e A	53	* any improvements or extensions that they make and grant Carnegie Mellon
	54	* the rights to redistribute these changes.
	55	*/
	56
	57	#include <stddef.h>
	58
	59	#include <mach_ldebug.h>
	60
	61	/*
	62	* Pass field offsets to assembly code.
	63	*/
	64	#include <kern/ast.h>
	65	#include <kern/thread.h>
	66	#include <kern/task.h>
	67	#include <kern/locks.h>
	68	#include <ipc/ipc_space.h>
	69	#include <ipc/ipc_port.h>
	70	#include <ipc/ipc_pset.h>
	71	#include <kern/host.h>
	72	#include <kern/misc_protos.h>
	73	#include <kern/syscall_sw.h>
	74	#include <arm/thread.h>
	75	#include <mach/arm/vm_param.h>
	76	#include <arm/misc_protos.h>
	77	#include <arm/pmap.h>
	78	#include <arm/trap.h>
	79	#include <arm/cpu_data_internal.h>
	80	#include <arm/cpu_capabilities.h>
	81	#include <arm/cpu_internal.h>
	82	#include <arm/rtclock.h>
	83	#include <machine/commpage.h>
	84	#include <vm/vm_map.h>
	85	#include <pexpert/arm64/boot.h>
	86	#include <arm64/proc_reg.h>
	87	#include <prng/random.h>
	88
5ba3f43e A	89	/*
	90	* genassym.c is used to produce an
	91	* assembly file which, intermingled with unuseful assembly code,
	92	* has all the necessary definitions emitted. This assembly file is
	93	* then postprocessed with sed to extract only these definitions
	94	* and thus the final assyms.s is created.
	95	*
	96	* This convoluted means is necessary since the structure alignment
	97	* and packing may be different between the host machine and the
	98	* target so we are forced into using the cross compiler to generate
	99	* the values, but we cannot run anything on the target machine.
	100	*/
	101
0a7de745	102	#define DECLARE(SYM, VAL) \
5ba3f43e A	103	__asm("DEFINITION__define__" SYM ":\t .ascii \"%0\"" : : "n" ((u_long)(VAL)))
	104
	105
0a7de745 A	106	int main(
	107	int argc,
	108	char ** argv);
5ba3f43e A	109
	110	int
	111	main(
0a7de745 A	112	int argc,
0a7de745 A	113	char **argv)
5ba3f43e	114	{
0a7de745 A	115	DECLARE("T_PREFETCH_ABT", T_PREFETCH_ABT);
0a7de745 A	116	DECLARE("T_DATA_ABT", T_DATA_ABT);
5ba3f43e	117
0a7de745 A	118	DECLARE("AST_URGENT", AST_URGENT);
0a7de745 A	119	DECLARE("AST_PREEMPTION", AST_PREEMPTION);
5ba3f43e	120
0a7de745 A	121	DECLARE("TH_RECOVER", offsetof(struct thread, recover));
	122	DECLARE("TH_CONTINUATION", offsetof(struct thread, continuation));
	123	DECLARE("TH_KERNEL_STACK", offsetof(struct thread, kernel_stack));
5ba3f43e	124	DECLARE("TH_KSTACKPTR", offsetof(struct thread, machine.kstackptr));
0a7de745	125	DECLARE("THREAD_UTHREAD", offsetof(struct thread, uthread));
5ba3f43e A	126
5ba3f43e A	127	DECLARE("TASK_MACH_EXC_PORT",
0a7de745	128	offsetof(struct task, exc_actions[EXC_MACH_SYSCALL].port));
5ba3f43e A	129
5ba3f43e A	130	/* These fields are being added on demand */
0a7de745	131	DECLARE("ACT_TASK", offsetof(struct thread, task));
5ba3f43e	132	DECLARE("ACT_CONTEXT", offsetof(struct thread, machine.contextData));
0a7de745	133	DECLARE("ACT_UPCB", offsetof(struct thread, machine.upcb));
5ba3f43e A	134	// DECLARE("ACT_PCBDATA", offsetof(struct thread, machine.contextData.ss));
	135	DECLARE("ACT_UNEON", offsetof(struct thread, machine.uNeon));
	136	// DECLARE("ACT_NEONDATA", offsetof(struct thread, machine.contextData.ns));
0a7de745 A	137	DECLARE("TH_CTH_SELF", offsetof(struct thread, machine.cthread_self));
	138	DECLARE("TH_CTH_DATA", offsetof(struct thread, machine.cthread_data));
	139	DECLARE("ACT_PREEMPT_CNT", offsetof(struct thread, machine.preemption_count));
	140	DECLARE("ACT_CPUDATAP", offsetof(struct thread, machine.CpuDatap));
	141	DECLARE("ACT_MAP", offsetof(struct thread, map));
	142	DECLARE("ACT_DEBUGDATA", offsetof(struct thread, machine.DebugData));
	143	DECLARE("TH_IOTIER_OVERRIDE", offsetof(struct thread, iotier_override));
	144	DECLARE("TH_RWLOCK_CNT", offsetof(struct thread, rwlock_count));
	145	DECLARE("TH_SCHED_FLAGS", offsetof(struct thread, sched_flags));
	146	DECLARE("TH_SFLAG_RW_PROMOTED_BIT", TH_SFLAG_RW_PROMOTED_BIT);
5ba3f43e A	147
	148	DECLARE("TH_MACH_SYSCALLS", offsetof(struct thread, syscalls_mach));
	149	DECLARE("TH_UNIX_SYSCALLS", offsetof(struct thread, syscalls_unix));
	150	DECLARE("TASK_BSD_INFO", offsetof(struct task, bsd_info));
	151
	152	DECLARE("MACH_TRAP_TABLE_COUNT", MACH_TRAP_TABLE_COUNT);
	153	DECLARE("MACH_TRAP_TABLE_ENTRY_SIZE", sizeof(mach_trap_t));
	154
0a7de745	155	DECLARE("MAP_PMAP", offsetof(struct _vm_map, pmap));
5ba3f43e A	156
	157	DECLARE("ARM_CONTEXT_SIZE", sizeof(arm_context_t));
	158
	159	DECLARE("CONTEXT_SS", offsetof(arm_context_t, ss));
	160	DECLARE("SS_FLAVOR", offsetof(arm_context_t, ss.ash.flavor));
	161	DECLARE("ARM_SAVED_STATE32", ARM_SAVED_STATE32);
	162	DECLARE("ARM_SAVED_STATE64", ARM_SAVED_STATE64);
	163	DECLARE("ARM_SAVED_STATE64_COUNT", ARM_SAVED_STATE64_COUNT);
	164
	165	DECLARE("SS32_W0", offsetof(arm_context_t, ss.ss_32.r[0]));
	166	DECLARE("SS32_W2", offsetof(arm_context_t, ss.ss_32.r[2]));
	167	DECLARE("SS32_W4", offsetof(arm_context_t, ss.ss_32.r[4]));
	168	DECLARE("SS32_W6", offsetof(arm_context_t, ss.ss_32.r[6]));
	169	DECLARE("SS32_W8", offsetof(arm_context_t, ss.ss_32.r[8]));
	170	DECLARE("SS32_W10", offsetof(arm_context_t, ss.ss_32.r[10]));
	171	DECLARE("SS32_W12", offsetof(arm_context_t, ss.ss_32.r[12]));
	172	DECLARE("SS32_SP", offsetof(arm_context_t, ss.ss_32.sp));
	173	DECLARE("SS32_LR", offsetof(arm_context_t, ss.ss_32.lr));
	174	DECLARE("SS32_PC", offsetof(arm_context_t, ss.ss_32.pc));
	175	DECLARE("SS32_CPSR", offsetof(arm_context_t, ss.ss_32.cpsr));
	176	DECLARE("SS32_VADDR", offsetof(arm_context_t, ss.ss_32.far));
	177	DECLARE("SS32_STATUS", offsetof(arm_context_t, ss.ss_32.esr));
	178
	179	DECLARE("SS64_X0", offsetof(arm_context_t, ss.ss_64.x[0]));
	180	DECLARE("SS64_X2", offsetof(arm_context_t, ss.ss_64.x[2]));
	181	DECLARE("SS64_X4", offsetof(arm_context_t, ss.ss_64.x[4]));
	182	DECLARE("SS64_X6", offsetof(arm_context_t, ss.ss_64.x[6]));
	183	DECLARE("SS64_X8", offsetof(arm_context_t, ss.ss_64.x[8]));
	184	DECLARE("SS64_X10", offsetof(arm_context_t, ss.ss_64.x[10]));
	185	DECLARE("SS64_X12", offsetof(arm_context_t, ss.ss_64.x[12]));
	186	DECLARE("SS64_X14", offsetof(arm_context_t, ss.ss_64.x[14]));
	187	DECLARE("SS64_X16", offsetof(arm_context_t, ss.ss_64.x[16]));
	188	DECLARE("SS64_X18", offsetof(arm_context_t, ss.ss_64.x[18]));
	189	DECLARE("SS64_X19", offsetof(arm_context_t, ss.ss_64.x[19]));
	190	DECLARE("SS64_X20", offsetof(arm_context_t, ss.ss_64.x[20]));
	191	DECLARE("SS64_X21", offsetof(arm_context_t, ss.ss_64.x[21]));
	192	DECLARE("SS64_X22", offsetof(arm_context_t, ss.ss_64.x[22]));
	193	DECLARE("SS64_X23", offsetof(arm_context_t, ss.ss_64.x[23]));
	194	DECLARE("SS64_X24", offsetof(arm_context_t, ss.ss_64.x[24]));
	195	DECLARE("SS64_X25", offsetof(arm_context_t, ss.ss_64.x[25]));
	196	DECLARE("SS64_X26", offsetof(arm_context_t, ss.ss_64.x[26]));
	197	DECLARE("SS64_X27", offsetof(arm_context_t, ss.ss_64.x[27]));
	198	DECLARE("SS64_X28", offsetof(arm_context_t, ss.ss_64.x[28]));
	199	DECLARE("SS64_FP", offsetof(arm_context_t, ss.ss_64.fp));
	200	DECLARE("SS64_LR", offsetof(arm_context_t, ss.ss_64.lr));
	201	DECLARE("SS64_SP", offsetof(arm_context_t, ss.ss_64.sp));
	202	DECLARE("SS64_PC", offsetof(arm_context_t, ss.ss_64.pc));
	203	DECLARE("SS64_CPSR", offsetof(arm_context_t, ss.ss_64.cpsr));
	204	DECLARE("SS64_FAR", offsetof(arm_context_t, ss.ss_64.far));
	205	DECLARE("SS64_ESR", offsetof(arm_context_t, ss.ss_64.esr));
	206
	207	DECLARE("CONTEXT_NS", offsetof(arm_context_t, ns));
	208	DECLARE("NS_FLAVOR", offsetof(arm_context_t, ns.nsh.flavor));
	209	DECLARE("NS_COUNT", offsetof(arm_context_t, ns.nsh.count));
	210	DECLARE("ARM_NEON_SAVED_STATE32", ARM_NEON_SAVED_STATE32);
	211	DECLARE("ARM_NEON_SAVED_STATE64", ARM_NEON_SAVED_STATE64);
	212	DECLARE("ARM_NEON_SAVED_STATE64_COUNT", ARM_NEON_SAVED_STATE64_COUNT);
	213
	214	DECLARE("NS32_Q0", offsetof(arm_context_t, ns.ns_32.v.q[0]));
	215	DECLARE("NS32_Q2", offsetof(arm_context_t, ns.ns_32.v.q[2]));
	216	DECLARE("NS32_Q4", offsetof(arm_context_t, ns.ns_32.v.q[4]));
	217	DECLARE("NS32_Q6", offsetof(arm_context_t, ns.ns_32.v.q[6]));
	218	DECLARE("NS32_Q8", offsetof(arm_context_t, ns.ns_32.v.q[8]));
	219	DECLARE("NS32_Q10", offsetof(arm_context_t, ns.ns_32.v.q[10]));
220	DECLARE("NS32_Q12", offsetof(arm_context_t, ns.ns_32.v.q[12]));
221	DECLARE("NS32_Q14", offsetof(arm_context_t, ns.ns_32.v.q[14]));
222	DECLARE("NS32_FPSR", offsetof(arm_context_t, ns.ns_32.fpsr));
223	DECLARE("NS32_FPCR", offsetof(arm_context_t, ns.ns_32.fpcr));
224
225	DECLARE("NS64_D8", offsetof(arm_context_t, ns.ns_64.v.d[8]));
226	DECLARE("NS64_D9", offsetof(arm_context_t, ns.ns_64.v.d[9]));
227	DECLARE("NS64_D10", offsetof(arm_context_t, ns.ns_64.v.d[10]));
228	DECLARE("NS64_D11", offsetof(arm_context_t, ns.ns_64.v.d[11]));
229	DECLARE("NS64_D12", offsetof(arm_context_t, ns.ns_64.v.d[12]));
230	DECLARE("NS64_D13", offsetof(arm_context_t, ns.ns_64.v.d[13]));
231	DECLARE("NS64_D14", offsetof(arm_context_t, ns.ns_64.v.d[14]));
232	DECLARE("NS64_D15", offsetof(arm_context_t, ns.ns_64.v.d[15]));
233
234	DECLARE("NS64_Q0", offsetof(arm_context_t, ns.ns_64.v.q[0]));
235	DECLARE("NS64_Q2", offsetof(arm_context_t, ns.ns_64.v.q[2]));
236	DECLARE("NS64_Q4", offsetof(arm_context_t, ns.ns_64.v.q[4]));
237	DECLARE("NS64_Q6", offsetof(arm_context_t, ns.ns_64.v.q[6]));
238	DECLARE("NS64_Q8", offsetof(arm_context_t, ns.ns_64.v.q[8]));
239	DECLARE("NS64_Q10", offsetof(arm_context_t, ns.ns_64.v.q[10]));
240	DECLARE("NS64_Q12", offsetof(arm_context_t, ns.ns_64.v.q[12]));
241	DECLARE("NS64_Q14", offsetof(arm_context_t, ns.ns_64.v.q[14]));
242	DECLARE("NS64_Q16", offsetof(arm_context_t, ns.ns_64.v.q[16]));
243	DECLARE("NS64_Q18", offsetof(arm_context_t, ns.ns_64.v.q[18]));
244	DECLARE("NS64_Q20", offsetof(arm_context_t, ns.ns_64.v.q[20]));
245	DECLARE("NS64_Q22", offsetof(arm_context_t, ns.ns_64.v.q[22]));
246	DECLARE("NS64_Q24", offsetof(arm_context_t, ns.ns_64.v.q[24]));
247	DECLARE("NS64_Q26", offsetof(arm_context_t, ns.ns_64.v.q[26]));
248	DECLARE("NS64_Q28", offsetof(arm_context_t, ns.ns_64.v.q[28]));
249	DECLARE("NS64_Q30", offsetof(arm_context_t, ns.ns_64.v.q[30]));
250	DECLARE("NS64_FPSR", offsetof(arm_context_t, ns.ns_64.fpsr));
251	DECLARE("NS64_FPCR", offsetof(arm_context_t, ns.ns_64.fpcr));
252
253	DECLARE("PGBYTES", ARM_PGBYTES);
254	DECLARE("PGSHIFT", ARM_PGSHIFT);
255	DECLARE("PGMASK", ARM_PGMASK);
256
0a7de745 A	257	DECLARE("VM_MIN_ADDRESS", VM_MIN_ADDRESS);
	258	DECLARE("VM_MAX_ADDRESS", VM_MAX_ADDRESS);
	259	DECLARE("VM_MIN_KERNEL_ADDRESS", VM_MIN_KERNEL_ADDRESS);
	260	DECLARE("VM_MAX_KERNEL_ADDRESS", VM_MAX_KERNEL_ADDRESS);
	261	DECLARE("KERNELBASE", VM_MIN_KERNEL_ADDRESS);
	262	DECLARE("KERNEL_STACK_SIZE", KERNEL_STACK_SIZE);
	263	DECLARE("TBI_MASK", TBI_MASK);
5ba3f43e	264
0a7de745	265	DECLARE("KERN_INVALID_ADDRESS", KERN_INVALID_ADDRESS);
5ba3f43e A	266
5ba3f43e A	267
0a7de745	268	DECLARE("MAX_CPUS", MAX_CPUS);
5ba3f43e A	269
5ba3f43e A	270	DECLARE("cdeSize",
0a7de745	271	sizeof(struct cpu_data_entry));
5ba3f43e A	272
5ba3f43e A	273	DECLARE("cdSize",
0a7de745 A	274	sizeof(struct cpu_data));
	275
	276	DECLARE("CPU_ACTIVE_THREAD",
	277	offsetof(cpu_data_t, cpu_active_thread));
	278	DECLARE("CPU_ACTIVE_STACK",
	279	offsetof(cpu_data_t, cpu_active_stack));
	280	DECLARE("CPU_ISTACKPTR",
	281	offsetof(cpu_data_t, istackptr));
	282	DECLARE("CPU_INTSTACK_TOP",
	283	offsetof(cpu_data_t, intstack_top));
	284	DECLARE("CPU_EXCEPSTACKPTR",
	285	offsetof(cpu_data_t, excepstackptr));
	286	DECLARE("CPU_EXCEPSTACK_TOP",
	287	offsetof(cpu_data_t, excepstack_top));
5c9f4661 A	288	#if __ARM_KERNEL_PROTECT__
5c9f4661 A	289	DECLARE("CPU_EXC_VECTORS",
0a7de745	290	offsetof(cpu_data_t, cpu_exc_vectors));
5c9f4661	291	#endif /* __ARM_KERNEL_PROTECT__ */
0a7de745 A	292	DECLARE("CPU_NUMBER_GS",
	293	offsetof(cpu_data_t, cpu_number));
	294	DECLARE("CPU_IDENT",
	295	offsetof(cpu_data_t, cpu_ident));
	296	DECLARE("CPU_RUNNING",
	297	offsetof(cpu_data_t, cpu_running));
	298	DECLARE("CPU_MCOUNT_OFF",
	299	offsetof(cpu_data_t, cpu_mcount_off));
5ba3f43e	300	DECLARE("CPU_PENDING_AST",
0a7de745	301	offsetof(cpu_data_t, cpu_pending_ast));
5ba3f43e	302	DECLARE("CPU_PROCESSOR",
0a7de745	303	offsetof(cpu_data_t, cpu_processor));
5ba3f43e	304	DECLARE("CPU_CACHE_DISPATCH",
0a7de745 A	305	offsetof(cpu_data_t, cpu_cache_dispatch));
	306	DECLARE("CPU_BASE_TIMEBASE",
	307	offsetof(cpu_data_t, cpu_base_timebase));
5ba3f43e	308	DECLARE("CPU_DECREMENTER",
0a7de745	309	offsetof(cpu_data_t, cpu_decrementer));
5ba3f43e	310	DECLARE("CPU_GET_DECREMENTER_FUNC",
0a7de745	311	offsetof(cpu_data_t, cpu_get_decrementer_func));
5ba3f43e	312	DECLARE("CPU_SET_DECREMENTER_FUNC",
0a7de745	313	offsetof(cpu_data_t, cpu_set_decrementer_func));
5ba3f43e	314	DECLARE("CPU_GET_FIQ_HANDLER",
0a7de745	315	offsetof(cpu_data_t, cpu_get_fiq_handler));
5ba3f43e	316	DECLARE("CPU_TBD_HARDWARE_ADDR",
0a7de745	317	offsetof(cpu_data_t, cpu_tbd_hardware_addr));
5ba3f43e	318	DECLARE("CPU_TBD_HARDWARE_VAL",
0a7de745	319	offsetof(cpu_data_t, cpu_tbd_hardware_val));
5ba3f43e	320	DECLARE("CPU_INT_STATE",
0a7de745	321	offsetof(cpu_data_t, cpu_int_state));
5ba3f43e	322	DECLARE("INTERRUPT_HANDLER",
0a7de745	323	offsetof(cpu_data_t, interrupt_handler));
5ba3f43e	324	DECLARE("INTERRUPT_TARGET",
0a7de745	325	offsetof(cpu_data_t, interrupt_target));
5ba3f43e	326	DECLARE("INTERRUPT_REFCON",
0a7de745	327	offsetof(cpu_data_t, interrupt_refCon));
5ba3f43e	328	DECLARE("INTERRUPT_NUB",
0a7de745	329	offsetof(cpu_data_t, interrupt_nub));
5ba3f43e	330	DECLARE("INTERRUPT_SOURCE",
0a7de745	331	offsetof(cpu_data_t, interrupt_source));
5ba3f43e	332	DECLARE("CPU_USER_DEBUG",
0a7de745	333	offsetof(cpu_data_t, cpu_user_debug));
5ba3f43e	334	DECLARE("CPU_STAT_IRQ",
0a7de745	335	offsetof(cpu_data_t, cpu_stat.irq_ex_cnt));
5ba3f43e	336	DECLARE("CPU_STAT_IRQ_WAKE",
0a7de745	337	offsetof(cpu_data_t, cpu_stat.irq_ex_cnt_wake));
5ba3f43e	338	DECLARE("CPU_RESET_HANDLER",
0a7de745	339	offsetof(cpu_data_t, cpu_reset_handler));
5ba3f43e	340	DECLARE("CPU_RESET_ASSIST",
0a7de745	341	offsetof(cpu_data_t, cpu_reset_assist));
5ba3f43e	342	DECLARE("CPU_REGMAP_PADDR",
0a7de745	343	offsetof(cpu_data_t, cpu_regmap_paddr));
5ba3f43e	344	DECLARE("CPU_PHYS_ID",
0a7de745	345	offsetof(cpu_data_t, cpu_phys_id));
5ba3f43e	346	DECLARE("RTCLOCK_DATAP",
0a7de745	347	offsetof(cpu_data_t, rtclock_datap));
d9a64523	348	DECLARE("CLUSTER_MASTER",
0a7de745	349	offsetof(cpu_data_t, cluster_master));
5ba3f43e A	350
5ba3f43e A	351	DECLARE("RTCLOCKDataSize",
0a7de745	352	sizeof(rtclock_data_t));
5ba3f43e	353	DECLARE("RTCLOCK_ADJ_ABSTIME_LOW",
0a7de745	354	offsetof(rtclock_data_t, rtc_adj.abstime_val.low));
5ba3f43e	355	DECLARE("RTCLOCK_ADJ_ABSTIME_HIGH",
0a7de745	356	offsetof(rtclock_data_t, rtc_adj.abstime_val.high));
5ba3f43e	357	DECLARE("RTCLOCK_BASE_ABSTIME_LOW",
0a7de745	358	offsetof(rtclock_data_t, rtc_base.abstime_val.low));
5ba3f43e	359	DECLARE("RTCLOCK_BASE_ABSTIME_HIGH",
0a7de745	360	offsetof(rtclock_data_t, rtc_base.abstime_val.high));
5ba3f43e	361
0a7de745	362	DECLARE("SIGPdec", SIGPdec);
5ba3f43e A	363
5ba3f43e A	364	DECLARE("rhdSize",
0a7de745	365	sizeof(struct reset_handler_data));
5ba3f43e A	366	#if WITH_CLASSIC_S2R \|\| !__arm64__
5ba3f43e A	367	DECLARE("stSize",
0a7de745	368	sizeof(SleepToken));
5ba3f43e A	369	#endif
5ba3f43e A	370
0a7de745 A	371	DECLARE("CPU_DATA_ENTRIES", offsetof(struct reset_handler_data, cpu_data_entries));
0a7de745 A	372	DECLARE("ASSIST_RESET_HANDLER", offsetof(struct reset_handler_data, assist_reset_handler));
5ba3f43e	373
0a7de745	374	DECLARE("CPU_DATA_PADDR", offsetof(struct cpu_data_entry, cpu_data_paddr));
5ba3f43e	375
0a7de745 A	376	DECLARE("INTSTACK_SIZE", INTSTACK_SIZE);
0a7de745 A	377	DECLARE("EXCEPSTACK_SIZE", EXCEPSTACK_SIZE);
d9a64523	378
0a7de745	379	DECLARE("PAGE_MAX_SIZE", PAGE_MAX_SIZE);
5ba3f43e A	380
5ba3f43e A	381	DECLARE("TIMER_TSTAMP",
0a7de745	382	offsetof(struct timer, tstamp));
5ba3f43e	383	DECLARE("THREAD_TIMER",
0a7de745	384	offsetof(struct processor, processor_data.thread_timer));
5ba3f43e	385	DECLARE("KERNEL_TIMER",
0a7de745	386	offsetof(struct processor, processor_data.kernel_timer));
5ba3f43e	387	DECLARE("SYSTEM_STATE",
0a7de745	388	offsetof(struct processor, processor_data.system_state));
5ba3f43e	389	DECLARE("USER_STATE",
0a7de745	390	offsetof(struct processor, processor_data.user_state));
5ba3f43e	391	DECLARE("CURRENT_STATE",
0a7de745	392	offsetof(struct processor, processor_data.current_state));
5ba3f43e A	393
5ba3f43e A	394	DECLARE("SYSTEM_TIMER",
0a7de745	395	offsetof(struct thread, system_timer));
5ba3f43e	396	DECLARE("USER_TIMER",
0a7de745	397	offsetof(struct thread, user_timer));
5ba3f43e A	398
	399	#if !CONFIG_SKIP_PRECISE_USER_KERNEL_TIME
	400	DECLARE("PRECISE_USER_KERNEL_TIME",
0a7de745	401	offsetof(struct thread, precise_user_kernel_time));
5ba3f43e A	402	#endif
	403
	404	DECLARE("BA_VIRT_BASE",
0a7de745	405	offsetof(struct boot_args, virtBase));
5ba3f43e	406	DECLARE("BA_PHYS_BASE",
0a7de745	407	offsetof(struct boot_args, physBase));
5ba3f43e	408	DECLARE("BA_MEM_SIZE",
0a7de745	409	offsetof(struct boot_args, memSize));
5ba3f43e	410	DECLARE("BA_TOP_OF_KERNEL_DATA",
0a7de745	411	offsetof(struct boot_args, topOfKernelData));
5ba3f43e	412	DECLARE("BA_DEVICE_TREE",
0a7de745	413	offsetof(struct boot_args, deviceTreeP));
5ba3f43e	414	DECLARE("BA_DEVICE_TREE_LENGTH",
0a7de745	415	offsetof(struct boot_args, deviceTreeLength));
d9a64523	416	DECLARE("BA_BOOT_FLAGS",
0a7de745	417	offsetof(struct boot_args, bootFlags));
5ba3f43e A	418
5ba3f43e A	419	DECLARE("ENTROPY_INDEX_PTR",
0a7de745	420	offsetof(entropy_data_t, index_ptr));
5ba3f43e	421	DECLARE("ENTROPY_BUFFER",
0a7de745	422	offsetof(entropy_data_t, buffer));
5ba3f43e A	423	DECLARE("ENTROPY_DATA_SIZE", sizeof(struct entropy_data));
	424
	425	DECLARE("SR_RESTORE_TCR_EL1", offsetof(struct sysreg_restore, tcr_el1));
	426
	427
d9a64523	428
0a7de745	429	return 0;
5ba3f43e	430	}