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1/*
2 * Copyright (c) 2007 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56
57#include <stddef.h>
58
59#include <mach_ldebug.h>
60
61/*
62 * Pass field offsets to assembly code.
63 */
64#include <kern/ast.h>
65#include <kern/thread.h>
66#include <kern/task.h>
67#include <kern/locks.h>
68#include <ipc/ipc_space.h>
69#include <ipc/ipc_port.h>
70#include <ipc/ipc_pset.h>
71#include <kern/host.h>
72#include <kern/misc_protos.h>
73#include <kern/syscall_sw.h>
74#include <arm/thread.h>
75#include <mach/arm/vm_param.h>
76#include <arm/misc_protos.h>
77#include <arm/pmap.h>
78#include <arm/trap.h>
79#include <arm/cpu_data_internal.h>
80#include <arm/cpu_capabilities.h>
81#include <arm/cpu_internal.h>
82#include <arm/rtclock.h>
83#include <machine/commpage.h>
84#include <vm/vm_map.h>
85#include <pexpert/arm64/boot.h>
86#include <arm64/proc_reg.h>
87#include <prng/random.h>
88
89#if CONFIG_DTRACE
90#define NEED_DTRACE_DEFS
91#include <../bsd/sys/lockstat.h>
92#endif /* CONFIG_DTRACE */
93
94/*
95 * genassym.c is used to produce an
96 * assembly file which, intermingled with unuseful assembly code,
97 * has all the necessary definitions emitted. This assembly file is
98 * then postprocessed with sed to extract only these definitions
99 * and thus the final assyms.s is created.
100 *
101 * This convoluted means is necessary since the structure alignment
102 * and packing may be different between the host machine and the
103 * target so we are forced into using the cross compiler to generate
104 * the values, but we cannot run anything on the target machine.
105 */
106
107#define DECLARE(SYM,VAL) \
108 __asm("DEFINITION__define__" SYM ":\t .ascii \"%0\"" : : "n" ((u_long)(VAL)))
109
110
111int main(
112 int argc,
113 char ** argv);
114
115int
116main(
117 int argc,
118 char **argv)
119{
120
121 DECLARE("T_PREFETCH_ABT", T_PREFETCH_ABT);
122 DECLARE("T_DATA_ABT", T_DATA_ABT);
123
124 DECLARE("AST_URGENT", AST_URGENT);
125 DECLARE("AST_PREEMPTION", AST_PREEMPTION);
126
127 DECLARE("TH_RECOVER", offsetof(struct thread, recover));
128 DECLARE("TH_CONTINUATION", offsetof(struct thread, continuation));
129 DECLARE("TH_KERNEL_STACK", offsetof(struct thread, kernel_stack));
130 DECLARE("TH_KSTACKPTR", offsetof(struct thread, machine.kstackptr));
131 DECLARE("THREAD_UTHREAD", offsetof(struct thread, uthread));
132
133 DECLARE("TASK_MACH_EXC_PORT",
134 offsetof(struct task, exc_actions[EXC_MACH_SYSCALL].port));
135
136 /* These fields are being added on demand */
137 DECLARE("ACT_TASK", offsetof(struct thread, task));
138 DECLARE("ACT_CONTEXT", offsetof(struct thread, machine.contextData));
139 DECLARE("ACT_UPCB", offsetof(struct thread, machine.upcb));
140// DECLARE("ACT_PCBDATA", offsetof(struct thread, machine.contextData.ss));
141 DECLARE("ACT_UNEON", offsetof(struct thread, machine.uNeon));
142// DECLARE("ACT_NEONDATA", offsetof(struct thread, machine.contextData.ns));
143 DECLARE("TH_CTH_SELF", offsetof(struct thread, machine.cthread_self));
144 DECLARE("TH_CTH_DATA", offsetof(struct thread, machine.cthread_data));
145 DECLARE("ACT_PREEMPT_CNT", offsetof(struct thread, machine.preemption_count));
146 DECLARE("ACT_CPUDATAP", offsetof(struct thread, machine.CpuDatap));
147 DECLARE("ACT_MAP", offsetof(struct thread, map));
148 DECLARE("ACT_DEBUGDATA", offsetof(struct thread, machine.DebugData));
149 DECLARE("TH_IOTIER_OVERRIDE", offsetof(struct thread, iotier_override));
150 DECLARE("TH_RWLOCK_CNT", offsetof(struct thread, rwlock_count));
151 DECLARE("TH_SCHED_FLAGS", offsetof(struct thread, sched_flags));
152 DECLARE("TH_SFLAG_RW_PROMOTED_BIT", TH_SFLAG_RW_PROMOTED_BIT);
153
154 DECLARE("TH_MACH_SYSCALLS", offsetof(struct thread, syscalls_mach));
155 DECLARE("TH_UNIX_SYSCALLS", offsetof(struct thread, syscalls_unix));
156 DECLARE("TASK_BSD_INFO", offsetof(struct task, bsd_info));
157
158 DECLARE("MACH_TRAP_TABLE_COUNT", MACH_TRAP_TABLE_COUNT);
159 DECLARE("MACH_TRAP_TABLE_ENTRY_SIZE", sizeof(mach_trap_t));
160
161 DECLARE("MAP_PMAP", offsetof(struct _vm_map, pmap));
162
163 DECLARE("ARM_CONTEXT_SIZE", sizeof(arm_context_t));
164
165 DECLARE("CONTEXT_SS", offsetof(arm_context_t, ss));
166 DECLARE("SS_FLAVOR", offsetof(arm_context_t, ss.ash.flavor));
167 DECLARE("ARM_SAVED_STATE32", ARM_SAVED_STATE32);
168 DECLARE("ARM_SAVED_STATE64", ARM_SAVED_STATE64);
169 DECLARE("ARM_SAVED_STATE64_COUNT", ARM_SAVED_STATE64_COUNT);
170
171 DECLARE("SS32_W0", offsetof(arm_context_t, ss.ss_32.r[0]));
172 DECLARE("SS32_W2", offsetof(arm_context_t, ss.ss_32.r[2]));
173 DECLARE("SS32_W4", offsetof(arm_context_t, ss.ss_32.r[4]));
174 DECLARE("SS32_W6", offsetof(arm_context_t, ss.ss_32.r[6]));
175 DECLARE("SS32_W8", offsetof(arm_context_t, ss.ss_32.r[8]));
176 DECLARE("SS32_W10", offsetof(arm_context_t, ss.ss_32.r[10]));
177 DECLARE("SS32_W12", offsetof(arm_context_t, ss.ss_32.r[12]));
178 DECLARE("SS32_SP", offsetof(arm_context_t, ss.ss_32.sp));
179 DECLARE("SS32_LR", offsetof(arm_context_t, ss.ss_32.lr));
180 DECLARE("SS32_PC", offsetof(arm_context_t, ss.ss_32.pc));
181 DECLARE("SS32_CPSR", offsetof(arm_context_t, ss.ss_32.cpsr));
182 DECLARE("SS32_VADDR", offsetof(arm_context_t, ss.ss_32.far));
183 DECLARE("SS32_STATUS", offsetof(arm_context_t, ss.ss_32.esr));
184
185 DECLARE("SS64_X0", offsetof(arm_context_t, ss.ss_64.x[0]));
186 DECLARE("SS64_X2", offsetof(arm_context_t, ss.ss_64.x[2]));
187 DECLARE("SS64_X4", offsetof(arm_context_t, ss.ss_64.x[4]));
188 DECLARE("SS64_X6", offsetof(arm_context_t, ss.ss_64.x[6]));
189 DECLARE("SS64_X8", offsetof(arm_context_t, ss.ss_64.x[8]));
190 DECLARE("SS64_X10", offsetof(arm_context_t, ss.ss_64.x[10]));
191 DECLARE("SS64_X12", offsetof(arm_context_t, ss.ss_64.x[12]));
192 DECLARE("SS64_X14", offsetof(arm_context_t, ss.ss_64.x[14]));
193 DECLARE("SS64_X16", offsetof(arm_context_t, ss.ss_64.x[16]));
194 DECLARE("SS64_X18", offsetof(arm_context_t, ss.ss_64.x[18]));
195 DECLARE("SS64_X19", offsetof(arm_context_t, ss.ss_64.x[19]));
196 DECLARE("SS64_X20", offsetof(arm_context_t, ss.ss_64.x[20]));
197 DECLARE("SS64_X21", offsetof(arm_context_t, ss.ss_64.x[21]));
198 DECLARE("SS64_X22", offsetof(arm_context_t, ss.ss_64.x[22]));
199 DECLARE("SS64_X23", offsetof(arm_context_t, ss.ss_64.x[23]));
200 DECLARE("SS64_X24", offsetof(arm_context_t, ss.ss_64.x[24]));
201 DECLARE("SS64_X25", offsetof(arm_context_t, ss.ss_64.x[25]));
202 DECLARE("SS64_X26", offsetof(arm_context_t, ss.ss_64.x[26]));
203 DECLARE("SS64_X27", offsetof(arm_context_t, ss.ss_64.x[27]));
204 DECLARE("SS64_X28", offsetof(arm_context_t, ss.ss_64.x[28]));
205 DECLARE("SS64_FP", offsetof(arm_context_t, ss.ss_64.fp));
206 DECLARE("SS64_LR", offsetof(arm_context_t, ss.ss_64.lr));
207 DECLARE("SS64_SP", offsetof(arm_context_t, ss.ss_64.sp));
208 DECLARE("SS64_PC", offsetof(arm_context_t, ss.ss_64.pc));
209 DECLARE("SS64_CPSR", offsetof(arm_context_t, ss.ss_64.cpsr));
210 DECLARE("SS64_FAR", offsetof(arm_context_t, ss.ss_64.far));
211 DECLARE("SS64_ESR", offsetof(arm_context_t, ss.ss_64.esr));
212
213 DECLARE("CONTEXT_NS", offsetof(arm_context_t, ns));
214 DECLARE("NS_FLAVOR", offsetof(arm_context_t, ns.nsh.flavor));
215 DECLARE("NS_COUNT", offsetof(arm_context_t, ns.nsh.count));
216 DECLARE("ARM_NEON_SAVED_STATE32", ARM_NEON_SAVED_STATE32);
217 DECLARE("ARM_NEON_SAVED_STATE64", ARM_NEON_SAVED_STATE64);
218 DECLARE("ARM_NEON_SAVED_STATE64_COUNT", ARM_NEON_SAVED_STATE64_COUNT);
219
220 DECLARE("NS32_Q0", offsetof(arm_context_t, ns.ns_32.v.q[0]));
221 DECLARE("NS32_Q2", offsetof(arm_context_t, ns.ns_32.v.q[2]));
222 DECLARE("NS32_Q4", offsetof(arm_context_t, ns.ns_32.v.q[4]));
223 DECLARE("NS32_Q6", offsetof(arm_context_t, ns.ns_32.v.q[6]));
224 DECLARE("NS32_Q8", offsetof(arm_context_t, ns.ns_32.v.q[8]));
225 DECLARE("NS32_Q10", offsetof(arm_context_t, ns.ns_32.v.q[10]));
226 DECLARE("NS32_Q12", offsetof(arm_context_t, ns.ns_32.v.q[12]));
227 DECLARE("NS32_Q14", offsetof(arm_context_t, ns.ns_32.v.q[14]));
228 DECLARE("NS32_FPSR", offsetof(arm_context_t, ns.ns_32.fpsr));
229 DECLARE("NS32_FPCR", offsetof(arm_context_t, ns.ns_32.fpcr));
230
231 DECLARE("NS64_D8", offsetof(arm_context_t, ns.ns_64.v.d[8]));
232 DECLARE("NS64_D9", offsetof(arm_context_t, ns.ns_64.v.d[9]));
233 DECLARE("NS64_D10", offsetof(arm_context_t, ns.ns_64.v.d[10]));
234 DECLARE("NS64_D11", offsetof(arm_context_t, ns.ns_64.v.d[11]));
235 DECLARE("NS64_D12", offsetof(arm_context_t, ns.ns_64.v.d[12]));
236 DECLARE("NS64_D13", offsetof(arm_context_t, ns.ns_64.v.d[13]));
237 DECLARE("NS64_D14", offsetof(arm_context_t, ns.ns_64.v.d[14]));
238 DECLARE("NS64_D15", offsetof(arm_context_t, ns.ns_64.v.d[15]));
239
240 DECLARE("NS64_Q0", offsetof(arm_context_t, ns.ns_64.v.q[0]));
241 DECLARE("NS64_Q2", offsetof(arm_context_t, ns.ns_64.v.q[2]));
242 DECLARE("NS64_Q4", offsetof(arm_context_t, ns.ns_64.v.q[4]));
243 DECLARE("NS64_Q6", offsetof(arm_context_t, ns.ns_64.v.q[6]));
244 DECLARE("NS64_Q8", offsetof(arm_context_t, ns.ns_64.v.q[8]));
245 DECLARE("NS64_Q10", offsetof(arm_context_t, ns.ns_64.v.q[10]));
246 DECLARE("NS64_Q12", offsetof(arm_context_t, ns.ns_64.v.q[12]));
247 DECLARE("NS64_Q14", offsetof(arm_context_t, ns.ns_64.v.q[14]));
248 DECLARE("NS64_Q16", offsetof(arm_context_t, ns.ns_64.v.q[16]));
249 DECLARE("NS64_Q18", offsetof(arm_context_t, ns.ns_64.v.q[18]));
250 DECLARE("NS64_Q20", offsetof(arm_context_t, ns.ns_64.v.q[20]));
251 DECLARE("NS64_Q22", offsetof(arm_context_t, ns.ns_64.v.q[22]));
252 DECLARE("NS64_Q24", offsetof(arm_context_t, ns.ns_64.v.q[24]));
253 DECLARE("NS64_Q26", offsetof(arm_context_t, ns.ns_64.v.q[26]));
254 DECLARE("NS64_Q28", offsetof(arm_context_t, ns.ns_64.v.q[28]));
255 DECLARE("NS64_Q30", offsetof(arm_context_t, ns.ns_64.v.q[30]));
256 DECLARE("NS64_FPSR", offsetof(arm_context_t, ns.ns_64.fpsr));
257 DECLARE("NS64_FPCR", offsetof(arm_context_t, ns.ns_64.fpcr));
258
259 DECLARE("PGBYTES", ARM_PGBYTES);
260 DECLARE("PGSHIFT", ARM_PGSHIFT);
261 DECLARE("PGMASK", ARM_PGMASK);
262
263
264 DECLARE("VM_MIN_ADDRESS", VM_MIN_ADDRESS);
265 DECLARE("VM_MAX_ADDRESS", VM_MAX_ADDRESS);
266 DECLARE("VM_MIN_KERNEL_ADDRESS", VM_MIN_KERNEL_ADDRESS);
267 DECLARE("VM_MAX_KERNEL_ADDRESS", VM_MAX_KERNEL_ADDRESS);
268 DECLARE("KERNELBASE", VM_MIN_KERNEL_ADDRESS);
269 DECLARE("KERNEL_STACK_SIZE", KERNEL_STACK_SIZE);
270 DECLARE("TBI_MASK", TBI_MASK);
271
272 DECLARE("KERN_INVALID_ADDRESS", KERN_INVALID_ADDRESS);
273
274
275 DECLARE("MAX_CPUS", MAX_CPUS);
276
277 DECLARE("cdeSize",
278 sizeof(struct cpu_data_entry));
279
280 DECLARE("cdSize",
281 sizeof(struct cpu_data));
282
283 DECLARE("CPU_ACTIVE_THREAD",
284 offsetof(cpu_data_t, cpu_active_thread));
285 DECLARE("CPU_ACTIVE_STACK",
286 offsetof(cpu_data_t, cpu_active_stack));
287 DECLARE("CPU_ISTACKPTR",
288 offsetof(cpu_data_t, istackptr));
289 DECLARE("CPU_INTSTACK_TOP",
290 offsetof(cpu_data_t, intstack_top));
291 DECLARE("CPU_EXCEPSTACKPTR",
292 offsetof(cpu_data_t, excepstackptr));
293 DECLARE("CPU_EXCEPSTACK_TOP",
294 offsetof(cpu_data_t, excepstack_top));
295 DECLARE("CPU_FIQSTACKPTR",
296 offsetof(cpu_data_t, fiqstackptr));
297 DECLARE("CPU_FIQSTACK_TOP",
298 offsetof(cpu_data_t, fiqstack_top));
299 DECLARE("CPU_NUMBER_GS",
300 offsetof(cpu_data_t,cpu_number));
301 DECLARE("CPU_IDENT",
302 offsetof(cpu_data_t,cpu_ident));
303 DECLARE("CPU_RUNNING",
304 offsetof(cpu_data_t,cpu_running));
305 DECLARE("CPU_MCOUNT_OFF",
306 offsetof(cpu_data_t,cpu_mcount_off));
307 DECLARE("CPU_PENDING_AST",
308 offsetof(cpu_data_t,cpu_pending_ast));
309 DECLARE("CPU_PROCESSOR",
310 offsetof(cpu_data_t,cpu_processor));
311 DECLARE("CPU_CACHE_DISPATCH",
312 offsetof(cpu_data_t,cpu_cache_dispatch));
313 DECLARE("CPU_BASE_TIMEBASE",
314 offsetof(cpu_data_t,cpu_base_timebase));
315 DECLARE("CPU_DECREMENTER",
316 offsetof(cpu_data_t,cpu_decrementer));
317 DECLARE("CPU_GET_DECREMENTER_FUNC",
318 offsetof(cpu_data_t,cpu_get_decrementer_func));
319 DECLARE("CPU_SET_DECREMENTER_FUNC",
320 offsetof(cpu_data_t,cpu_set_decrementer_func));
321 DECLARE("CPU_GET_FIQ_HANDLER",
322 offsetof(cpu_data_t,cpu_get_fiq_handler));
323 DECLARE("CPU_TBD_HARDWARE_ADDR",
324 offsetof(cpu_data_t,cpu_tbd_hardware_addr));
325 DECLARE("CPU_TBD_HARDWARE_VAL",
326 offsetof(cpu_data_t,cpu_tbd_hardware_val));
327 DECLARE("CPU_INT_STATE",
328 offsetof(cpu_data_t,cpu_int_state));
329 DECLARE("INTERRUPT_HANDLER",
330 offsetof(cpu_data_t,interrupt_handler));
331 DECLARE("INTERRUPT_TARGET",
332 offsetof(cpu_data_t,interrupt_target));
333 DECLARE("INTERRUPT_REFCON",
334 offsetof(cpu_data_t,interrupt_refCon));
335 DECLARE("INTERRUPT_NUB",
336 offsetof(cpu_data_t,interrupt_nub));
337 DECLARE("INTERRUPT_SOURCE",
338 offsetof(cpu_data_t,interrupt_source));
339 DECLARE("CPU_USER_DEBUG",
340 offsetof(cpu_data_t, cpu_user_debug));
341 DECLARE("CPU_STAT_IRQ",
342 offsetof(cpu_data_t, cpu_stat.irq_ex_cnt));
343 DECLARE("CPU_STAT_IRQ_WAKE",
344 offsetof(cpu_data_t, cpu_stat.irq_ex_cnt_wake));
345 DECLARE("CPU_RESET_HANDLER",
346 offsetof(cpu_data_t, cpu_reset_handler));
347 DECLARE("CPU_RESET_ASSIST",
348 offsetof(cpu_data_t, cpu_reset_assist));
349 DECLARE("CPU_REGMAP_PADDR",
350 offsetof(cpu_data_t, cpu_regmap_paddr));
351 DECLARE("CPU_PHYS_ID",
352 offsetof(cpu_data_t, cpu_phys_id));
353 DECLARE("RTCLOCK_DATAP",
354 offsetof(cpu_data_t, rtclock_datap));
355
356 DECLARE("RTCLOCKDataSize",
357 sizeof(rtclock_data_t));
358 DECLARE("RTCLOCK_ADJ_ABSTIME_LOW",
359 offsetof(rtclock_data_t, rtc_adj.abstime_val.low));
360 DECLARE("RTCLOCK_ADJ_ABSTIME_HIGH",
361 offsetof(rtclock_data_t, rtc_adj.abstime_val.high));
362 DECLARE("RTCLOCK_BASE_ABSTIME_LOW",
363 offsetof(rtclock_data_t, rtc_base.abstime_val.low));
364 DECLARE("RTCLOCK_BASE_ABSTIME_HIGH",
365 offsetof(rtclock_data_t, rtc_base.abstime_val.high));
366
367 DECLARE("SIGPdec", SIGPdec);
368
369 DECLARE("rhdSize",
370 sizeof(struct reset_handler_data));
371#if WITH_CLASSIC_S2R || !__arm64__
372 DECLARE("stSize",
373 sizeof(SleepToken));
374#endif
375
376 DECLARE("CPU_DATA_ENTRIES", offsetof(struct reset_handler_data, cpu_data_entries));
377 DECLARE("ASSIST_RESET_HANDLER", offsetof(struct reset_handler_data, assist_reset_handler));
378
379 DECLARE("CPU_DATA_PADDR", offsetof(struct cpu_data_entry, cpu_data_paddr));
380
381
382 DECLARE("INTSTACK_SIZE", INTSTACK_SIZE);
383
384 DECLARE("TIMER_TSTAMP",
385 offsetof(struct timer, tstamp));
386 DECLARE("THREAD_TIMER",
387 offsetof(struct processor, processor_data.thread_timer));
388 DECLARE("KERNEL_TIMER",
389 offsetof(struct processor, processor_data.kernel_timer));
390 DECLARE("SYSTEM_STATE",
391 offsetof(struct processor, processor_data.system_state));
392 DECLARE("USER_STATE",
393 offsetof(struct processor, processor_data.user_state));
394 DECLARE("CURRENT_STATE",
395 offsetof(struct processor, processor_data.current_state));
396
397 DECLARE("SYSTEM_TIMER",
398 offsetof(struct thread, system_timer));
399 DECLARE("USER_TIMER",
400 offsetof(struct thread, user_timer));
401
402#if !CONFIG_SKIP_PRECISE_USER_KERNEL_TIME
403 DECLARE("PRECISE_USER_KERNEL_TIME",
404 offsetof(struct thread, precise_user_kernel_time));
405#endif
406
407 DECLARE("BA_VIRT_BASE",
408 offsetof(struct boot_args, virtBase));
409 DECLARE("BA_PHYS_BASE",
410 offsetof(struct boot_args, physBase));
411 DECLARE("BA_MEM_SIZE",
412 offsetof(struct boot_args, memSize));
413 DECLARE("BA_TOP_OF_KERNEL_DATA",
414 offsetof(struct boot_args, topOfKernelData));
415 DECLARE("BA_DEVICE_TREE",
416 offsetof(struct boot_args, deviceTreeP));
417 DECLARE("BA_DEVICE_TREE_LENGTH",
418 offsetof(struct boot_args, deviceTreeLength));
419
420 DECLARE("ENTROPY_INDEX_PTR",
421 offsetof(entropy_data_t, index_ptr));
422 DECLARE("ENTROPY_BUFFER",
423 offsetof(entropy_data_t, buffer));
424 DECLARE("ENTROPY_DATA_SIZE", sizeof(struct entropy_data));
425
426 DECLARE("SR_RESTORE_TCR_EL1", offsetof(struct sysreg_restore, tcr_el1));
427
428
429 return (0);
430}