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Commit | Line | Data |
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5ba3f43e A |
1 | /* |
2 | * Copyright (c) 2005-2008 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
0a7de745 | 5 | * |
5ba3f43e A |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
0a7de745 | 14 | * |
5ba3f43e A |
15 | * Please obtain a copy of the License at |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
0a7de745 | 17 | * |
5ba3f43e A |
18 | * The Original Code and all software distributed under the License are |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
0a7de745 | 25 | * |
5ba3f43e A |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ |
27 | */ | |
28 | ||
0a7de745 A |
29 | #define MACH__POSIX_C_SOURCE_PRIVATE 1 /* pulls in suitable savearea from |
30 | * mach/ppc/thread_status.h */ | |
d9a64523 | 31 | #include <arm/caches_internal.h> |
5ba3f43e A |
32 | #include <arm/proc_reg.h> |
33 | ||
34 | #include <kern/thread.h> | |
35 | #include <mach/thread_status.h> | |
36 | ||
d9a64523 A |
37 | #if __has_include(<ptrauth.h>) |
38 | #include <ptrauth.h> | |
39 | #endif | |
5ba3f43e A |
40 | #include <stdarg.h> |
41 | #include <string.h> | |
42 | #include <sys/malloc.h> | |
43 | #include <sys/time.h> | |
44 | #include <sys/systm.h> | |
45 | #include <sys/proc.h> | |
46 | #include <sys/proc_internal.h> | |
47 | #include <sys/kauth.h> | |
48 | #include <sys/dtrace.h> | |
49 | #include <sys/dtrace_impl.h> | |
50 | #include <libkern/OSAtomic.h> | |
51 | #include <kern/simple_lock.h> | |
0a7de745 | 52 | #include <kern/sched_prim.h> /* for thread_wakeup() */ |
5ba3f43e A |
53 | #include <kern/thread_call.h> |
54 | #include <kern/task.h> | |
55 | #include <miscfs/devfs/devfs.h> | |
56 | #include <mach/vm_param.h> | |
57 | ||
58 | extern struct arm_saved_state *find_kern_regs(thread_t); | |
59 | ||
60 | extern dtrace_id_t dtrace_probeid_error; /* special ERROR probe */ | |
61 | typedef arm_saved_state_t savearea_t; | |
62 | ||
0a7de745 A |
63 | extern lck_attr_t *dtrace_lck_attr; |
64 | extern lck_grp_t *dtrace_lck_grp; | |
5ba3f43e A |
65 | |
66 | ||
67 | struct frame { | |
68 | struct frame *backchain; | |
69 | uintptr_t retaddr; | |
70 | }; | |
71 | ||
72 | /* | |
73 | * Atomicity and synchronization | |
74 | */ | |
75 | inline void | |
76 | dtrace_membar_producer(void) | |
77 | { | |
78 | #if __ARM_SMP__ | |
0a7de745 | 79 | __asm__ volatile ("dmb ish" : : : "memory"); |
5ba3f43e | 80 | #else |
0a7de745 | 81 | __asm__ volatile ("nop" : : : "memory"); |
5ba3f43e A |
82 | #endif |
83 | } | |
84 | ||
85 | inline void | |
86 | dtrace_membar_consumer(void) | |
87 | { | |
88 | #if __ARM_SMP__ | |
0a7de745 | 89 | __asm__ volatile ("dmb ish" : : : "memory"); |
5ba3f43e | 90 | #else |
0a7de745 | 91 | __asm__ volatile ("nop" : : : "memory"); |
5ba3f43e A |
92 | #endif |
93 | } | |
94 | ||
95 | /* | |
96 | * Interrupt manipulation | |
97 | * XXX dtrace_getipl() can be called from probe context. | |
98 | */ | |
99 | int | |
100 | dtrace_getipl(void) | |
101 | { | |
102 | /* | |
103 | * XXX Drat, get_interrupt_level is MACH_KERNEL_PRIVATE | |
104 | * in osfmk/kern/cpu_data.h | |
105 | */ | |
106 | /* return get_interrupt_level(); */ | |
0a7de745 | 107 | return ml_at_interrupt_context() ? 1 : 0; |
5ba3f43e A |
108 | } |
109 | ||
110 | #if __ARM_SMP__ | |
111 | /* | |
112 | * MP coordination | |
113 | */ | |
114 | ||
115 | decl_lck_mtx_data(static, dt_xc_lock); | |
116 | static uint32_t dt_xc_sync; | |
117 | ||
118 | typedef struct xcArg { | |
119 | processorid_t cpu; | |
120 | dtrace_xcall_t f; | |
121 | void *arg; | |
122 | } xcArg_t; | |
123 | ||
124 | static void | |
125 | xcRemote(void *foo) | |
126 | { | |
127 | xcArg_t *pArg = (xcArg_t *) foo; | |
128 | ||
0a7de745 A |
129 | if (pArg->cpu == CPU->cpu_id || pArg->cpu == DTRACE_CPUALL) { |
130 | (pArg->f)(pArg->arg); | |
131 | } | |
5ba3f43e | 132 | |
0a7de745 | 133 | if (hw_atomic_sub(&dt_xc_sync, 1) == 0) { |
5ba3f43e | 134 | thread_wakeup((event_t) &dt_xc_sync); |
0a7de745 | 135 | } |
5ba3f43e A |
136 | } |
137 | #endif | |
138 | ||
139 | /* | |
140 | * dtrace_xcall() is not called from probe context. | |
141 | */ | |
142 | void | |
143 | dtrace_xcall(processorid_t cpu, dtrace_xcall_t f, void *arg) | |
144 | { | |
145 | #if __ARM_SMP__ | |
146 | /* Only one dtrace_xcall in flight allowed */ | |
147 | lck_mtx_lock(&dt_xc_lock); | |
148 | ||
149 | xcArg_t xcArg; | |
150 | ||
151 | xcArg.cpu = cpu; | |
152 | xcArg.f = f; | |
153 | xcArg.arg = arg; | |
154 | ||
155 | cpu_broadcast_xcall(&dt_xc_sync, TRUE, xcRemote, (void*) &xcArg); | |
156 | ||
157 | lck_mtx_unlock(&dt_xc_lock); | |
158 | return; | |
159 | #else | |
160 | #pragma unused(cpu) | |
161 | /* On uniprocessor systems, the cpu should always be either ourselves or all */ | |
162 | ASSERT(cpu == CPU->cpu_id || cpu == DTRACE_CPUALL); | |
163 | ||
164 | (*f)(arg); | |
165 | return; | |
166 | #endif | |
167 | } | |
168 | ||
169 | /* | |
170 | * Initialization | |
171 | */ | |
172 | void | |
173 | dtrace_isa_init(void) | |
174 | { | |
175 | lck_mtx_init(&dt_xc_lock, dtrace_lck_grp, dtrace_lck_attr); | |
176 | return; | |
177 | } | |
178 | ||
179 | ||
180 | /** | |
181 | * Register definitions | |
182 | */ | |
183 | #define ARM_FP 7 | |
184 | #define ARM_SP 13 | |
185 | #define ARM_LR 14 | |
186 | #define ARM_PC 15 | |
187 | #define ARM_CPSR 16 | |
188 | ||
189 | #define ARM64_FP 29 | |
190 | #define ARM64_LR 30 | |
191 | #define ARM64_SP 31 | |
192 | #define ARM64_PC 32 | |
193 | #define ARM64_CPSR 33 | |
194 | ||
195 | /* | |
196 | * Runtime and ABI | |
197 | */ | |
198 | uint64_t | |
199 | dtrace_getreg(struct regs * savearea, uint_t reg) | |
200 | { | |
201 | struct arm_saved_state *regs = (struct arm_saved_state *) savearea; | |
202 | ||
d9a64523 A |
203 | if (regs == NULL) { |
204 | DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); | |
0a7de745 | 205 | return 0; |
d9a64523 A |
206 | } |
207 | ||
5ba3f43e A |
208 | if (is_saved_state32(regs)) { |
209 | // Fix special registers if user is 32 bits | |
210 | switch (reg) { | |
0a7de745 A |
211 | case ARM64_FP: |
212 | reg = ARM_FP; | |
5ba3f43e | 213 | break; |
0a7de745 A |
214 | case ARM64_SP: |
215 | reg = ARM_SP; | |
5ba3f43e | 216 | break; |
0a7de745 A |
217 | case ARM64_LR: |
218 | reg = ARM_LR; | |
5ba3f43e | 219 | break; |
0a7de745 A |
220 | case ARM64_PC: |
221 | reg = ARM_PC; | |
5ba3f43e | 222 | break; |
0a7de745 A |
223 | case ARM64_CPSR: |
224 | reg = ARM_CPSR; | |
5ba3f43e A |
225 | break; |
226 | } | |
227 | } | |
228 | ||
229 | if (!check_saved_state_reglimit(regs, reg)) { | |
230 | DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); | |
0a7de745 | 231 | return 0; |
5ba3f43e A |
232 | } |
233 | ||
0a7de745 | 234 | return (uint64_t)get_saved_state_reg(regs, reg); |
5ba3f43e A |
235 | } |
236 | ||
237 | #define RETURN_OFFSET 4 | |
238 | #define RETURN_OFFSET64 8 | |
239 | ||
240 | static int | |
241 | dtrace_getustack_common(uint64_t * pcstack, int pcstack_limit, user_addr_t pc, | |
0a7de745 | 242 | user_addr_t sp) |
5ba3f43e A |
243 | { |
244 | int ret = 0; | |
d9a64523 | 245 | boolean_t is64bit = proc_is64bit_data(current_proc()); |
0a7de745 | 246 | |
5ba3f43e A |
247 | ASSERT(pcstack == NULL || pcstack_limit > 0); |
248 | ||
249 | while (pc != 0) { | |
250 | ret++; | |
251 | if (pcstack != NULL) { | |
252 | *pcstack++ = (uint64_t) pc; | |
253 | pcstack_limit--; | |
0a7de745 | 254 | if (pcstack_limit <= 0) { |
5ba3f43e | 255 | break; |
0a7de745 | 256 | } |
5ba3f43e A |
257 | } |
258 | ||
0a7de745 | 259 | if (sp == 0) { |
5ba3f43e | 260 | break; |
0a7de745 | 261 | } |
5ba3f43e A |
262 | |
263 | if (is64bit) { | |
264 | pc = dtrace_fuword64((sp + RETURN_OFFSET64)); | |
265 | sp = dtrace_fuword64(sp); | |
266 | } else { | |
267 | pc = dtrace_fuword32((sp + RETURN_OFFSET)); | |
268 | sp = dtrace_fuword32(sp); | |
269 | } | |
270 | } | |
271 | ||
0a7de745 | 272 | return ret; |
5ba3f43e A |
273 | } |
274 | ||
275 | void | |
276 | dtrace_getupcstack(uint64_t * pcstack, int pcstack_limit) | |
277 | { | |
278 | thread_t thread = current_thread(); | |
279 | savearea_t *regs; | |
280 | user_addr_t pc, sp, fp; | |
0a7de745 | 281 | volatile uint16_t *flags = (volatile uint16_t *) &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; |
5ba3f43e A |
282 | int n; |
283 | ||
0a7de745 | 284 | if (*flags & CPU_DTRACE_FAULT) { |
5ba3f43e | 285 | return; |
0a7de745 | 286 | } |
5ba3f43e | 287 | |
0a7de745 | 288 | if (pcstack_limit <= 0) { |
5ba3f43e | 289 | return; |
0a7de745 | 290 | } |
5ba3f43e A |
291 | |
292 | /* | |
293 | * If there's no user context we still need to zero the stack. | |
294 | */ | |
0a7de745 | 295 | if (thread == NULL) { |
5ba3f43e | 296 | goto zero; |
0a7de745 | 297 | } |
5ba3f43e A |
298 | |
299 | regs = (savearea_t *) find_user_regs(thread); | |
0a7de745 | 300 | if (regs == NULL) { |
5ba3f43e | 301 | goto zero; |
0a7de745 | 302 | } |
5ba3f43e A |
303 | |
304 | *pcstack++ = (uint64_t)dtrace_proc_selfpid(); | |
305 | pcstack_limit--; | |
306 | ||
0a7de745 | 307 | if (pcstack_limit <= 0) { |
5ba3f43e | 308 | return; |
0a7de745 | 309 | } |
5ba3f43e A |
310 | |
311 | pc = get_saved_state_pc(regs); | |
312 | sp = get_saved_state_sp(regs); | |
0a7de745 | 313 | fp = get_saved_state_fp(regs); |
5ba3f43e A |
314 | |
315 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { | |
316 | *pcstack++ = (uint64_t) pc; | |
317 | pcstack_limit--; | |
0a7de745 | 318 | if (pcstack_limit <= 0) { |
5ba3f43e | 319 | return; |
0a7de745 | 320 | } |
5ba3f43e A |
321 | |
322 | pc = get_saved_state_lr(regs); | |
323 | } | |
324 | ||
325 | n = dtrace_getustack_common(pcstack, pcstack_limit, pc, fp); | |
326 | ||
327 | ASSERT(n >= 0); | |
328 | ASSERT(n <= pcstack_limit); | |
329 | ||
330 | pcstack += n; | |
331 | pcstack_limit -= n; | |
332 | ||
333 | zero: | |
0a7de745 | 334 | while (pcstack_limit-- > 0) { |
5ba3f43e | 335 | *pcstack++ = 0ULL; |
0a7de745 | 336 | } |
5ba3f43e A |
337 | } |
338 | ||
339 | int | |
340 | dtrace_getustackdepth(void) | |
341 | { | |
342 | thread_t thread = current_thread(); | |
343 | savearea_t *regs; | |
344 | user_addr_t pc, sp, fp; | |
345 | int n = 0; | |
346 | ||
0a7de745 | 347 | if (thread == NULL) { |
5ba3f43e | 348 | return 0; |
0a7de745 | 349 | } |
5ba3f43e | 350 | |
0a7de745 A |
351 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_FAULT)) { |
352 | return -1; | |
353 | } | |
5ba3f43e A |
354 | |
355 | regs = (savearea_t *) find_user_regs(thread); | |
0a7de745 | 356 | if (regs == NULL) { |
5ba3f43e | 357 | return 0; |
0a7de745 A |
358 | } |
359 | ||
5ba3f43e A |
360 | pc = get_saved_state_pc(regs); |
361 | sp = get_saved_state_sp(regs); | |
362 | fp = get_saved_state_fp(regs); | |
363 | ||
364 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { | |
365 | n++; | |
366 | pc = get_saved_state_lr(regs); | |
367 | } | |
368 | ||
369 | /* | |
370 | * Note that unlike ppc, the arm code does not use | |
371 | * CPU_DTRACE_USTACK_FP. This is because arm always | |
372 | * traces from the sp, even in syscall/profile/fbt | |
373 | * providers. | |
374 | */ | |
0a7de745 | 375 | |
5ba3f43e A |
376 | n += dtrace_getustack_common(NULL, 0, pc, fp); |
377 | ||
0a7de745 | 378 | return n; |
5ba3f43e A |
379 | } |
380 | ||
381 | void | |
382 | dtrace_getufpstack(uint64_t * pcstack, uint64_t * fpstack, int pcstack_limit) | |
383 | { | |
384 | thread_t thread = current_thread(); | |
d9a64523 | 385 | boolean_t is64bit = proc_is64bit_data(current_proc()); |
5ba3f43e A |
386 | savearea_t *regs; |
387 | user_addr_t pc, sp; | |
0a7de745 | 388 | volatile uint16_t *flags = (volatile uint16_t *) &cpu_core[CPU->cpu_id].cpuc_dtrace_flags; |
5ba3f43e A |
389 | |
390 | #if 0 | |
391 | uintptr_t oldcontext; | |
392 | size_t s1, s2; | |
393 | #endif | |
394 | ||
0a7de745 | 395 | if (*flags & CPU_DTRACE_FAULT) { |
5ba3f43e | 396 | return; |
0a7de745 | 397 | } |
5ba3f43e | 398 | |
0a7de745 | 399 | if (pcstack_limit <= 0) { |
5ba3f43e | 400 | return; |
0a7de745 | 401 | } |
5ba3f43e | 402 | |
0a7de745 | 403 | /* |
5ba3f43e A |
404 | * If there's no user context we still need to zero the stack. |
405 | */ | |
0a7de745 | 406 | if (thread == NULL) { |
5ba3f43e | 407 | goto zero; |
0a7de745 A |
408 | } |
409 | ||
5ba3f43e | 410 | regs = (savearea_t *) find_user_regs(thread); |
0a7de745 | 411 | if (regs == NULL) { |
5ba3f43e | 412 | goto zero; |
0a7de745 | 413 | } |
5ba3f43e A |
414 | |
415 | *pcstack++ = (uint64_t)dtrace_proc_selfpid(); | |
416 | pcstack_limit--; | |
417 | ||
0a7de745 | 418 | if (pcstack_limit <= 0) { |
5ba3f43e | 419 | return; |
0a7de745 | 420 | } |
5ba3f43e A |
421 | |
422 | pc = get_saved_state_pc(regs); | |
423 | sp = get_saved_state_lr(regs); | |
424 | ||
0a7de745 | 425 | #if 0 /* XXX signal stack crawl */ |
5ba3f43e A |
426 | oldcontext = lwp->lwp_oldcontext; |
427 | ||
428 | if (p->p_model == DATAMODEL_NATIVE) { | |
429 | s1 = sizeof(struct frame) + 2 * sizeof(long); | |
430 | s2 = s1 + sizeof(siginfo_t); | |
431 | } else { | |
432 | s1 = sizeof(struct frame32) + 3 * sizeof(int); | |
433 | s2 = s1 + sizeof(siginfo32_t); | |
434 | } | |
435 | #endif | |
436 | ||
437 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { | |
438 | *pcstack++ = (uint64_t) pc; | |
439 | *fpstack++ = 0; | |
440 | pcstack_limit--; | |
0a7de745 | 441 | if (pcstack_limit <= 0) { |
5ba3f43e | 442 | return; |
0a7de745 | 443 | } |
5ba3f43e | 444 | |
0a7de745 | 445 | if (is64bit) { |
5ba3f43e | 446 | pc = dtrace_fuword64(sp); |
0a7de745 | 447 | } else { |
5ba3f43e | 448 | pc = dtrace_fuword32(sp); |
0a7de745 | 449 | } |
5ba3f43e A |
450 | } |
451 | while (pc != 0 && sp != 0) { | |
452 | *pcstack++ = (uint64_t) pc; | |
453 | *fpstack++ = sp; | |
454 | pcstack_limit--; | |
0a7de745 | 455 | if (pcstack_limit <= 0) { |
5ba3f43e | 456 | break; |
0a7de745 | 457 | } |
5ba3f43e | 458 | |
0a7de745 | 459 | #if 0 /* XXX signal stack crawl */ |
5ba3f43e A |
460 | if (oldcontext == sp + s1 || oldcontext == sp + s2) { |
461 | if (p->p_model == DATAMODEL_NATIVE) { | |
462 | ucontext_t *ucp = (ucontext_t *) oldcontext; | |
463 | greg_t *gregs = ucp->uc_mcontext.gregs; | |
464 | ||
465 | sp = dtrace_fulword(&gregs[REG_FP]); | |
466 | pc = dtrace_fulword(&gregs[REG_PC]); | |
467 | ||
468 | oldcontext = dtrace_fulword(&ucp->uc_link); | |
469 | } else { | |
470 | ucontext_t *ucp = (ucontext_t *) oldcontext; | |
471 | greg_t *gregs = ucp->uc_mcontext.gregs; | |
472 | ||
473 | sp = dtrace_fuword32(&gregs[EBP]); | |
474 | pc = dtrace_fuword32(&gregs[EIP]); | |
475 | ||
476 | oldcontext = dtrace_fuword32(&ucp->uc_link); | |
477 | } | |
478 | } else | |
479 | #endif | |
480 | { | |
481 | if (is64bit) { | |
482 | pc = dtrace_fuword64((sp + RETURN_OFFSET64)); | |
483 | sp = dtrace_fuword64(sp); | |
484 | } else { | |
485 | pc = dtrace_fuword32((sp + RETURN_OFFSET)); | |
486 | sp = dtrace_fuword32(sp); | |
487 | } | |
488 | } | |
489 | ||
490 | #if 0 | |
491 | /* XXX ARMTODO*/ | |
492 | /* | |
493 | * This is totally bogus: if we faulted, we're going to clear | |
494 | * the fault and break. This is to deal with the apparently | |
495 | * broken Java stacks on x86. | |
496 | */ | |
497 | if (*flags & CPU_DTRACE_FAULT) { | |
498 | *flags &= ~CPU_DTRACE_FAULT; | |
499 | break; | |
500 | } | |
501 | #endif | |
502 | } | |
503 | ||
0a7de745 A |
504 | zero: |
505 | while (pcstack_limit-- > 0) { | |
5ba3f43e | 506 | *pcstack++ = 0ULL; |
0a7de745 | 507 | } |
5ba3f43e A |
508 | } |
509 | ||
510 | ||
511 | void | |
512 | dtrace_getpcstack(pc_t * pcstack, int pcstack_limit, int aframes, | |
0a7de745 | 513 | uint32_t * intrpc) |
5ba3f43e A |
514 | { |
515 | struct frame *fp = (struct frame *) __builtin_frame_address(0); | |
516 | struct frame *nextfp, *minfp, *stacktop; | |
517 | int depth = 0; | |
518 | int on_intr; | |
519 | int last = 0; | |
520 | uintptr_t pc; | |
521 | uintptr_t caller = CPU->cpu_dtrace_caller; | |
522 | ||
0a7de745 | 523 | if ((on_intr = CPU_ON_INTR(CPU)) != 0) { |
5ba3f43e | 524 | stacktop = (struct frame *) dtrace_get_cpu_int_stack_top(); |
0a7de745 A |
525 | } |
526 | else { | |
5ba3f43e | 527 | stacktop = (struct frame *) (dtrace_get_kernel_stack(current_thread()) + kernel_stack_size); |
0a7de745 | 528 | } |
5ba3f43e A |
529 | |
530 | minfp = fp; | |
531 | ||
532 | aframes++; | |
533 | ||
0a7de745 | 534 | if (intrpc != NULL && depth < pcstack_limit) { |
5ba3f43e | 535 | pcstack[depth++] = (pc_t) intrpc; |
0a7de745 | 536 | } |
5ba3f43e A |
537 | |
538 | while (depth < pcstack_limit) { | |
539 | nextfp = *(struct frame **) fp; | |
540 | pc = *(uintptr_t *) (((uintptr_t) fp) + RETURN_OFFSET64); | |
541 | ||
542 | if (nextfp <= minfp || nextfp >= stacktop) { | |
543 | if (on_intr) { | |
544 | /* | |
545 | * Hop from interrupt stack to thread stack. | |
546 | */ | |
547 | arm_saved_state_t *arm_kern_regs = (arm_saved_state_t *) find_kern_regs(current_thread()); | |
548 | if (arm_kern_regs) { | |
549 | nextfp = (struct frame *)(saved_state64(arm_kern_regs)->fp); | |
550 | ||
551 | { | |
552 | vm_offset_t kstack_base = dtrace_get_kernel_stack(current_thread()); | |
553 | ||
554 | minfp = (struct frame *)kstack_base; | |
555 | stacktop = (struct frame *)(kstack_base + kernel_stack_size); | |
556 | } | |
557 | ||
558 | on_intr = 0; | |
559 | ||
560 | if (nextfp <= minfp || nextfp >= stacktop) { | |
561 | last = 1; | |
562 | } | |
563 | } else { | |
564 | /* | |
565 | * If this thread was on the interrupt stack, but did not | |
566 | * take an interrupt (i.e, the idle thread), there is no | |
567 | * explicit saved state for us to use. | |
568 | */ | |
569 | last = 1; | |
570 | } | |
571 | } else { | |
572 | { | |
573 | /* | |
574 | * This is the last frame we can process; indicate | |
575 | * that we should return after processing this frame. | |
576 | */ | |
577 | last = 1; | |
578 | } | |
579 | } | |
580 | } | |
581 | if (aframes > 0) { | |
582 | if (--aframes == 0 && caller != (uintptr_t)NULL) { | |
583 | /* | |
584 | * We've just run out of artificial frames, | |
585 | * and we have a valid caller -- fill it in | |
586 | * now. | |
587 | */ | |
588 | ASSERT(depth < pcstack_limit); | |
589 | pcstack[depth++] = (pc_t) caller; | |
590 | caller = (uintptr_t)NULL; | |
591 | } | |
592 | } else { | |
0a7de745 | 593 | if (depth < pcstack_limit) { |
5ba3f43e | 594 | pcstack[depth++] = (pc_t) pc; |
0a7de745 | 595 | } |
5ba3f43e A |
596 | } |
597 | ||
598 | if (last) { | |
0a7de745 | 599 | while (depth < pcstack_limit) { |
5ba3f43e | 600 | pcstack[depth++] = (pc_t) NULL; |
0a7de745 | 601 | } |
5ba3f43e A |
602 | return; |
603 | } | |
604 | fp = nextfp; | |
605 | minfp = fp; | |
606 | } | |
607 | } | |
608 | ||
609 | /* | |
610 | * On arm64, we support both 32bit and 64bit user processes. | |
611 | * This routine is only called when handling 32bit processes | |
612 | * where thumb_mode is pertinent. | |
613 | * If this routine is called when handling 64bit processes | |
614 | * thumb_mode should always be zero. | |
615 | */ | |
616 | int | |
617 | dtrace_instr_size(uint32_t instr, int thumb_mode) | |
618 | { | |
619 | if (thumb_mode) { | |
620 | uint16_t instr16 = *(uint16_t*) &instr; | |
0a7de745 | 621 | if (((instr16 >> 11) & 0x1F) > 0x1C) { |
5ba3f43e | 622 | return 4; |
0a7de745 | 623 | } else { |
5ba3f43e | 624 | return 2; |
0a7de745 | 625 | } |
5ba3f43e A |
626 | } else { |
627 | return 4; | |
628 | } | |
629 | } | |
630 | ||
631 | uint64_t | |
632 | dtrace_getarg(int arg, int aframes, dtrace_mstate_t *mstate, dtrace_vstate_t *vstate) | |
633 | { | |
634 | #pragma unused(arg, aframes) | |
635 | uint64_t val = 0; | |
636 | struct frame *fp = (struct frame *)__builtin_frame_address(0); | |
637 | uintptr_t *stack; | |
638 | uintptr_t pc; | |
639 | int i; | |
640 | ||
641 | /* | |
642 | * A total of 8 arguments are passed via registers; any argument with | |
643 | * index of 7 or lower is therefore in a register. | |
644 | */ | |
645 | int inreg = 7; | |
646 | ||
647 | for (i = 1; i <= aframes; ++i) { | |
648 | fp = fp->backchain; | |
d9a64523 A |
649 | #if __has_feature(ptrauth_returns) |
650 | pc = (uintptr_t)ptrauth_strip((void*)fp->retaddr, ptrauth_key_return_address); | |
651 | #else | |
5ba3f43e | 652 | pc = fp->retaddr; |
d9a64523 | 653 | #endif |
5ba3f43e A |
654 | |
655 | if (dtrace_invop_callsite_pre != NULL | |
0a7de745 A |
656 | && pc > (uintptr_t) dtrace_invop_callsite_pre |
657 | && pc <= (uintptr_t) dtrace_invop_callsite_post) { | |
5ba3f43e A |
658 | /* fp points to frame of dtrace_invop() activation */ |
659 | fp = fp->backchain; /* to fbt_perfCallback activation */ | |
660 | fp = fp->backchain; /* to sleh_synchronous activation */ | |
661 | fp = fp->backchain; /* to fleh_synchronous activation */ | |
662 | ||
0a7de745 A |
663 | arm_saved_state_t *tagged_regs = (arm_saved_state_t*) ((void*) &fp[1]); |
664 | arm_saved_state64_t *saved_state = saved_state64(tagged_regs); | |
5ba3f43e A |
665 | |
666 | if (arg <= inreg) { | |
667 | /* the argument will be found in a register */ | |
668 | stack = (uintptr_t*) &saved_state->x[0]; | |
669 | } else { | |
670 | /* the argument will be found in the stack */ | |
671 | fp = (struct frame*) saved_state->sp; | |
d9a64523 | 672 | stack = (uintptr_t*) &fp[1]; |
5ba3f43e A |
673 | arg -= (inreg + 1); |
674 | } | |
675 | ||
676 | goto load; | |
677 | } | |
678 | } | |
679 | ||
680 | /* | |
681 | * We know that we did not come through a trap to get into | |
682 | * dtrace_probe() -- We arrive here when the provider has | |
683 | * called dtrace_probe() directly. | |
684 | * The probe ID is the first argument to dtrace_probe(). | |
685 | * We must advance beyond that to get the argX. | |
686 | */ | |
687 | arg++; /* Advance past probeID */ | |
688 | ||
689 | if (arg <= inreg) { | |
690 | /* | |
691 | * This shouldn't happen. If the argument is passed in a | |
692 | * register then it should have been, well, passed in a | |
693 | * register... | |
694 | */ | |
695 | DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); | |
0a7de745 | 696 | return 0; |
5ba3f43e A |
697 | } |
698 | ||
699 | arg -= (inreg + 1); | |
700 | stack = (uintptr_t*) &fp[1]; /* Find marshalled arguments */ | |
701 | ||
702 | load: | |
703 | if (dtrace_canload((uint64_t)(stack + arg), sizeof(uint64_t), | |
0a7de745 | 704 | mstate, vstate)) { |
5ba3f43e A |
705 | /* dtrace_probe arguments arg0 ... arg4 are 64bits wide */ |
706 | val = dtrace_load64((uint64_t)(stack + arg)); | |
707 | } | |
708 | ||
0a7de745 | 709 | return val; |
5ba3f43e A |
710 | } |
711 | ||
712 | void | |
713 | dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which, | |
0a7de745 | 714 | int fltoffs, int fault, uint64_t illval) |
5ba3f43e A |
715 | { |
716 | /* XXX ARMTODO */ | |
717 | /* | |
718 | * For the case of the error probe firing lets | |
719 | * stash away "illval" here, and special-case retrieving it in DIF_VARIABLE_ARG. | |
720 | */ | |
721 | state->dts_arg_error_illval = illval; | |
722 | dtrace_probe( dtrace_probeid_error, (uint64_t)(uintptr_t)state, epid, which, fltoffs, fault ); | |
723 | } | |
724 | ||
725 | void | |
726 | dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) | |
727 | { | |
728 | /* XXX ARMTODO check copied from ppc/x86*/ | |
0a7de745 | 729 | /* |
5ba3f43e A |
730 | * "base" is the smallest toxic address in the range, "limit" is the first |
731 | * VALID address greater than "base". | |
0a7de745 | 732 | */ |
5ba3f43e | 733 | func(0x0, VM_MIN_KERNEL_ADDRESS); |
0a7de745 A |
734 | if (VM_MAX_KERNEL_ADDRESS < ~(uintptr_t)0) { |
735 | func(VM_MAX_KERNEL_ADDRESS + 1, ~(uintptr_t)0); | |
736 | } | |
5ba3f43e A |
737 | } |
738 | ||
0a7de745 A |
739 | void |
740 | dtrace_flush_caches(void) | |
d9a64523 A |
741 | { |
742 | /* TODO There were some problems with flushing just the cache line that had been modified. | |
743 | * For now, we'll flush the entire cache, until we figure out how to flush just the patched block. | |
744 | */ | |
745 | FlushPoU_Dcache(); | |
746 | InvalidatePoU_Icache(); | |
747 | } |