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5ba3f43e A |
1 | /* |
2 | * Copyright (c) 2005-2008 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | ||
29 | #define MACH__POSIX_C_SOURCE_PRIVATE 1 /* pulls in suitable savearea from | |
30 | * mach/ppc/thread_status.h */ | |
d9a64523 | 31 | #include <arm/caches_internal.h> |
5ba3f43e A |
32 | #include <arm/proc_reg.h> |
33 | ||
34 | #include <kern/thread.h> | |
35 | #include <mach/thread_status.h> | |
36 | ||
d9a64523 A |
37 | #if __has_include(<ptrauth.h>) |
38 | #include <ptrauth.h> | |
39 | #endif | |
5ba3f43e A |
40 | #include <stdarg.h> |
41 | #include <string.h> | |
42 | #include <sys/malloc.h> | |
43 | #include <sys/time.h> | |
44 | #include <sys/systm.h> | |
45 | #include <sys/proc.h> | |
46 | #include <sys/proc_internal.h> | |
47 | #include <sys/kauth.h> | |
48 | #include <sys/dtrace.h> | |
49 | #include <sys/dtrace_impl.h> | |
50 | #include <libkern/OSAtomic.h> | |
51 | #include <kern/simple_lock.h> | |
52 | #include <kern/sched_prim.h> /* for thread_wakeup() */ | |
53 | #include <kern/thread_call.h> | |
54 | #include <kern/task.h> | |
55 | #include <miscfs/devfs/devfs.h> | |
56 | #include <mach/vm_param.h> | |
57 | ||
58 | extern struct arm_saved_state *find_kern_regs(thread_t); | |
59 | ||
60 | extern dtrace_id_t dtrace_probeid_error; /* special ERROR probe */ | |
61 | typedef arm_saved_state_t savearea_t; | |
62 | ||
63 | extern lck_attr_t *dtrace_lck_attr; | |
64 | extern lck_grp_t *dtrace_lck_grp; | |
65 | ||
66 | ||
67 | struct frame { | |
68 | struct frame *backchain; | |
69 | uintptr_t retaddr; | |
70 | }; | |
71 | ||
72 | /* | |
73 | * Atomicity and synchronization | |
74 | */ | |
75 | inline void | |
76 | dtrace_membar_producer(void) | |
77 | { | |
78 | #if __ARM_SMP__ | |
79 | __asm__ volatile("dmb ish" : : : "memory"); | |
80 | #else | |
81 | __asm__ volatile("nop" : : : "memory"); | |
82 | #endif | |
83 | } | |
84 | ||
85 | inline void | |
86 | dtrace_membar_consumer(void) | |
87 | { | |
88 | #if __ARM_SMP__ | |
89 | __asm__ volatile("dmb ish" : : : "memory"); | |
90 | #else | |
91 | __asm__ volatile("nop" : : : "memory"); | |
92 | #endif | |
93 | } | |
94 | ||
95 | /* | |
96 | * Interrupt manipulation | |
97 | * XXX dtrace_getipl() can be called from probe context. | |
98 | */ | |
99 | int | |
100 | dtrace_getipl(void) | |
101 | { | |
102 | /* | |
103 | * XXX Drat, get_interrupt_level is MACH_KERNEL_PRIVATE | |
104 | * in osfmk/kern/cpu_data.h | |
105 | */ | |
106 | /* return get_interrupt_level(); */ | |
107 | return (ml_at_interrupt_context() ? 1 : 0); | |
108 | } | |
109 | ||
110 | #if __ARM_SMP__ | |
111 | /* | |
112 | * MP coordination | |
113 | */ | |
114 | ||
115 | decl_lck_mtx_data(static, dt_xc_lock); | |
116 | static uint32_t dt_xc_sync; | |
117 | ||
118 | typedef struct xcArg { | |
119 | processorid_t cpu; | |
120 | dtrace_xcall_t f; | |
121 | void *arg; | |
122 | } xcArg_t; | |
123 | ||
124 | static void | |
125 | xcRemote(void *foo) | |
126 | { | |
127 | xcArg_t *pArg = (xcArg_t *) foo; | |
128 | ||
129 | if (pArg->cpu == CPU->cpu_id || pArg->cpu == DTRACE_CPUALL) | |
130 | (pArg->f) (pArg->arg); | |
131 | ||
132 | if (hw_atomic_sub(&dt_xc_sync, 1) == 0) | |
133 | thread_wakeup((event_t) &dt_xc_sync); | |
134 | } | |
135 | #endif | |
136 | ||
137 | /* | |
138 | * dtrace_xcall() is not called from probe context. | |
139 | */ | |
140 | void | |
141 | dtrace_xcall(processorid_t cpu, dtrace_xcall_t f, void *arg) | |
142 | { | |
143 | #if __ARM_SMP__ | |
144 | /* Only one dtrace_xcall in flight allowed */ | |
145 | lck_mtx_lock(&dt_xc_lock); | |
146 | ||
147 | xcArg_t xcArg; | |
148 | ||
149 | xcArg.cpu = cpu; | |
150 | xcArg.f = f; | |
151 | xcArg.arg = arg; | |
152 | ||
153 | cpu_broadcast_xcall(&dt_xc_sync, TRUE, xcRemote, (void*) &xcArg); | |
154 | ||
155 | lck_mtx_unlock(&dt_xc_lock); | |
156 | return; | |
157 | #else | |
158 | #pragma unused(cpu) | |
159 | /* On uniprocessor systems, the cpu should always be either ourselves or all */ | |
160 | ASSERT(cpu == CPU->cpu_id || cpu == DTRACE_CPUALL); | |
161 | ||
162 | (*f)(arg); | |
163 | return; | |
164 | #endif | |
165 | } | |
166 | ||
167 | /* | |
168 | * Initialization | |
169 | */ | |
170 | void | |
171 | dtrace_isa_init(void) | |
172 | { | |
173 | lck_mtx_init(&dt_xc_lock, dtrace_lck_grp, dtrace_lck_attr); | |
174 | return; | |
175 | } | |
176 | ||
177 | ||
178 | /** | |
179 | * Register definitions | |
180 | */ | |
181 | #define ARM_FP 7 | |
182 | #define ARM_SP 13 | |
183 | #define ARM_LR 14 | |
184 | #define ARM_PC 15 | |
185 | #define ARM_CPSR 16 | |
186 | ||
187 | #define ARM64_FP 29 | |
188 | #define ARM64_LR 30 | |
189 | #define ARM64_SP 31 | |
190 | #define ARM64_PC 32 | |
191 | #define ARM64_CPSR 33 | |
192 | ||
193 | /* | |
194 | * Runtime and ABI | |
195 | */ | |
196 | uint64_t | |
197 | dtrace_getreg(struct regs * savearea, uint_t reg) | |
198 | { | |
199 | struct arm_saved_state *regs = (struct arm_saved_state *) savearea; | |
200 | ||
d9a64523 A |
201 | if (regs == NULL) { |
202 | DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); | |
203 | return (0); | |
204 | } | |
205 | ||
5ba3f43e A |
206 | if (is_saved_state32(regs)) { |
207 | // Fix special registers if user is 32 bits | |
208 | switch (reg) { | |
209 | case ARM64_FP: | |
210 | reg = ARM_FP; | |
211 | break; | |
212 | case ARM64_SP: | |
213 | reg = ARM_SP; | |
214 | break; | |
215 | case ARM64_LR: | |
216 | reg = ARM_LR; | |
217 | break; | |
218 | case ARM64_PC: | |
219 | reg = ARM_PC; | |
220 | break; | |
221 | case ARM64_CPSR: | |
222 | reg = ARM_CPSR; | |
223 | break; | |
224 | } | |
225 | } | |
226 | ||
227 | if (!check_saved_state_reglimit(regs, reg)) { | |
228 | DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); | |
229 | return (0); | |
230 | } | |
231 | ||
232 | return ((uint64_t)get_saved_state_reg(regs, reg)); | |
233 | } | |
234 | ||
235 | #define RETURN_OFFSET 4 | |
236 | #define RETURN_OFFSET64 8 | |
237 | ||
238 | static int | |
239 | dtrace_getustack_common(uint64_t * pcstack, int pcstack_limit, user_addr_t pc, | |
240 | user_addr_t sp) | |
241 | { | |
242 | int ret = 0; | |
d9a64523 | 243 | boolean_t is64bit = proc_is64bit_data(current_proc()); |
5ba3f43e A |
244 | |
245 | ASSERT(pcstack == NULL || pcstack_limit > 0); | |
246 | ||
247 | while (pc != 0) { | |
248 | ret++; | |
249 | if (pcstack != NULL) { | |
250 | *pcstack++ = (uint64_t) pc; | |
251 | pcstack_limit--; | |
252 | if (pcstack_limit <= 0) | |
253 | break; | |
254 | } | |
255 | ||
256 | if (sp == 0) | |
257 | break; | |
258 | ||
259 | if (is64bit) { | |
260 | pc = dtrace_fuword64((sp + RETURN_OFFSET64)); | |
261 | sp = dtrace_fuword64(sp); | |
262 | } else { | |
263 | pc = dtrace_fuword32((sp + RETURN_OFFSET)); | |
264 | sp = dtrace_fuword32(sp); | |
265 | } | |
266 | } | |
267 | ||
268 | return (ret); | |
269 | } | |
270 | ||
271 | void | |
272 | dtrace_getupcstack(uint64_t * pcstack, int pcstack_limit) | |
273 | { | |
274 | thread_t thread = current_thread(); | |
275 | savearea_t *regs; | |
276 | user_addr_t pc, sp, fp; | |
277 | volatile uint16_t *flags = (volatile uint16_t *) & cpu_core[CPU->cpu_id].cpuc_dtrace_flags; | |
278 | int n; | |
279 | ||
280 | if (*flags & CPU_DTRACE_FAULT) | |
281 | return; | |
282 | ||
283 | if (pcstack_limit <= 0) | |
284 | return; | |
285 | ||
286 | /* | |
287 | * If there's no user context we still need to zero the stack. | |
288 | */ | |
289 | if (thread == NULL) | |
290 | goto zero; | |
291 | ||
292 | regs = (savearea_t *) find_user_regs(thread); | |
293 | if (regs == NULL) | |
294 | goto zero; | |
295 | ||
296 | *pcstack++ = (uint64_t)dtrace_proc_selfpid(); | |
297 | pcstack_limit--; | |
298 | ||
299 | if (pcstack_limit <= 0) | |
300 | return; | |
301 | ||
302 | pc = get_saved_state_pc(regs); | |
303 | sp = get_saved_state_sp(regs); | |
304 | fp = get_saved_state_fp(regs); | |
305 | ||
306 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { | |
307 | *pcstack++ = (uint64_t) pc; | |
308 | pcstack_limit--; | |
309 | if (pcstack_limit <= 0) | |
310 | return; | |
311 | ||
312 | pc = get_saved_state_lr(regs); | |
313 | } | |
314 | ||
315 | n = dtrace_getustack_common(pcstack, pcstack_limit, pc, fp); | |
316 | ||
317 | ASSERT(n >= 0); | |
318 | ASSERT(n <= pcstack_limit); | |
319 | ||
320 | pcstack += n; | |
321 | pcstack_limit -= n; | |
322 | ||
323 | zero: | |
324 | while (pcstack_limit-- > 0) | |
325 | *pcstack++ = 0ULL; | |
326 | } | |
327 | ||
328 | int | |
329 | dtrace_getustackdepth(void) | |
330 | { | |
331 | thread_t thread = current_thread(); | |
332 | savearea_t *regs; | |
333 | user_addr_t pc, sp, fp; | |
334 | int n = 0; | |
335 | ||
336 | if (thread == NULL) | |
337 | return 0; | |
338 | ||
339 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_FAULT)) | |
340 | return (-1); | |
341 | ||
342 | regs = (savearea_t *) find_user_regs(thread); | |
343 | if (regs == NULL) | |
344 | return 0; | |
345 | ||
346 | pc = get_saved_state_pc(regs); | |
347 | sp = get_saved_state_sp(regs); | |
348 | fp = get_saved_state_fp(regs); | |
349 | ||
350 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { | |
351 | n++; | |
352 | pc = get_saved_state_lr(regs); | |
353 | } | |
354 | ||
355 | /* | |
356 | * Note that unlike ppc, the arm code does not use | |
357 | * CPU_DTRACE_USTACK_FP. This is because arm always | |
358 | * traces from the sp, even in syscall/profile/fbt | |
359 | * providers. | |
360 | */ | |
361 | ||
362 | n += dtrace_getustack_common(NULL, 0, pc, fp); | |
363 | ||
364 | return (n); | |
365 | } | |
366 | ||
367 | void | |
368 | dtrace_getufpstack(uint64_t * pcstack, uint64_t * fpstack, int pcstack_limit) | |
369 | { | |
370 | thread_t thread = current_thread(); | |
d9a64523 | 371 | boolean_t is64bit = proc_is64bit_data(current_proc()); |
5ba3f43e A |
372 | savearea_t *regs; |
373 | user_addr_t pc, sp; | |
374 | volatile uint16_t *flags = (volatile uint16_t *) & cpu_core[CPU->cpu_id].cpuc_dtrace_flags; | |
375 | ||
376 | #if 0 | |
377 | uintptr_t oldcontext; | |
378 | size_t s1, s2; | |
379 | #endif | |
380 | ||
381 | if (*flags & CPU_DTRACE_FAULT) | |
382 | return; | |
383 | ||
384 | if (pcstack_limit <= 0) | |
385 | return; | |
386 | ||
387 | /* | |
388 | * If there's no user context we still need to zero the stack. | |
389 | */ | |
390 | if (thread == NULL) | |
391 | goto zero; | |
392 | ||
393 | regs = (savearea_t *) find_user_regs(thread); | |
394 | if (regs == NULL) | |
395 | goto zero; | |
396 | ||
397 | *pcstack++ = (uint64_t)dtrace_proc_selfpid(); | |
398 | pcstack_limit--; | |
399 | ||
400 | if (pcstack_limit <= 0) | |
401 | return; | |
402 | ||
403 | pc = get_saved_state_pc(regs); | |
404 | sp = get_saved_state_lr(regs); | |
405 | ||
406 | #if 0 /* XXX signal stack crawl */ | |
407 | oldcontext = lwp->lwp_oldcontext; | |
408 | ||
409 | if (p->p_model == DATAMODEL_NATIVE) { | |
410 | s1 = sizeof(struct frame) + 2 * sizeof(long); | |
411 | s2 = s1 + sizeof(siginfo_t); | |
412 | } else { | |
413 | s1 = sizeof(struct frame32) + 3 * sizeof(int); | |
414 | s2 = s1 + sizeof(siginfo32_t); | |
415 | } | |
416 | #endif | |
417 | ||
418 | if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { | |
419 | *pcstack++ = (uint64_t) pc; | |
420 | *fpstack++ = 0; | |
421 | pcstack_limit--; | |
422 | if (pcstack_limit <= 0) | |
423 | return; | |
424 | ||
425 | if (is64bit) | |
426 | pc = dtrace_fuword64(sp); | |
427 | else | |
428 | pc = dtrace_fuword32(sp); | |
429 | } | |
430 | while (pc != 0 && sp != 0) { | |
431 | *pcstack++ = (uint64_t) pc; | |
432 | *fpstack++ = sp; | |
433 | pcstack_limit--; | |
434 | if (pcstack_limit <= 0) | |
435 | break; | |
436 | ||
437 | #if 0 /* XXX signal stack crawl */ | |
438 | if (oldcontext == sp + s1 || oldcontext == sp + s2) { | |
439 | if (p->p_model == DATAMODEL_NATIVE) { | |
440 | ucontext_t *ucp = (ucontext_t *) oldcontext; | |
441 | greg_t *gregs = ucp->uc_mcontext.gregs; | |
442 | ||
443 | sp = dtrace_fulword(&gregs[REG_FP]); | |
444 | pc = dtrace_fulword(&gregs[REG_PC]); | |
445 | ||
446 | oldcontext = dtrace_fulword(&ucp->uc_link); | |
447 | } else { | |
448 | ucontext_t *ucp = (ucontext_t *) oldcontext; | |
449 | greg_t *gregs = ucp->uc_mcontext.gregs; | |
450 | ||
451 | sp = dtrace_fuword32(&gregs[EBP]); | |
452 | pc = dtrace_fuword32(&gregs[EIP]); | |
453 | ||
454 | oldcontext = dtrace_fuword32(&ucp->uc_link); | |
455 | } | |
456 | } else | |
457 | #endif | |
458 | { | |
459 | if (is64bit) { | |
460 | pc = dtrace_fuword64((sp + RETURN_OFFSET64)); | |
461 | sp = dtrace_fuword64(sp); | |
462 | } else { | |
463 | pc = dtrace_fuword32((sp + RETURN_OFFSET)); | |
464 | sp = dtrace_fuword32(sp); | |
465 | } | |
466 | } | |
467 | ||
468 | #if 0 | |
469 | /* XXX ARMTODO*/ | |
470 | /* | |
471 | * This is totally bogus: if we faulted, we're going to clear | |
472 | * the fault and break. This is to deal with the apparently | |
473 | * broken Java stacks on x86. | |
474 | */ | |
475 | if (*flags & CPU_DTRACE_FAULT) { | |
476 | *flags &= ~CPU_DTRACE_FAULT; | |
477 | break; | |
478 | } | |
479 | #endif | |
480 | } | |
481 | ||
482 | zero: | |
483 | while (pcstack_limit-- > 0) | |
484 | *pcstack++ = 0ULL; | |
485 | } | |
486 | ||
487 | ||
488 | void | |
489 | dtrace_getpcstack(pc_t * pcstack, int pcstack_limit, int aframes, | |
490 | uint32_t * intrpc) | |
491 | { | |
492 | struct frame *fp = (struct frame *) __builtin_frame_address(0); | |
493 | struct frame *nextfp, *minfp, *stacktop; | |
494 | int depth = 0; | |
495 | int on_intr; | |
496 | int last = 0; | |
497 | uintptr_t pc; | |
498 | uintptr_t caller = CPU->cpu_dtrace_caller; | |
499 | ||
500 | if ((on_intr = CPU_ON_INTR(CPU)) != 0) | |
501 | stacktop = (struct frame *) dtrace_get_cpu_int_stack_top(); | |
502 | else | |
503 | stacktop = (struct frame *) (dtrace_get_kernel_stack(current_thread()) + kernel_stack_size); | |
504 | ||
505 | minfp = fp; | |
506 | ||
507 | aframes++; | |
508 | ||
509 | if (intrpc != NULL && depth < pcstack_limit) | |
510 | pcstack[depth++] = (pc_t) intrpc; | |
511 | ||
512 | while (depth < pcstack_limit) { | |
513 | nextfp = *(struct frame **) fp; | |
514 | pc = *(uintptr_t *) (((uintptr_t) fp) + RETURN_OFFSET64); | |
515 | ||
516 | if (nextfp <= minfp || nextfp >= stacktop) { | |
517 | if (on_intr) { | |
518 | /* | |
519 | * Hop from interrupt stack to thread stack. | |
520 | */ | |
521 | arm_saved_state_t *arm_kern_regs = (arm_saved_state_t *) find_kern_regs(current_thread()); | |
522 | if (arm_kern_regs) { | |
523 | nextfp = (struct frame *)(saved_state64(arm_kern_regs)->fp); | |
524 | ||
525 | { | |
526 | vm_offset_t kstack_base = dtrace_get_kernel_stack(current_thread()); | |
527 | ||
528 | minfp = (struct frame *)kstack_base; | |
529 | stacktop = (struct frame *)(kstack_base + kernel_stack_size); | |
530 | } | |
531 | ||
532 | on_intr = 0; | |
533 | ||
534 | if (nextfp <= minfp || nextfp >= stacktop) { | |
535 | last = 1; | |
536 | } | |
537 | } else { | |
538 | /* | |
539 | * If this thread was on the interrupt stack, but did not | |
540 | * take an interrupt (i.e, the idle thread), there is no | |
541 | * explicit saved state for us to use. | |
542 | */ | |
543 | last = 1; | |
544 | } | |
545 | } else { | |
546 | { | |
547 | /* | |
548 | * This is the last frame we can process; indicate | |
549 | * that we should return after processing this frame. | |
550 | */ | |
551 | last = 1; | |
552 | } | |
553 | } | |
554 | } | |
555 | if (aframes > 0) { | |
556 | if (--aframes == 0 && caller != (uintptr_t)NULL) { | |
557 | /* | |
558 | * We've just run out of artificial frames, | |
559 | * and we have a valid caller -- fill it in | |
560 | * now. | |
561 | */ | |
562 | ASSERT(depth < pcstack_limit); | |
563 | pcstack[depth++] = (pc_t) caller; | |
564 | caller = (uintptr_t)NULL; | |
565 | } | |
566 | } else { | |
567 | if (depth < pcstack_limit) | |
568 | pcstack[depth++] = (pc_t) pc; | |
569 | } | |
570 | ||
571 | if (last) { | |
572 | while (depth < pcstack_limit) | |
573 | pcstack[depth++] = (pc_t) NULL; | |
574 | return; | |
575 | } | |
576 | fp = nextfp; | |
577 | minfp = fp; | |
578 | } | |
579 | } | |
580 | ||
581 | /* | |
582 | * On arm64, we support both 32bit and 64bit user processes. | |
583 | * This routine is only called when handling 32bit processes | |
584 | * where thumb_mode is pertinent. | |
585 | * If this routine is called when handling 64bit processes | |
586 | * thumb_mode should always be zero. | |
587 | */ | |
588 | int | |
589 | dtrace_instr_size(uint32_t instr, int thumb_mode) | |
590 | { | |
591 | if (thumb_mode) { | |
592 | uint16_t instr16 = *(uint16_t*) &instr; | |
593 | if (((instr16 >> 11) & 0x1F) > 0x1C) | |
594 | return 4; | |
595 | else | |
596 | return 2; | |
597 | } else { | |
598 | return 4; | |
599 | } | |
600 | } | |
601 | ||
602 | uint64_t | |
603 | dtrace_getarg(int arg, int aframes, dtrace_mstate_t *mstate, dtrace_vstate_t *vstate) | |
604 | { | |
605 | #pragma unused(arg, aframes) | |
606 | uint64_t val = 0; | |
607 | struct frame *fp = (struct frame *)__builtin_frame_address(0); | |
608 | uintptr_t *stack; | |
609 | uintptr_t pc; | |
610 | int i; | |
611 | ||
612 | /* | |
613 | * A total of 8 arguments are passed via registers; any argument with | |
614 | * index of 7 or lower is therefore in a register. | |
615 | */ | |
616 | int inreg = 7; | |
617 | ||
618 | for (i = 1; i <= aframes; ++i) { | |
619 | fp = fp->backchain; | |
d9a64523 A |
620 | #if __has_feature(ptrauth_returns) |
621 | pc = (uintptr_t)ptrauth_strip((void*)fp->retaddr, ptrauth_key_return_address); | |
622 | #else | |
5ba3f43e | 623 | pc = fp->retaddr; |
d9a64523 | 624 | #endif |
5ba3f43e A |
625 | |
626 | if (dtrace_invop_callsite_pre != NULL | |
627 | && pc > (uintptr_t) dtrace_invop_callsite_pre | |
628 | && pc <= (uintptr_t) dtrace_invop_callsite_post) | |
629 | { | |
630 | /* fp points to frame of dtrace_invop() activation */ | |
631 | fp = fp->backchain; /* to fbt_perfCallback activation */ | |
632 | fp = fp->backchain; /* to sleh_synchronous activation */ | |
633 | fp = fp->backchain; /* to fleh_synchronous activation */ | |
634 | ||
635 | arm_saved_state_t *tagged_regs = (arm_saved_state_t*) ((void*) &fp[1]); | |
636 | arm_saved_state64_t *saved_state = saved_state64(tagged_regs); | |
637 | ||
638 | if (arg <= inreg) { | |
639 | /* the argument will be found in a register */ | |
640 | stack = (uintptr_t*) &saved_state->x[0]; | |
641 | } else { | |
642 | /* the argument will be found in the stack */ | |
643 | fp = (struct frame*) saved_state->sp; | |
d9a64523 | 644 | stack = (uintptr_t*) &fp[1]; |
5ba3f43e A |
645 | arg -= (inreg + 1); |
646 | } | |
647 | ||
648 | goto load; | |
649 | } | |
650 | } | |
651 | ||
652 | /* | |
653 | * We know that we did not come through a trap to get into | |
654 | * dtrace_probe() -- We arrive here when the provider has | |
655 | * called dtrace_probe() directly. | |
656 | * The probe ID is the first argument to dtrace_probe(). | |
657 | * We must advance beyond that to get the argX. | |
658 | */ | |
659 | arg++; /* Advance past probeID */ | |
660 | ||
661 | if (arg <= inreg) { | |
662 | /* | |
663 | * This shouldn't happen. If the argument is passed in a | |
664 | * register then it should have been, well, passed in a | |
665 | * register... | |
666 | */ | |
667 | DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); | |
668 | return (0); | |
669 | } | |
670 | ||
671 | arg -= (inreg + 1); | |
672 | stack = (uintptr_t*) &fp[1]; /* Find marshalled arguments */ | |
673 | ||
674 | load: | |
675 | if (dtrace_canload((uint64_t)(stack + arg), sizeof(uint64_t), | |
676 | mstate, vstate)) { | |
677 | /* dtrace_probe arguments arg0 ... arg4 are 64bits wide */ | |
678 | val = dtrace_load64((uint64_t)(stack + arg)); | |
679 | } | |
680 | ||
681 | return (val); | |
682 | } | |
683 | ||
684 | void | |
685 | dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which, | |
686 | int fltoffs, int fault, uint64_t illval) | |
687 | { | |
688 | /* XXX ARMTODO */ | |
689 | /* | |
690 | * For the case of the error probe firing lets | |
691 | * stash away "illval" here, and special-case retrieving it in DIF_VARIABLE_ARG. | |
692 | */ | |
693 | state->dts_arg_error_illval = illval; | |
694 | dtrace_probe( dtrace_probeid_error, (uint64_t)(uintptr_t)state, epid, which, fltoffs, fault ); | |
695 | } | |
696 | ||
697 | void | |
698 | dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) | |
699 | { | |
700 | /* XXX ARMTODO check copied from ppc/x86*/ | |
701 | /* | |
702 | * "base" is the smallest toxic address in the range, "limit" is the first | |
703 | * VALID address greater than "base". | |
704 | */ | |
705 | func(0x0, VM_MIN_KERNEL_ADDRESS); | |
706 | if (VM_MAX_KERNEL_ADDRESS < ~(uintptr_t)0) | |
707 | func(VM_MAX_KERNEL_ADDRESS + 1, ~(uintptr_t)0); | |
708 | } | |
709 | ||
d9a64523 A |
710 | void dtrace_flush_caches(void) |
711 | { | |
712 | /* TODO There were some problems with flushing just the cache line that had been modified. | |
713 | * For now, we'll flush the entire cache, until we figure out how to flush just the patched block. | |
714 | */ | |
715 | FlushPoU_Dcache(); | |
716 | InvalidatePoU_Icache(); | |
717 | } | |
718 |