]>
Commit | Line | Data |
---|---|---|
2d21ac55 A |
1 | /* |
2 | * Copyright (c) 2006 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | ||
29 | #ifndef _I386_VMX_ASM_H_ | |
30 | #define _I386_VMX_ASM_H_ | |
31 | ||
32 | #include <mach/machine/vm_types.h> | |
33 | #include <mach/boolean.h> | |
34 | #include <kern/assert.h> | |
35 | #include <i386/eflags.h> | |
36 | #include <i386/seg.h> | |
37 | ||
2d21ac55 A |
38 | #define VMX_FAIL_INVALID -1 |
39 | #define VMX_FAIL_VALID -2 | |
40 | #define VMX_SUCCEED 0 | |
41 | ||
42 | static inline void enter_64bit_mode(void) { | |
43 | __asm__ __volatile__ ( | |
44 | ".byte 0xea /* far jump longmode */ \n\t" | |
45 | ".long 1f \n\t" | |
46 | ".word %P0 \n\t" | |
47 | ".code64 \n\t" | |
48 | "1:" | |
49 | :: "i" (KERNEL64_CS) | |
50 | ); | |
51 | } | |
52 | static inline void enter_compat_mode(void) { | |
53 | asm( | |
54 | "ljmp *4f \n\t" | |
55 | "4: \n\t" | |
56 | ".long 5f \n\t" | |
57 | ".word %P0 \n\t" | |
58 | ".code32 \n\t" | |
59 | "5:" | |
b0d623f7 | 60 | :: "i" (KERNEL32_CS) |
2d21ac55 A |
61 | ); |
62 | } | |
63 | ||
64 | #define __VMXOFF(res) \ | |
65 | __asm__ __volatile__ ( \ | |
66 | "vmxoff \n\t" \ | |
67 | "cmovcl %2, %0 \n\t" /* CF = 1, ZF = 0 */ \ | |
68 | "cmovzl %3, %0" /* CF = 0, ZF = 1 */ \ | |
69 | : "=&r" (res) \ | |
70 | : "0" (VMX_SUCCEED), \ | |
71 | "r" (VMX_FAIL_INVALID), \ | |
72 | "r" (VMX_FAIL_VALID) \ | |
73 | : "memory", "cc" \ | |
74 | ) | |
75 | ||
76 | #define __VMXON(addr, res) \ | |
77 | __asm__ __volatile__ ( \ | |
78 | "vmxon %4 \n\t" \ | |
79 | "cmovcl %2, %0 \n\t" /* CF = 1, ZF = 0 */ \ | |
80 | "cmovzl %3, %0" /* CF = 0, ZF = 1 */ \ | |
81 | : "=&r" (res) \ | |
82 | : "0" (VMX_SUCCEED), \ | |
83 | "r" (VMX_FAIL_INVALID), \ | |
84 | "r" (VMX_FAIL_VALID), \ | |
85 | "m" (*addr) \ | |
86 | : "memory", "cc" \ | |
87 | ); | |
88 | ||
89 | ||
90 | /* | |
91 | * __vmxoff -- Leave VMX Operation | |
92 | * | |
93 | */ | |
94 | static inline int | |
95 | __vmxoff(void) | |
96 | { | |
97 | int result; | |
b0d623f7 A |
98 | #if defined (__x86_64__) |
99 | __VMXOFF(result); | |
100 | #else | |
2d21ac55 A |
101 | if (ml_is64bit()) { |
102 | /* don't put anything between these lines! */ | |
103 | enter_64bit_mode(); | |
104 | __VMXOFF(result); | |
105 | enter_compat_mode(); | |
106 | } else { | |
107 | __VMXOFF(result); | |
108 | } | |
b0d623f7 | 109 | #endif |
2d21ac55 A |
110 | return result; |
111 | } | |
112 | ||
113 | /* | |
114 | * __vmxon -- Enter VMX Operation | |
115 | * | |
116 | */ | |
117 | static inline int | |
118 | __vmxon(addr64_t *v) | |
119 | { | |
120 | int result; | |
b0d623f7 A |
121 | #if defined (__x86_64__) |
122 | __VMXON(v, result); | |
123 | #else | |
2d21ac55 A |
124 | if (ml_is64bit()) { |
125 | /* don't put anything between these lines! */ | |
126 | enter_64bit_mode(); | |
127 | __VMXON(v, result); | |
128 | enter_compat_mode(); | |
129 | } else { | |
130 | __VMXON(v, result); | |
131 | } | |
b0d623f7 | 132 | #endif |
2d21ac55 A |
133 | return result; |
134 | } | |
135 | ||
136 | /* | |
137 | * VMX Capability Registers (VCR) | |
138 | * | |
139 | */ | |
140 | #define VMX_VCR_VMCS_MEM_TYPE_BIT 50 | |
141 | #define VMX_VCR_VMCS_MEM_TYPE_MASK 0xF | |
142 | ||
143 | #define VMX_VCR_VMCS_SIZE_BIT 32 | |
144 | #define VMX_VCR_VMCS_SIZE_MASK 0x01FFF | |
145 | #define VMX_VCR_VMCS_REV_ID 0x00000000FFFFFFFFLL | |
146 | ||
147 | #define VMX_VCR_ACT_HLT_BIT 6 | |
148 | #define VMX_VCR_ACT_HLT_MASK 0x1 | |
149 | #define VMX_VCR_ACT_SHUTDOWN_BIT 7 | |
150 | #define VMX_VCR_ACT_SHUTDOWN_MASK 0x1 | |
151 | #define VMX_VCR_ACT_SIPI_BIT 8 | |
152 | #define VMX_VCR_ACT_SIPI_MASK 0x1 | |
153 | #define VMX_VCR_ACT_CSTATE_BIT 9 | |
154 | #define VMX_VCR_ACT_CSTATE_MASK 0x1 | |
155 | #define VMX_VCR_CR3_TARGS_BIT 16 | |
156 | #define VMX_VCR_CR3_TARGS_MASK 0xFF | |
157 | #define VMX_VCR_MAX_MSRS_BIT 25 | |
158 | #define VMX_VCR_MAX_MSRS_MASK 0x7 | |
159 | #define VMX_VCR_MSEG_ID_BIT 32 | |
160 | #define VMX_VCR_MSEG_ID_MASK 0xFFFFFFFF | |
161 | ||
162 | #endif /* _I386_VMX_H_ */ |