runtime/arm64-asm.h

   1 /*
   2  * @APPLE_LICENSE_HEADER_START@
   3  *
   4  * Copyright (c) 2018 Apple Inc.  All Rights Reserved.
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
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   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. Please obtain a copy of the License at
  10  * http://www.opensource.apple.com/apsl/ and read it before using this
  11  * file.
  12  *
  13  * The Original Code and all software distributed under the License are
  14  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  15  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
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  18  * Please see the License for the specific language governing rights and
  19  * limitations under the License.
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  21  * @APPLE_LICENSE_HEADER_END@
  22  */
  23 /********************************************************************
  24  *
  25  *  arm64-asm.h - asm tools for arm64/arm64_32 and ROP/JOP
  26  *
  27  ********************************************************************/
  28
  29 #if __arm64__
  30
  31 #if __LP64__
  32 // true arm64
  33
  34 #define SUPPORT_TAGGED_POINTERS 1
  35 #define PTR .quad
  36 #define PTRSIZE 8
  37 #define PTRSHIFT 3  // 1<<PTRSHIFT == PTRSIZE
  38 // "p" registers are pointer-sized
  39 #define UXTP UXTX
  40 #define p0  x0
  41 #define p1  x1
  42 #define p2  x2
  43 #define p3  x3
  44 #define p4  x4
  45 #define p5  x5
  46 #define p6  x6
  47 #define p7  x7
  48 #define p8  x8
  49 #define p9  x9
  50 #define p10 x10
  51 #define p11 x11
  52 #define p12 x12
  53 #define p13 x13
  54 #define p14 x14
  55 #define p15 x15
  56 #define p16 x16
  57 #define p17 x17
  58
  59 // true arm64
  60 #else
  61 // arm64_32
  62
  63 #define SUPPORT_TAGGED_POINTERS 0
  64 #define PTR .long
  65 #define PTRSIZE 4
  66 #define PTRSHIFT 2  // 1<<PTRSHIFT == PTRSIZE
  67 // "p" registers are pointer-sized
  68 #define UXTP UXTW
  69 #define p0  w0
  70 #define p1  w1
  71 #define p2  w2
  72 #define p3  w3
  73 #define p4  w4
  74 #define p5  w5
  75 #define p6  w6
  76 #define p7  w7
  77 #define p8  w8
  78 #define p9  w9
  79 #define p10 w10
  80 #define p11 w11
  81 #define p12 w12
  82 #define p13 w13
  83 #define p14 w14
  84 #define p15 w15
  85 #define p16 w16
  86 #define p17 w17
  87
  88 // arm64_32
  89 #endif
  90
  91
  92 #if __has_feature(ptrauth_returns)
  93 // ROP
  94 #   define SignLR pacibsp
  95 #   define AuthenticateLR autibsp
  96 #else
  97 // not ROP
  98 #   define SignLR
  99 #   define AuthenticateLR
 100 #endif
 101
 102 #if __has_feature(ptrauth_calls)
 103 // JOP
 104
 105 .macro TailCallFunctionPointer
 106         // $0 = function pointer value
 107         braaz   $0
 108 .endmacro
 109
 110 .macro TailCallCachedImp
 111         // $0 = cached imp, $1 = address of cached imp, $2 = SEL
 112         eor     $1, $1, $2      // mix SEL into ptrauth modifier
 113         brab    $0, $1
 114 .endmacro
 115
 116 .macro TailCallMethodListImp
 117         // $0 = method list imp, $1 = address of method list imp
 118         braa    $0, $1
 119 .endmacro
 120
 121 .macro TailCallBlockInvoke
 122         // $0 = invoke function, $1 = address of invoke function
 123         braa    $0, $1
 124 .endmacro
 125
 126 .macro AuthAndResignAsIMP
 127         // $0 = cached imp, $1 = address of cached imp, $2 = SEL
 128         // note: assumes the imp is not nil
 129         eor     $1, $1, $2      // mix SEL into ptrauth modifier
 130         autib   $0, $1          // authenticate cached imp
 131         ldr     xzr, [$0]       // crash if authentication failed
 132         paciza  $0              // resign cached imp as IMP
 133 .endmacro
 134
 135 // JOP
 136 #else
 137 // not JOP
 138
 139 .macro TailCallFunctionPointer
 140         // $0 = function pointer value
 141         br      $0
 142 .endmacro
 143
 144 .macro TailCallCachedImp
 145         // $0 = cached imp, $1 = address of cached imp, $2 = SEL
 146         br      $0
 147 .endmacro
 148
 149 .macro TailCallMethodListImp
 150         // $0 = method list imp, $1 = address of method list imp
 151         br      $0
 152 .endmacro
 153
 154 .macro TailCallBlockInvoke
 155         // $0 = invoke function, $1 = address of invoke function
 156         br      $0
 157 .endmacro
 158
 159 .macro AuthAndResignAsIMP
 160         // $0 = cached imp, $1 = address of cached imp, $2 = SEL
 161         // empty
 162 .endmacro
 163
 164 // not JOP
 165 #endif
 166
 167 #define TailCallBlockInvoke TailCallMethodListImp
 168
 169
 170 // __arm64__
 171 #endif