ppc/sys/_sigtramp.s

   1 /*
   2  * Copyright (c) 2007, 2011 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. Please obtain a copy of the License at
  10  * http://www.opensource.apple.com/apsl/ and read it before using this
  11  * file.
  12  *
  13  * The Original Code and all software distributed under the License are
  14  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  15  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  16  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  18  * Please see the License for the specific language governing rights and
  19  * limitations under the License.
  20  *
  21  * @APPLE_LICENSE_HEADER_END@
  22  */
  23
  24 #include <architecture/ppc/mode_independent_asm.h>
  25 #include <sys/syscall.h>
  26
  27 #define UC_TRAD                 1
  28 #define UC_TRAD64               20
  29 #define UC_TRAD64_VEC           25
  30 #define UC_FLAVOR               30
  31 #define UC_FLAVOR_VEC           35
  32 #define UC_FLAVOR64             40
  33 #define UC_FLAVOR64_VEC         45
  34 #define UC_DUAL                 50
  35 #define UC_DUAL_VEC             55
  36
  37 /* Structure fields and sizes for ucontext and mcontext.  */
  38 #define UCONTEXT_UC_MCSIZE      MODE_CHOICE (24, 40)
  39 #define UCONTEXT_UC_MCONTEXT    MODE_CHOICE (28, 48)
  40 #define MCONTEXT_SIZE           1032
  41 #define MCONTEXT64_SIZE         1176
  42 #define UC_FLAVOR64_SIZE        600
  43 #define UC_FLAVOR64_VEC_SIZE    MCONTEXT64_SIZE
  44
  45 #define MCONTEXT_ES_EXCEPTION   8
  46 #define MCONTEXT_SS_SRR0        32
  47 #define MCONTEXT_SS_SRR1        36
  48 #define MCONTEXT_SS_R0          40
  49 #define MCONTEXT_SS_CR          168
  50 #define MCONTEXT_SS_XER         172
  51 #define MCONTEXT_SS_LR          176
  52 #define MCONTEXT_SS_CTR         180
  53 #define MCONTEXT_SS_MQ          184
  54 #define MCONTEXT_SS_VRSAVE      188
  55 #define MCONTEXT_FS_FPREGS      192
  56 #define MCONTEXT_FS_FPSCR       448
  57 #define MCONTEXT_VS_SAVE_VR     456
  58 #define MCONTEXT_VS_VSCR        968
  59
  60 #define MCONTEXT64_ES_EXCEPTION 12
  61 #define MCONTEXT64_SS_SRR0      32
  62 #define MCONTEXT64_SS_SRR1      40
  63 #define MCONTEXT64_SS_R0        48
  64 #define MCONTEXT64_SS_CR        304
  65 #define MCONTEXT64_SS_XER       308
  66 #define MCONTEXT64_SS_LR        316
  67 #define MCONTEXT64_SS_CTR       324
  68 #define MCONTEXT64_SS_VRSAVE    332
  69 #define MCONTEXT64_FS_FPREGS    336
  70 #define MCONTEXT64_FS_FPSCR     592
  71 #define MCONTEXT64_VS_SAVE_VR   600
  72 #define MCONTEXT64_VS_VSCR      1112
  73
  74 /* Exception types.  I believe the MCONTEXT_ES_EXCEPTION field is set from
  75    the address called to handle the exception, for example a
  76    Program Exception jumps to address 0x00700 and so the field has
  77    value 7.  */
  78 #define EXCEPTION_DSI 3
  79 #define EXCEPTION_ISI 4
  80 #define EXCEPTION_INTERRUPT 5
  81 #define EXCEPTION_ALIGN 6
  82 #define EXCEPTION_PROGRAM 7
  83 #define EXCEPTION_FPUNAVAIL 8
  84 #define EXCEPTION_DEC 9
  85 #define EXCEPTION_SC 0xC
  86 #define EXCEPTION_TRACE 0xD
  87 #define EXCEPTION_FPASSIST 0xE
  88
  89 /* register allocation:
  90         r0 : scratch, also used by MI_* macros
  91         r3 : parameter union __sigaction_u __sigaction_u
  92         r4 : parameter int sigstyle
  93         r5 : parameter int sig
  94         r6 : parameter siginfo_t *sinfo
  95         r7 : parameter ucontext_t *uctx
  96         r8 : value of __in_sigtramp
  97         r9 : &__in_sigtramp
  98         r12: scratch used by MI_* macros
  99
 100         r29 : sigstyle
 101         r28 : uctx
 102         r27 : uctx->uc_mcontext
 103
 104 */
 105
 106 MI_ENTRY_POINT(__sigtramp)
 107         /* Save away sigstyle and uctx.  This code doesn't need to
 108            restore the callee-saved registers, since sigreturn
 109            will do it.  */
 110         mr r28,r7
 111         mr r29,r4
 112 #if defined(__DYNAMIC__)
 113         /* ++__in_sigtramp; */
 114         MI_GET_ADDRESS (r9, ___in_sigtramp)
 115         lwz r8,0(r9)
 116         addi r8,r8,1
 117         stw r8,0(r9)
 118 #endif
 119         /* Having this here shortens the unwind tables significantly.  */
 120         lg r27,UCONTEXT_UC_MCONTEXT(r7)
 121
 122         /* Call the signal handler.
 123            Some variants are not supposed to get the last two parameters,
 124            but the test to prevent this is more expensive than just passing
 125            them.  */
 126         mtctr r3
 127         mr r3,r5
 128         mr r4,r6
 129         mr r5,r7
 130 Lcall_start:
 131         bctrl
 132 Lcall_end:
 133
 134         /* Call __finish_sigtramp in sigtramp.c to complete processing
 135            for ppc, or just return to the kernel using sigtramp for ppc64.  */
 136         mr r3,r28
 137         mr r4,r29
 138         b MODE_CHOICE (___finish_sigtramp, ___sigreturn)
 139         /* Does not return.  */
 140
 141 /* DWARF unwind table #defines.  */
 142 #define DW_CFA_advance_loc_4 0x44
 143 #define DW_CFA_def_cfa 0x0c
 144 #define DW_CFA_def_cfa_expression 0x0F
 145 #define DW_CFA_expression 0x10
 146 #define DW_CFA_val_expression 0x16
 147 #define DW_CFA_offset(column) 0x80+(column)
 148
 149 /* DWARF expression #defines.  */
 150 #define DW_OP_deref 0x06
 151 #define DW_OP_const1u 0x08
 152 #define DW_OP_dup 0x12
 153 #define DW_OP_drop 0x13
 154 #define DW_OP_over 0x14
 155 #define DW_OP_pick 0x15
 156 #define DW_OP_swap 0x16
 157 #define DW_OP_rot 0x17
 158 #define DW_OP_abs 0x19
 159 #define DW_OP_and 0x1a
 160 #define DW_OP_div 0x1b
 161 #define DW_OP_minus 0x1c
 162 #define DW_OP_mod 0x1d
 163 #define DW_OP_mul 0x1e
 164 #define DW_OP_neg 0x1f
 165 #define DW_OP_not 0x20
 166 #define DW_OP_or 0x21
 167 #define DW_OP_plus 0x22
 168 #define DW_OP_plus_uconst 0x23
 169 #define DW_OP_shl 0x24
 170 #define DW_OP_shr 0x25
 171 #define DW_OP_shra 0x26
 172 #define DW_OP_xor 0x27
 173 #define DW_OP_skip 0x2f
 174 #define DW_OP_bra 0x28
 175 #define DW_OP_eq 0x29
 176 #define DW_OP_ge 0x2A
 177 #define DW_OP_gt 0x2B
 178 #define DW_OP_le 0x2C
 179 #define DW_OP_lt 0x2D
 180 #define DW_OP_ne 0x2E
 181 #define DW_OP_lit(n) 0x30+(n)
 182 #define DW_OP_breg(n) 0x70+(n)
 183 #define DW_OP_deref_size 0x94
 184
 185 /* The location expressions we'll use.  */
 186
 187 #ifdef __ppc__
 188 /* The ppc versions test register 29 for UC_TRAD64, UC_TRAD64_VEC,
 189    UC_FLAVOR64, UC_FLAVOR64_VEC, and then use the appropriate offset
 190    off r27 (either the offset for a mcontext or a mcontext64).
 191
 192    The expression computed has been somewhat optimised to reduce the size
 193    of the unwind entries, and is of the form
 194
 195    (r27 + offs
 196     + ((r29/10)==UC_TRAD64/10 || (r29/10)==UC_FLAVOR64/10)*(offs64-offs))
 197 */
 198
 199 /* For when REGNO < 128 and OFFS < 64.  */
 200 #define loc_expr_for_reg_sml(regno, offs, offs64)                       \
 201         .byte DW_CFA_expression, regno, 17 /* block length */,          \
 202          DW_OP_breg(27), offs,                                          \
 203           DW_OP_breg(29), 0, DW_OP_lit(10), DW_OP_div,                  \
 204            DW_OP_dup, DW_OP_lit(UC_TRAD64/10), DW_OP_eq,                \
 205             DW_OP_swap, DW_OP_lit(UC_FLAVOR64/10), DW_OP_eq, DW_OP_or,  \
 206            DW_OP_const1u, offs64-(offs), DW_OP_mul, DW_OP_plus
 207
 208 /* For when REGNO < 128 and OFFS >= 64.  */
 209 #define loc_expr_for_reg(regno, offs, offs64)                           \
 210         .byte DW_CFA_expression, regno, 18 /* block length */,          \
 211          DW_OP_breg(27), (offs & 0x7F) | 0x80, (offs >> 7),             \
 212           DW_OP_breg(29), 0, DW_OP_lit(10), DW_OP_div,                  \
 213            DW_OP_dup, DW_OP_lit(UC_TRAD64/10), DW_OP_eq,                \
 214             DW_OP_swap, DW_OP_lit(UC_FLAVOR64/10), DW_OP_eq, DW_OP_or,  \
 215            DW_OP_const1u, offs64-(offs), DW_OP_mul, DW_OP_plus
 216
 217 #else
 218
 219 /* The kernel always gives a ppc64 process a mcontext64, so just use
 220    that offset.  */
 221 #define loc_expr_for_reg(regno, offs, offs64)                   \
 222         .byte DW_CFA_expression, regno, 3 /* block length */,   \
 223          DW_OP_breg(27), (offs64 & 0x7F) | 0x80, (offs64 >> 7)
 224
 225 #define loc_expr_for_reg_sml(regno, offs, offs64)       \
 226   loc_expr_for_reg(regno, offs, offs64)
 227
 228 #endif /* __ppc__ */
 229
 230 #define loc_expr_varying(regno, offs, offs64)                   \
 231   loc_expr_for_reg (regno, offs, (offs64+MODE_CHOICE(4,0)))
 232
 233 /* For REGNO < 22 */
 234 #define loc_expr_gpr_sml(regno)                                         \
 235  loc_expr_for_reg_sml (regno, MCONTEXT_SS_R0+(4*regno),                 \
 236                        MCONTEXT64_SS_R0+(8*regno)+MODE_CHOICE (4,0))
 237
 238 /* For REGNO >= 22 */
 239 #define loc_expr_gpr(regno)                             \
 240  loc_expr_varying (regno, MCONTEXT_SS_R0+(4*regno),     \
 241                    MCONTEXT64_SS_R0+(8*regno))
 242
 243 #define loc_expr_fpr(regno)                                     \
 244  loc_expr_for_reg (regno+32, MCONTEXT_FS_FPREGS+(8*regno),      \
 245                    MCONTEXT64_FS_FPREGS+(8*regno))
 246 #define loc_expr_vr(regno)                                      \
 247  loc_expr_for_reg (regno+77, MCONTEXT_VS_SAVE_VR+(16*regno),    \
 248                    MCONTEXT64_VS_SAVE_VR+(16*regno))
 249
 250         /* Unwind tables.  */
 251         .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
 252 EH_frame1:
 253         .set L$set$0,LECIE1-LSCIE1
 254         .long L$set$0   ; Length of Common Information Entry
 255 LSCIE1:
 256         .long   0       ; CIE Identifier Tag
 257         .byte   0x3     ; CIE Version
 258         .ascii "zRS\0"  ; CIE Augmentation
 259         ;;  Both these alignment values are unused.
 260         .byte   0x1     ; uleb128 0x1; CIE Code Alignment Factor
 261         .byte   0x7c    ; sleb128 -4; CIE Data Alignment Factor
 262         /* The choice of column for the return address is somewhat tricky.
 263            Fortunately, the actual choice is private to this file, and
 264            the space it's reserved from is the GCC register space, not the
 265            DWARF2 numbering.  So any free element of the right size is an OK
 266            choice.  Thus: */
 267         .byte   67      ; CIE RA Column
 268         .byte   0x1     ; uleb128 0x1; Augmentation size
 269         .byte   0x10    ; FDE Encoding (pcrel)
 270         .byte   0xc     ; DW_CFA_def_cfa
 271         .byte   0x1     ; uleb128 0x1
 272         .byte   0x0     ; uleb128 0x0
 273         .align LOG2_GPR_BYTES
 274 LECIE1:
 275         .globl _sigtramp.eh
 276 _sigtramp.eh:
 277 LSFDE1:
 278         .set L$set$1,LEFDE1-LASFDE1
 279         .long L$set$1   ; FDE Length
 280 LASFDE1:
 281         .long   LASFDE1-EH_frame1       ; FDE CIE offset
 282         .g_long Lcall_start-.   ; FDE initial location
 283         .set L$set$2,Lcall_end-Lcall_start
 284         .g_long L$set$2 ; FDE address range
 285         .byte   0x0     ; uleb128 0x0; Augmentation size
 286
 287         /* Now for the expressions, which all compute
 288            uctx->uc_mcontext->register
 289            for each register.
 290            uctx->uc_mcontext is already in r27, so
 291            the tricky part is that this might be a 64-bit context,
 292            in which case the offset would be different.
 293
 294            In the case of a dual context, only the low half of a
 295            GPR is restored.
 296
 297            Restore even the registers that are not call-saved because they
 298            might be being used in the prologue to save other registers,
 299            for instance GPR0 is sometimes used to save LR.    */
 300
 301         loc_expr_gpr_sml (0)
 302         loc_expr_gpr_sml (1)
 303         loc_expr_gpr_sml (2)
 304         loc_expr_gpr_sml (3)
 305         loc_expr_gpr_sml (4)
 306         loc_expr_gpr_sml (5)
 307         loc_expr_gpr (6)
 308         loc_expr_gpr (7)
 309         loc_expr_gpr (8)
 310         loc_expr_gpr (9)
 311         loc_expr_gpr (10)
 312         loc_expr_gpr (11)
 313         loc_expr_gpr (12)
 314         loc_expr_gpr (13)
 315         loc_expr_gpr (14)
 316         loc_expr_gpr (15)
 317         loc_expr_gpr (16)
 318         loc_expr_gpr (17)
 319         loc_expr_gpr (18)
 320         loc_expr_gpr (19)
 321         loc_expr_gpr (20)
 322         loc_expr_gpr (21)
 323         loc_expr_gpr (22)
 324         loc_expr_gpr (23)
 325         loc_expr_gpr (24)
 326         loc_expr_gpr (25)
 327         loc_expr_gpr (26)
 328         loc_expr_gpr (27)
 329         loc_expr_gpr (28)
 330         loc_expr_gpr (29)
 331         loc_expr_gpr (30)
 332         loc_expr_gpr (31)
 333
 334         loc_expr_for_reg (64, MCONTEXT_SS_CR, MCONTEXT64_SS_CR)
 335         loc_expr_varying (76, MCONTEXT_SS_XER, MCONTEXT64_SS_XER)
 336         loc_expr_varying (65, MCONTEXT_SS_LR, MCONTEXT64_SS_LR)
 337         loc_expr_varying (66, MCONTEXT_SS_CTR, MCONTEXT64_SS_CTR)
 338         loc_expr_for_reg (109, MCONTEXT_SS_VRSAVE, MCONTEXT64_SS_VRSAVE)
 339
 340         loc_expr_fpr (0)
 341         loc_expr_fpr (1)
 342         loc_expr_fpr (2)
 343         loc_expr_fpr (3)
 344         loc_expr_fpr (4)
 345         loc_expr_fpr (5)
 346         loc_expr_fpr (6)
 347         loc_expr_fpr (7)
 348         loc_expr_fpr (8)
 349         loc_expr_fpr (9)
 350         loc_expr_fpr (10)
 351         loc_expr_fpr (11)
 352         loc_expr_fpr (12)
 353         loc_expr_fpr (13)
 354         loc_expr_fpr (14)
 355         loc_expr_fpr (15)
 356         loc_expr_fpr (16)
 357         loc_expr_fpr (17)
 358         loc_expr_fpr (18)
 359         loc_expr_fpr (19)
 360         loc_expr_fpr (20)
 361         loc_expr_fpr (21)
 362         loc_expr_fpr (22)
 363         loc_expr_fpr (23)
 364         loc_expr_fpr (24)
 365         loc_expr_fpr (25)
 366         loc_expr_fpr (26)
 367         loc_expr_fpr (27)
 368         loc_expr_fpr (28)
 369         loc_expr_fpr (29)
 370         loc_expr_fpr (30)
 371         loc_expr_fpr (31)
 372
 373         loc_expr_for_reg (112, MCONTEXT_FS_FPSCR, MCONTEXT64_FS_FPSCR)
 374
 375         loc_expr_vr (0)
 376         loc_expr_vr (1)
 377         loc_expr_vr (2)
 378         loc_expr_vr (3)
 379         loc_expr_vr (4)
 380         loc_expr_vr (5)
 381         loc_expr_vr (6)
 382         loc_expr_vr (7)
 383         loc_expr_vr (8)
 384         loc_expr_vr (9)
 385         loc_expr_vr (10)
 386         loc_expr_vr (11)
 387         loc_expr_vr (12)
 388         loc_expr_vr (13)
 389         loc_expr_vr (14)
 390         loc_expr_vr (15)
 391         loc_expr_vr (16)
 392         loc_expr_vr (17)
 393         loc_expr_vr (18)
 394         loc_expr_vr (19)
 395         loc_expr_vr (20)
 396         loc_expr_vr (21)
 397         loc_expr_vr (22)
 398         loc_expr_vr (23)
 399         loc_expr_vr (24)
 400         loc_expr_vr (25)
 401         loc_expr_vr (26)
 402         loc_expr_vr (27)
 403         loc_expr_vr (28)
 404         loc_expr_vr (29)
 405         loc_expr_vr (30)
 406         loc_expr_vr (31)
 407
 408         loc_expr_for_reg (110, MCONTEXT_VS_VSCR, MCONTEXT64_VS_VSCR)
 409
 410         /* The return address is even more complicated, because it needs
 411            to be the actual address to which to return, and so
 412            depends on the signal thrown, because some signals have SRR0
 413            as the address of the faulting instruction, and others
 414            have it as the next address to execute.
 415
 416            Although MCONTEXT_SS_SRR0 is the same as MCONTEXT64_SS_SRR0,
 417            that doesn't really simplify things much, since if
 418            the context is a 64-bit context for a 32-bit process,
 419            we'll need to add 4 to get to the low word.  */
 420
 421         /* The exception types that point to the faulting instruction are:
 422            EXCEPTION_DSI, EXCEPTION_ALIGN, EXCEPTION_FPUNAVAIL,
 423            and
 424            EXCEPTION_PROGRAM when SRR1[47] is clear.
 425            The others point to the next instruction to execute.
 426
 427            EXCEPTION_ISI is a special case.  There are these possibilies:
 428            - program calls a subroutine which is NULL, in which case
 429              SRR0 holds NULL and LR-4 is the faulting instruction.
 430            - program executes a computed goto to NULL, in which case
 431              there is no way to know the faulting instruction.
 432            - program runs off end of its text, in which case
 433              SRR0-4 is the faulting instruction
 434            - program executes a wild branch.
 435            I think this code most needs to handle the first case, as
 436            the other cases are rare or can't be handled.  */
 437
 438         .byte DW_CFA_val_expression, 67
 439         .set L$set$3,Lpc_end-Lpc_start
 440         .byte L$set$3
 441 Lpc_start:
 442 #ifdef __ppc__
 443         /* On ppc, compute whether or not a 64-bit exception frame is in
 444            use.  */
 445         .byte  DW_OP_breg(29), 0, DW_OP_lit(10), DW_OP_div
 446         .byte   DW_OP_dup, DW_OP_lit(UC_TRAD64/10), DW_OP_eq
 447         .byte    DW_OP_swap, DW_OP_lit(UC_FLAVOR64/10), DW_OP_eq, DW_OP_or
 448
 449         /* Find the value of SRR0.  */
 450         .byte   DW_OP_dup
 451         .byte    DW_OP_lit(MCONTEXT64_SS_SRR0+4-MCONTEXT_SS_SRR0), DW_OP_mul
 452         .byte    DW_OP_breg(27), MCONTEXT_SS_SRR0
 453         .byte     DW_OP_plus, DW_OP_deref
 454         /* Determine the exception type.  */
 455         .byte    DW_OP_swap, DW_OP_dup
 456         .byte     DW_OP_lit(MCONTEXT64_ES_EXCEPTION-MCONTEXT_ES_EXCEPTION)
 457         .byte      DW_OP_mul
 458         .byte     DW_OP_breg(27), MCONTEXT_ES_EXCEPTION
 459         .byte      DW_OP_plus, DW_OP_deref
 460         /* Find the value of SRR1.  */
 461         .byte     DW_OP_swap, DW_OP_dup
 462         .byte      DW_OP_lit(MCONTEXT64_SS_SRR1+4-MCONTEXT_SS_SRR1), DW_OP_mul
 463         .byte      DW_OP_breg(27), MCONTEXT_SS_SRR1
 464         .byte       DW_OP_plus, DW_OP_deref
 465         /* Find the value of LR.  */
 466         .byte      DW_OP_swap
 467         .byte      DW_OP_const1u, MCONTEXT64_SS_LR+4-MCONTEXT_SS_LR, DW_OP_mul
 468         .byte      DW_OP_breg(27), MCONTEXT_SS_LR, MCONTEXT_SS_LR >> 7
 469         .byte       DW_OP_plus, DW_OP_deref
 470 #else
 471         /* Find the value of SRR0.  */
 472         .byte  DW_OP_breg(27), MCONTEXT64_SS_SRR0, DW_OP_deref
 473         /* Determine the exception type.  */
 474         .byte   DW_OP_breg(27), MCONTEXT64_ES_EXCEPTION, DW_OP_deref_size, 4
 475         /* Find the value of SRR1.  */
 476         .byte    DW_OP_breg(27), MCONTEXT64_SS_SRR1, DW_OP_deref
 477         /* Find the value of LR.  */
 478         .byte     DW_OP_breg(27), MCONTEXT64_SS_LR & 0x7f | 0x80
 479         .byte       MCONTEXT64_SS_LR >> 7
 480         .byte      DW_OP_deref
 481 #endif
 482         /* At this point, the stack contains LR, SRR1, the exception type,
 483            SRR0, and the base CFA address (which this doesn't use).  */
 484
 485         /* If the exception type is EXCEPTION_ISI, the result is LR.  */
 486         .byte      DW_OP_pick, 2
 487         .byte       DW_OP_lit(EXCEPTION_ISI), DW_OP_eq
 488         .byte       DW_OP_bra   ; 'bra' is a conditional branch.
 489         .set L$set$5,Lpc_end-0f
 490         .short       L$set$5
 491 0:
 492         .byte      DW_OP_drop
 493
 494         /* Otherwise, start by determining if SRR1[47] is clear...  */
 495         .byte     DW_OP_not, DW_OP_lit(16), DW_OP_shr, DW_OP_lit(1), DW_OP_and
 496         /* ...and the exception type is EXCEPTION_PROGRAM.  */
 497         .byte     DW_OP_over, DW_OP_lit(EXCEPTION_PROGRAM), DW_OP_eq, DW_OP_and
 498         /* Check if any of the other exception cases are present.  */
 499         .byte     DW_OP_over, DW_OP_lit(EXCEPTION_DSI), DW_OP_eq, DW_OP_or
 500         .byte     DW_OP_over, DW_OP_lit(EXCEPTION_ALIGN), DW_OP_eq, DW_OP_or
 501         .byte     DW_OP_swap, DW_OP_lit(EXCEPTION_FPUNAVAIL)
 502         .byte      DW_OP_eq, DW_OP_or
 503         /* If the exception points to the faulting instruction, add
 504            4 to point past the faulting instruction.  */
 505         .byte    DW_OP_lit(4), DW_OP_mul, DW_OP_plus
 506 Lpc_end:
 507
 508         /* The CFA will have been saved as the value of R1.  */
 509         .byte DW_CFA_def_cfa_expression
 510         .set L$set$4,Lcfa_end-Lcfa_start
 511         .byte L$set$4
 512 Lcfa_start:
 513 #ifdef __ppc__
 514         .byte DW_OP_breg(27), MCONTEXT_SS_R0+4
 515         .byte  DW_OP_breg(29), 0, DW_OP_lit(10), DW_OP_div
 516         .byte   DW_OP_dup, DW_OP_lit(UC_TRAD64/10), DW_OP_eq
 517         .byte    DW_OP_swap, DW_OP_lit(UC_FLAVOR64/10), DW_OP_eq, DW_OP_or
 518         .byte  DW_OP_lit(MCONTEXT64_SS_R0+12-MCONTEXT_SS_R0-4)
 519         .byte   DW_OP_mul, DW_OP_plus
 520         .byte DW_OP_deref
 521 #else
 522         .byte DW_OP_breg(27), MCONTEXT64_SS_R0+8, DW_OP_deref
 523 #endif
 524 Lcfa_end:
 525
 526         .align LOG2_GPR_BYTES
 527 LEFDE1:
 528
 529         .subsections_via_symbols