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24 #include <sys/syscall.h>
29 /* Structure fields for ucontext and mcontext. */
30 #define UCONTEXT_UC_MCONTEXT 48
32 #define MCONTEXT_ES_EXCEPTION 0
33 #define MCONTEXT_SS_RAX 16
34 #define MCONTEXT_SS_RBX 24
35 #define MCONTEXT_SS_RCX 32
36 #define MCONTEXT_SS_RDX 40
37 #define MCONTEXT_SS_RDI 48
38 #define MCONTEXT_SS_RSI 56
39 #define MCONTEXT_SS_RBP 64
40 #define MCONTEXT_SS_RSP 72
41 #define MCONTEXT_SS_R8 80
42 #define MCONTEXT_SS_RIP 144
49 union __sigaction_u __sigaction_u, %rdi
52 siginfo_t *sinfo, %rcx
61 /* Although this routine does not need any stack frame, various parts
62 of the OS can't analyse the stack without them. */
66 movq %rdi, %rax # set up address for call
68 #if defined(__DYNAMIC__)
69 incl ___in_sigtramp(%rip)
71 /* Save uctx in %rbx. */
73 /* Call the signal handler.
74 Some variants are not supposed to get the last two parameters,
75 but the test to prevent this is more expensive than just passing
83 #if defined(__DYNAMIC__)
84 decl ___in_sigtramp(%rip)
87 movl $ UC_FLAVOR, %esi
90 /* DWARF unwind table #defines. */
91 #define DW_CFA_advance_loc_4 0x44
92 #define DW_CFA_def_cfa 0x0c
93 #define DW_CFA_def_cfa_expression 0x0F
94 #define DW_CFA_expression 0x10
95 #define DW_CFA_val_expression 0x16
96 #define DW_CFA_offset(column) 0x80+(column)
98 /* DWARF expression #defines. */
99 #define DW_OP_deref 0x06
100 #define DW_OP_const1u 0x08
101 #define DW_OP_dup 0x12
102 #define DW_OP_drop 0x13
103 #define DW_OP_over 0x14
104 #define DW_OP_pick 0x15
105 #define DW_OP_swap 0x16
106 #define DW_OP_rot 0x17
107 #define DW_OP_abs 0x19
108 #define DW_OP_and 0x1a
109 #define DW_OP_div 0x1b
110 #define DW_OP_minus 0x1c
111 #define DW_OP_mod 0x1d
112 #define DW_OP_mul 0x1e
113 #define DW_OP_neg 0x1f
114 #define DW_OP_not 0x20
115 #define DW_OP_or 0x21
116 #define DW_OP_plus 0x22
117 #define DW_OP_plus_uconst 0x23
118 #define DW_OP_shl 0x24
119 #define DW_OP_shr 0x25
120 #define DW_OP_shra 0x26
121 #define DW_OP_xor 0x27
122 #define DW_OP_skip 0x2f
123 #define DW_OP_bra 0x28
124 #define DW_OP_eq 0x29
125 #define DW_OP_ge 0x2A
126 #define DW_OP_gt 0x2B
127 #define DW_OP_le 0x2C
128 #define DW_OP_lt 0x2D
129 #define DW_OP_ne 0x2E
130 #define DW_OP_lit(n) 0x30+(n)
131 #define DW_OP_breg(n) 0x70+(n)
132 #define DW_OP_deref_size 0x94
134 /* The location expression we'll use. */
136 #define loc_expr_for_reg(regno, offs) \
137 .byte DW_CFA_expression, regno, 5 /* block length */, \
138 DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref, \
139 DW_OP_plus_uconst, offs
141 /* For r8 through r13 */
142 #define loc_expr_rN(regno) \
143 loc_expr_for_reg(regno, MCONTEXT_SS_R8+(8*(regno-8)))
145 /* For r14 through r15 */
146 #define loc_expr_rN_long(regno) \
147 .byte DW_CFA_expression, regno, 6 /* block length */, \
148 DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref, \
149 DW_OP_plus_uconst, MCONTEXT_SS_R8+(8*(regno-8)), 1
152 .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
154 .set L$set$0,LECIE1-LSCIE1
155 .long L$set$0 # Length of Common Information Entry
157 .long 0 # CIE Identifier Tag
158 .byte 0x3 # CIE Version
159 .ascii "zR\0" # CIE Augmentation
160 .byte 0x1 # uleb128 0x1; CIE Code Alignment Factor
161 .byte 0x78 # sleb128 -8; CIE Data Alignment Factor
162 .byte 0x10 # CIE RA Column
163 .byte 0x1 # uleb128 0x1; Augmentation size
164 .byte 0x10 # FDE Encoding (pcrel)
166 .byte 0x7 # uleb128 0x5
167 .byte 0x8 # uleb128 0x4
168 .byte DW_CFA_offset(16)
169 .byte 0x1 # uleb128 0x1
175 .set L$set$1,LEFDE1-LASFDE1
176 .long L$set$1 # FDE Length
178 .long LASFDE1-EH_frame1 # FDE CIE offset
179 .quad Lcall_start-. # FDE initial location
180 .set L$set$2,Lcall_end-Lcall_start
181 .quad L$set$2 # FDE address range
182 .byte 0x0 # uleb128 0x0; Augmentation size
184 /* Now for the expressions, which all compute
185 uctx->uc_mcontext->register
188 Describe even the registers that are not call-saved because they
189 might be being used in the prologue to save other registers.
190 Only integer registers are described at present. */
192 loc_expr_for_reg (0, MCONTEXT_SS_RAX)
193 loc_expr_for_reg (1, MCONTEXT_SS_RBX)
194 loc_expr_for_reg (2, MCONTEXT_SS_RCX)
195 loc_expr_for_reg (3, MCONTEXT_SS_RDX)
196 loc_expr_for_reg (4, MCONTEXT_SS_RSI)
197 loc_expr_for_reg (5, MCONTEXT_SS_RDI)
198 loc_expr_for_reg (6, MCONTEXT_SS_RBP)
199 loc_expr_for_reg (7, MCONTEXT_SS_RSP)
206 loc_expr_rN_long (14)
207 loc_expr_rN_long (15)
209 /* The Intel architecture classifies exceptions into three categories,
210 'faults' which put the address of the faulting instruction
211 in EIP, 'traps' which put the following instruction in EIP,
212 and 'aborts' which don't typically report the instruction
213 causing the exception.
215 The traps are #BP and #OF. */
217 .byte DW_CFA_val_expression, 16
218 .set L$set$3,Lpc_end-Lpc_start
221 /* Push the mcontext address twice. */
222 .byte DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref, DW_OP_dup
223 /* Find the value of EIP. */
224 .byte DW_OP_plus_uconst, MCONTEXT_SS_RIP, MCONTEXT_SS_RIP >> 7
225 .byte DW_OP_deref, DW_OP_swap
226 /* Determine the exception type. */
227 .byte DW_OP_plus_uconst, MCONTEXT_ES_EXCEPTION, DW_OP_deref_size, 4
228 /* Check whether it is #BP (3) or #OF (4). */
229 .byte DW_OP_dup, DW_OP_lit(3), DW_OP_ne
230 .byte DW_OP_swap, DW_OP_lit(4), DW_OP_ne, DW_OP_and
231 /* If it is not, then add 1 to the instruction address, so as to point
232 within or past the faulting instruction. */
236 /* The CFA will have been saved as the value of RSP (it is not
238 .byte DW_CFA_def_cfa_expression
239 .set L$set$4,Lcfa_end-Lcfa_start
242 .byte DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref
243 .byte DW_OP_plus_uconst, MCONTEXT_SS_RSP, DW_OP_deref
249 .subsections_via_symbols