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24 #include <sys/syscall.h>
26 #if defined(__DYNAMIC__)
37 /* Structure fields for ucontext and mcontext. */
38 #define UCONTEXT_UC_MCONTEXT 28
40 #define MCONTEXT_ES_EXCEPTION 0
41 #define MCONTEXT_SS_EAX 12
42 #define MCONTEXT_SS_EBX 16
43 #define MCONTEXT_SS_ECX 20
44 #define MCONTEXT_SS_EDX 24
45 #define MCONTEXT_SS_EDI 28
46 #define MCONTEXT_SS_ESI 32
47 #define MCONTEXT_SS_EBP 36
48 #define MCONTEXT_SS_ESP 40
49 #define MCONTEXT_SS_EFLAGS 48
50 #define MCONTEXT_SS_EIP 52
54 %ebx Address of "L00000000001$pb"
59 union __sigaction_u __sigaction_u,
71 /* Although this routine does not need any stack frame, various parts
72 of the OS can't analyse the stack without them. */
76 movl 8(%ebp), %ecx # get '__sigaction_u'
77 #if defined(__DYNAMIC__)
82 incl ___in_sigtramp-"L00000000001$pb"(%ebx)
84 movl 16(%ebp), %edx # get 'sig'
85 movl 20(%ebp), %eax # get 'sinfo'
86 movl 24(%ebp), %esi # get 'uctx'
87 /* Call the signal handler.
88 Some variants are not supposed to get the last two parameters,
89 but the test to prevent this is more expensive than just passing
97 #if defined(__DYNAMIC__)
98 decl ___in_sigtramp-"L00000000001$pb"(%ebx)
101 movl $ UC_FLAVOR, 8(%esp)
102 movl $ SYS_sigreturn, %eax
105 /* DWARF unwind table #defines. */
106 #define DW_CFA_advance_loc_4 0x44
107 #define DW_CFA_def_cfa 0x0c
108 #define DW_CFA_def_cfa_expression 0x0F
109 #define DW_CFA_expression 0x10
110 #define DW_CFA_val_expression 0x16
111 #define DW_CFA_offset(column) 0x80+(column)
113 /* DWARF expression #defines. */
114 #define DW_OP_deref 0x06
115 #define DW_OP_const1u 0x08
116 #define DW_OP_dup 0x12
117 #define DW_OP_drop 0x13
118 #define DW_OP_over 0x14
119 #define DW_OP_pick 0x15
120 #define DW_OP_swap 0x16
121 #define DW_OP_rot 0x17
122 #define DW_OP_abs 0x19
123 #define DW_OP_and 0x1a
124 #define DW_OP_div 0x1b
125 #define DW_OP_minus 0x1c
126 #define DW_OP_mod 0x1d
127 #define DW_OP_mul 0x1e
128 #define DW_OP_neg 0x1f
129 #define DW_OP_not 0x20
130 #define DW_OP_or 0x21
131 #define DW_OP_plus 0x22
132 #define DW_OP_plus_uconst 0x23
133 #define DW_OP_shl 0x24
134 #define DW_OP_shr 0x25
135 #define DW_OP_shra 0x26
136 #define DW_OP_xor 0x27
137 #define DW_OP_skip 0x2f
138 #define DW_OP_bra 0x28
139 #define DW_OP_eq 0x29
140 #define DW_OP_ge 0x2A
141 #define DW_OP_gt 0x2B
142 #define DW_OP_le 0x2C
143 #define DW_OP_lt 0x2D
144 #define DW_OP_ne 0x2E
145 #define DW_OP_lit(n) 0x30+(n)
146 #define DW_OP_breg(n) 0x70+(n)
147 #define DW_OP_deref_size 0x94
149 /* The location expression we'll use. */
151 #define loc_expr_for_reg(regno, offs) \
152 .byte DW_CFA_expression, regno, 5 /* block length */, \
153 DW_OP_breg(6), UCONTEXT_UC_MCONTEXT, DW_OP_deref, \
154 DW_OP_plus_uconst, offs
157 .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
159 .set L$set$0,LECIE1-LSCIE1
160 .long L$set$0 # Length of Common Information Entry
162 .long 0 # CIE Identifier Tag
163 .byte 0x3 # CIE Version
164 .ascii "zR\0" # CIE Augmentation
165 .byte 0x1 # uleb128 0x1; CIE Code Alignment Factor
166 .byte 0x7c # sleb128 -4; CIE Data Alignment Factor
167 .byte 0x8 # CIE RA Column
168 .byte 0x1 # uleb128 0x1; Augmentation size
169 .byte 0x10 # FDE Encoding (pcrel)
171 .byte 0x5 # uleb128 0x5
172 .byte 0x4 # uleb128 0x4
173 .byte DW_CFA_offset(8)
174 .byte 0x1 # uleb128 0x1
180 .set L$set$1,LEFDE1-LASFDE1
181 .long L$set$1 # FDE Length
183 .long LASFDE1-EH_frame1 # FDE CIE offset
184 .long Lcall_start-. # FDE initial location
185 .set L$set$2,Lcall_end-Lcall_start
186 .long L$set$2 # FDE address range
187 .byte 0x0 # uleb128 0x0; Augmentation size
189 /* Now for the expressions, which all compute
190 uctx->uc_mcontext->register
193 Describe even the registers that are not call-saved because they
194 might be being used in the prologue to save other registers.
195 Only integer registers are described at present. */
197 loc_expr_for_reg (0, MCONTEXT_SS_EAX)
198 loc_expr_for_reg (1, MCONTEXT_SS_ECX)
199 loc_expr_for_reg (2, MCONTEXT_SS_EDX)
200 loc_expr_for_reg (3, MCONTEXT_SS_EBX)
201 loc_expr_for_reg (4, MCONTEXT_SS_EBP) # note that GCC switches
202 loc_expr_for_reg (5, MCONTEXT_SS_ESP) # DWARF registers 4 & 5
203 loc_expr_for_reg (6, MCONTEXT_SS_ESI)
204 loc_expr_for_reg (7, MCONTEXT_SS_EDI)
205 loc_expr_for_reg (9, MCONTEXT_SS_EFLAGS)
207 /* The Intel architecture classifies exceptions into three categories,
208 'faults' which put the address of the faulting instruction
209 in EIP, 'traps' which put the following instruction in EIP,
210 and 'aborts' which don't typically report the instruction
211 causing the exception.
213 The traps are #BP and #OF. */
215 .byte DW_CFA_val_expression, 8
216 .set L$set$3,Lpc_end-Lpc_start
219 /* Push the mcontext address twice. */
220 .byte DW_OP_breg(6), UCONTEXT_UC_MCONTEXT, DW_OP_deref, DW_OP_dup
221 /* Find the value of EIP. */
222 .byte DW_OP_plus_uconst, MCONTEXT_SS_EIP, DW_OP_deref, DW_OP_swap
223 /* Determine the exception type. */
224 .byte DW_OP_plus_uconst, MCONTEXT_ES_EXCEPTION, DW_OP_deref
225 /* Check whether it is #BP (3) or #OF (4). */
226 .byte DW_OP_dup, DW_OP_lit(3), DW_OP_ne
227 .byte DW_OP_swap, DW_OP_lit(4), DW_OP_ne, DW_OP_and
228 /* If it is, then add 1 to the instruction address, so as to point
229 within or past the faulting instruction. */
233 /* The CFA will have been saved as the value of ESP (it is not
235 .byte DW_CFA_def_cfa_expression
236 .set L$set$4,Lcfa_end-Lcfa_start
239 .byte DW_OP_breg(6), UCONTEXT_UC_MCONTEXT, DW_OP_deref
240 .byte DW_OP_plus_uconst, MCONTEXT_SS_ESP, DW_OP_deref
246 .subsections_via_symbols