2 * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
4 * @APPLE_LICENSE_HEADER_START@
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. Please obtain a copy of the License at
10 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * The Original Code and all software distributed under the License are
14 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
15 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
16 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
18 * Please see the License for the specific language governing rights and
19 * limitations under the License.
21 * @APPLE_LICENSE_HEADER_END@
25 * Copyright (c) 1998 Apple Computer, Inc. All rights reserved.
27 * File: sys/ppc/_longjmp.s
29 * Implements _longjmp()
32 * 8 September 1998 Matt Watson (mwatson@apple.com)
33 * Created. Derived from longjmp.s
36 /* We use mode-independent "g" opcodes such as "lg", and/or
37 * mode-independent macros such as MI_CALL_EXTERNAL. These expand
38 * into word operations when targeting __ppc__, and into doubleword
39 * operations when targeting __ppc64__.
41 #include <architecture/ppc/mode_independent_asm.h>
45 #define __APPLE_API_PRIVATE
46 #include <machine/cpu_capabilities.h>
47 #undef __APPLE_API_PRIVATE
52 /* int _longjmp(jmp_buf env, int val); */
54 MI_ENTRY_POINT(__longjmp)
55 lg r6,JMP_addr_at_setjmp(r3)
56 lbz r7, _COMM_PAGE_ALTIVEC(0)
57 cmpg cr1,r3,r6 ; jmpbuf still at same address?
58 cmpwi cr2,r7,0 ; Altivec available? (using non-volatile cr)
59 beq++ cr1,LRestoreVRs ; jmpbuf has not moved
61 ; jmp_buf was moved since setjmp (or is uninitialized.)
62 ; We must move VRs and FPRs to be quadword aligned at present address.
64 stg r3,JMP_addr_at_setjmp(r3) ; update, in case we longjmp to this again
65 mr r31,r4 ; save "val" arg across memmove
66 mr r30,r3 ; and jmp_buf ptr
67 addi r3,r3,JMP_vr_base_addr
68 addi r4,r6,JMP_vr_base_addr
69 clrrgi r3,r3,4 ; r3 <- QW aligned addr where they should be
70 clrrgi r4,r4,4 ; r4 <- QW aligned addr where they originally were
71 sub r7,r4,r6 ; r7 <- offset of VRs/FPRs within jmp_buf
72 add r4,r30,r7 ; r4 <- where they are now
73 li r5,(JMP_buf_end - JMP_vr_base_addr)
75 MI_CALL_EXTERNAL(_memmove)
77 mr r3,r30 ; restore parameters
81 ; cr2 - beq if AltiVec not available
84 lg r0,JMP_vrsave(r3) ; get VRSAVE at setjmp()
85 addi r6,r3,JMP_vr_base_addr
86 beq-- cr2,LRestoreFPRs ; AltiVec not available so skip
87 cmpwi r0,0 ; any live VRs?
88 mtspr VRSave,r0 ; update VRSAVE whether 0 or not
89 beq++ LRestoreFPRs ; VRSAVE is 0 so no VRs to reload
117 addi r6,r3,JMP_fp_base_addr
118 lfd f0,JMP_fpscr(r3) ; get FPSCR from non-sliding section of jmpbuf
119 clrrgi r6,r6,4 ; mask off low 4 bits to qw align
138 mtfsf 0xFF,f0 ; restore entire FPSCR
142 lg r5, JMP_cr(r3) ; r5 <- CR
143 lg r6, JMP_lr(r3) ; r6 <- LR (ie, return addres)
144 cmplgi r4,0 ; is return value 0? (not permitted)
152 mtcrf 0x20,r5 ; restore cr2 (we only restore non-volatile CRs)
157 mtctr r6 ; set up return address, avoiding LR since it will mispredict
162 mtcrf 0x10,r5 ; restore cr3
167 mtcrf 0x08,r5 ; restore cr4
170 mr r3,r4 ; move return code into position (cr0 is set on r4)
171 bnectr++ ; return code was not 0
172 li r3, 1 ; cannot return zero from longjmp(), so return 1 instead